tas2770.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // ALSA SoC Texas Instruments TAS2770 20-W Digital Input Mono Class-D
  4. // Audio Amplifier with Speaker I/V Sense
  5. //
  6. // Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
  7. // Author: Tracy Yi <tracy-yi@ti.com>
  8. // Frank Shi <shifu0704@thundersoft.com>
  9. #include <linux/module.h>
  10. #include <linux/moduleparam.h>
  11. #include <linux/err.h>
  12. #include <linux/init.h>
  13. #include <linux/delay.h>
  14. #include <linux/pm.h>
  15. #include <linux/i2c.h>
  16. #include <linux/gpio.h>
  17. #include <linux/gpio/consumer.h>
  18. #include <linux/regulator/consumer.h>
  19. #include <linux/firmware.h>
  20. #include <linux/regmap.h>
  21. #include <linux/of.h>
  22. #include <linux/of_gpio.h>
  23. #include <linux/slab.h>
  24. #include <sound/soc.h>
  25. #include <sound/pcm.h>
  26. #include <sound/pcm_params.h>
  27. #include <sound/initval.h>
  28. #include <sound/tlv.h>
  29. #include "tas2770.h"
  30. #define TAS2770_MDELAY 0xFFFFFFFE
  31. static void tas2770_reset(struct tas2770_priv *tas2770)
  32. {
  33. if (tas2770->reset_gpio) {
  34. gpiod_set_value_cansleep(tas2770->reset_gpio, 0);
  35. msleep(20);
  36. gpiod_set_value_cansleep(tas2770->reset_gpio, 1);
  37. usleep_range(1000, 2000);
  38. }
  39. snd_soc_component_write(tas2770->component, TAS2770_SW_RST,
  40. TAS2770_RST);
  41. usleep_range(1000, 2000);
  42. }
  43. static int tas2770_set_bias_level(struct snd_soc_component *component,
  44. enum snd_soc_bias_level level)
  45. {
  46. struct tas2770_priv *tas2770 =
  47. snd_soc_component_get_drvdata(component);
  48. switch (level) {
  49. case SND_SOC_BIAS_ON:
  50. snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  51. TAS2770_PWR_CTRL_MASK,
  52. TAS2770_PWR_CTRL_ACTIVE);
  53. break;
  54. case SND_SOC_BIAS_STANDBY:
  55. case SND_SOC_BIAS_PREPARE:
  56. snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  57. TAS2770_PWR_CTRL_MASK,
  58. TAS2770_PWR_CTRL_MUTE);
  59. break;
  60. case SND_SOC_BIAS_OFF:
  61. snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  62. TAS2770_PWR_CTRL_MASK,
  63. TAS2770_PWR_CTRL_SHUTDOWN);
  64. break;
  65. default:
  66. dev_err(tas2770->dev, "wrong power level setting %d\n", level);
  67. return -EINVAL;
  68. }
  69. return 0;
  70. }
  71. #ifdef CONFIG_PM
  72. static int tas2770_codec_suspend(struct snd_soc_component *component)
  73. {
  74. struct tas2770_priv *tas2770 = snd_soc_component_get_drvdata(component);
  75. int ret = 0;
  76. regcache_cache_only(tas2770->regmap, true);
  77. regcache_mark_dirty(tas2770->regmap);
  78. if (tas2770->sdz_gpio) {
  79. gpiod_set_value_cansleep(tas2770->sdz_gpio, 0);
  80. } else {
  81. ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  82. TAS2770_PWR_CTRL_MASK,
  83. TAS2770_PWR_CTRL_SHUTDOWN);
  84. if (ret < 0) {
  85. regcache_cache_only(tas2770->regmap, false);
  86. regcache_sync(tas2770->regmap);
  87. return ret;
  88. }
  89. ret = 0;
  90. }
  91. return ret;
  92. }
  93. static int tas2770_codec_resume(struct snd_soc_component *component)
  94. {
  95. struct tas2770_priv *tas2770 = snd_soc_component_get_drvdata(component);
  96. int ret = 0;
  97. if (tas2770->sdz_gpio) {
  98. gpiod_set_value_cansleep(tas2770->sdz_gpio, 1);
  99. usleep_range(1000, 2000);
  100. } else {
  101. ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  102. TAS2770_PWR_CTRL_MASK,
  103. TAS2770_PWR_CTRL_ACTIVE);
  104. if (ret < 0)
  105. return ret;
  106. }
  107. regcache_cache_only(tas2770->regmap, false);
  108. return regcache_sync(tas2770->regmap);
  109. }
  110. #else
  111. #define tas2770_codec_suspend NULL
  112. #define tas2770_codec_resume NULL
  113. #endif
  114. static const char * const tas2770_ASI1_src[] = {
  115. "I2C offset", "Left", "Right", "LeftRightDiv2",
  116. };
  117. static SOC_ENUM_SINGLE_DECL(
  118. tas2770_ASI1_src_enum, TAS2770_TDM_CFG_REG2,
  119. 4, tas2770_ASI1_src);
  120. static const struct snd_kcontrol_new tas2770_asi1_mux =
  121. SOC_DAPM_ENUM("ASI1 Source", tas2770_ASI1_src_enum);
  122. static int tas2770_dac_event(struct snd_soc_dapm_widget *w,
  123. struct snd_kcontrol *kcontrol, int event)
  124. {
  125. struct snd_soc_component *component =
  126. snd_soc_dapm_to_component(w->dapm);
  127. struct tas2770_priv *tas2770 =
  128. snd_soc_component_get_drvdata(component);
  129. int ret;
  130. switch (event) {
  131. case SND_SOC_DAPM_POST_PMU:
  132. ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  133. TAS2770_PWR_CTRL_MASK,
  134. TAS2770_PWR_CTRL_MUTE);
  135. break;
  136. case SND_SOC_DAPM_PRE_PMD:
  137. ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  138. TAS2770_PWR_CTRL_MASK,
  139. TAS2770_PWR_CTRL_SHUTDOWN);
  140. break;
  141. default:
  142. dev_err(tas2770->dev, "Not supported evevt\n");
  143. return -EINVAL;
  144. }
  145. if (ret < 0)
  146. return ret;
  147. return 0;
  148. }
  149. static const struct snd_kcontrol_new isense_switch =
  150. SOC_DAPM_SINGLE("Switch", TAS2770_PWR_CTRL, 3, 1, 1);
  151. static const struct snd_kcontrol_new vsense_switch =
  152. SOC_DAPM_SINGLE("Switch", TAS2770_PWR_CTRL, 2, 1, 1);
  153. static const struct snd_soc_dapm_widget tas2770_dapm_widgets[] = {
  154. SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
  155. SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2770_asi1_mux),
  156. SND_SOC_DAPM_SWITCH("ISENSE", TAS2770_PWR_CTRL, 3, 1, &isense_switch),
  157. SND_SOC_DAPM_SWITCH("VSENSE", TAS2770_PWR_CTRL, 2, 1, &vsense_switch),
  158. SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2770_dac_event,
  159. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  160. SND_SOC_DAPM_OUTPUT("OUT"),
  161. SND_SOC_DAPM_SIGGEN("VMON"),
  162. SND_SOC_DAPM_SIGGEN("IMON")
  163. };
  164. static const struct snd_soc_dapm_route tas2770_audio_map[] = {
  165. {"ASI1 Sel", "I2C offset", "ASI1"},
  166. {"ASI1 Sel", "Left", "ASI1"},
  167. {"ASI1 Sel", "Right", "ASI1"},
  168. {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
  169. {"DAC", NULL, "ASI1 Sel"},
  170. {"OUT", NULL, "DAC"},
  171. {"ISENSE", "Switch", "IMON"},
  172. {"VSENSE", "Switch", "VMON"},
  173. };
  174. static int tas2770_mute(struct snd_soc_dai *dai, int mute, int direction)
  175. {
  176. struct snd_soc_component *component = dai->component;
  177. int ret;
  178. if (mute)
  179. ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  180. TAS2770_PWR_CTRL_MASK,
  181. TAS2770_PWR_CTRL_MUTE);
  182. else
  183. ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
  184. TAS2770_PWR_CTRL_MASK,
  185. TAS2770_PWR_CTRL_ACTIVE);
  186. if (ret < 0)
  187. return ret;
  188. return 0;
  189. }
  190. static int tas2770_set_bitwidth(struct tas2770_priv *tas2770, int bitwidth)
  191. {
  192. int ret;
  193. struct snd_soc_component *component = tas2770->component;
  194. switch (bitwidth) {
  195. case SNDRV_PCM_FORMAT_S16_LE:
  196. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  197. TAS2770_TDM_CFG_REG2_RXW_MASK,
  198. TAS2770_TDM_CFG_REG2_RXW_16BITS);
  199. tas2770->v_sense_slot = tas2770->i_sense_slot + 2;
  200. break;
  201. case SNDRV_PCM_FORMAT_S24_LE:
  202. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  203. TAS2770_TDM_CFG_REG2_RXW_MASK,
  204. TAS2770_TDM_CFG_REG2_RXW_24BITS);
  205. tas2770->v_sense_slot = tas2770->i_sense_slot + 4;
  206. break;
  207. case SNDRV_PCM_FORMAT_S32_LE:
  208. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  209. TAS2770_TDM_CFG_REG2_RXW_MASK,
  210. TAS2770_TDM_CFG_REG2_RXW_32BITS);
  211. tas2770->v_sense_slot = tas2770->i_sense_slot + 4;
  212. break;
  213. default:
  214. return -EINVAL;
  215. }
  216. if (ret < 0)
  217. return ret;
  218. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG5,
  219. TAS2770_TDM_CFG_REG5_VSNS_MASK |
  220. TAS2770_TDM_CFG_REG5_50_MASK,
  221. TAS2770_TDM_CFG_REG5_VSNS_ENABLE |
  222. tas2770->v_sense_slot);
  223. if (ret < 0)
  224. return ret;
  225. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG6,
  226. TAS2770_TDM_CFG_REG6_ISNS_MASK |
  227. TAS2770_TDM_CFG_REG6_50_MASK,
  228. TAS2770_TDM_CFG_REG6_ISNS_ENABLE |
  229. tas2770->i_sense_slot);
  230. if (ret < 0)
  231. return ret;
  232. return 0;
  233. }
  234. static int tas2770_set_samplerate(struct tas2770_priv *tas2770, int samplerate)
  235. {
  236. struct snd_soc_component *component = tas2770->component;
  237. int ramp_rate_val;
  238. int ret;
  239. switch (samplerate) {
  240. case 48000:
  241. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
  242. TAS2770_TDM_CFG_REG0_31_44_1_48KHZ;
  243. break;
  244. case 44100:
  245. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
  246. TAS2770_TDM_CFG_REG0_31_44_1_48KHZ;
  247. break;
  248. case 96000:
  249. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
  250. TAS2770_TDM_CFG_REG0_31_88_2_96KHZ;
  251. break;
  252. case 88200:
  253. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
  254. TAS2770_TDM_CFG_REG0_31_88_2_96KHZ;
  255. break;
  256. case 192000:
  257. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
  258. TAS2770_TDM_CFG_REG0_31_176_4_192KHZ;
  259. break;
  260. case 176400:
  261. ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
  262. TAS2770_TDM_CFG_REG0_31_176_4_192KHZ;
  263. break;
  264. default:
  265. return -EINVAL;
  266. }
  267. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
  268. TAS2770_TDM_CFG_REG0_SMP_MASK |
  269. TAS2770_TDM_CFG_REG0_31_MASK,
  270. ramp_rate_val);
  271. if (ret < 0)
  272. return ret;
  273. return 0;
  274. }
  275. static int tas2770_hw_params(struct snd_pcm_substream *substream,
  276. struct snd_pcm_hw_params *params,
  277. struct snd_soc_dai *dai)
  278. {
  279. struct snd_soc_component *component = dai->component;
  280. struct tas2770_priv *tas2770 =
  281. snd_soc_component_get_drvdata(component);
  282. int ret;
  283. ret = tas2770_set_bitwidth(tas2770, params_format(params));
  284. if (ret)
  285. return ret;
  286. return tas2770_set_samplerate(tas2770, params_rate(params));
  287. }
  288. static int tas2770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  289. {
  290. struct snd_soc_component *component = dai->component;
  291. struct tas2770_priv *tas2770 =
  292. snd_soc_component_get_drvdata(component);
  293. u8 tdm_rx_start_slot = 0, asi_cfg_1 = 0;
  294. int ret;
  295. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  296. case SND_SOC_DAIFMT_CBS_CFS:
  297. break;
  298. default:
  299. dev_err(tas2770->dev, "ASI format master is not found\n");
  300. return -EINVAL;
  301. }
  302. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  303. case SND_SOC_DAIFMT_NB_NF:
  304. asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_RSING;
  305. break;
  306. case SND_SOC_DAIFMT_IB_NF:
  307. asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_FALING;
  308. break;
  309. default:
  310. dev_err(tas2770->dev, "ASI format Inverse is not found\n");
  311. return -EINVAL;
  312. }
  313. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG1,
  314. TAS2770_TDM_CFG_REG1_RX_MASK,
  315. asi_cfg_1);
  316. if (ret < 0)
  317. return ret;
  318. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  319. case SND_SOC_DAIFMT_I2S:
  320. tdm_rx_start_slot = 1;
  321. break;
  322. case SND_SOC_DAIFMT_DSP_A:
  323. tdm_rx_start_slot = 0;
  324. break;
  325. case SND_SOC_DAIFMT_DSP_B:
  326. tdm_rx_start_slot = 1;
  327. break;
  328. case SND_SOC_DAIFMT_LEFT_J:
  329. tdm_rx_start_slot = 0;
  330. break;
  331. default:
  332. dev_err(tas2770->dev,
  333. "DAI Format is not found, fmt=0x%x\n", fmt);
  334. return -EINVAL;
  335. }
  336. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG1,
  337. TAS2770_TDM_CFG_REG1_MASK,
  338. (tdm_rx_start_slot << TAS2770_TDM_CFG_REG1_51_SHIFT));
  339. if (ret < 0)
  340. return ret;
  341. return 0;
  342. }
  343. static int tas2770_set_dai_tdm_slot(struct snd_soc_dai *dai,
  344. unsigned int tx_mask,
  345. unsigned int rx_mask,
  346. int slots, int slot_width)
  347. {
  348. struct snd_soc_component *component = dai->component;
  349. int left_slot, right_slot;
  350. int ret;
  351. if (tx_mask == 0 || rx_mask != 0)
  352. return -EINVAL;
  353. if (slots == 1) {
  354. if (tx_mask != 1)
  355. return -EINVAL;
  356. left_slot = 0;
  357. right_slot = 0;
  358. } else {
  359. left_slot = __ffs(tx_mask);
  360. tx_mask &= ~(1 << left_slot);
  361. if (tx_mask == 0) {
  362. right_slot = left_slot;
  363. } else {
  364. right_slot = __ffs(tx_mask);
  365. tx_mask &= ~(1 << right_slot);
  366. }
  367. }
  368. if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
  369. return -EINVAL;
  370. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG3,
  371. TAS2770_TDM_CFG_REG3_30_MASK,
  372. (left_slot << TAS2770_TDM_CFG_REG3_30_SHIFT));
  373. if (ret < 0)
  374. return ret;
  375. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG3,
  376. TAS2770_TDM_CFG_REG3_RXS_MASK,
  377. (right_slot << TAS2770_TDM_CFG_REG3_RXS_SHIFT));
  378. if (ret < 0)
  379. return ret;
  380. switch (slot_width) {
  381. case 16:
  382. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  383. TAS2770_TDM_CFG_REG2_RXS_MASK,
  384. TAS2770_TDM_CFG_REG2_RXS_16BITS);
  385. break;
  386. case 24:
  387. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  388. TAS2770_TDM_CFG_REG2_RXS_MASK,
  389. TAS2770_TDM_CFG_REG2_RXS_24BITS);
  390. break;
  391. case 32:
  392. ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
  393. TAS2770_TDM_CFG_REG2_RXS_MASK,
  394. TAS2770_TDM_CFG_REG2_RXS_32BITS);
  395. break;
  396. case 0:
  397. /* Do not change slot width */
  398. ret = 0;
  399. break;
  400. default:
  401. ret = -EINVAL;
  402. }
  403. if (ret < 0)
  404. return ret;
  405. return 0;
  406. }
  407. static struct snd_soc_dai_ops tas2770_dai_ops = {
  408. .mute_stream = tas2770_mute,
  409. .hw_params = tas2770_hw_params,
  410. .set_fmt = tas2770_set_fmt,
  411. .set_tdm_slot = tas2770_set_dai_tdm_slot,
  412. .no_capture_mute = 1,
  413. };
  414. #define TAS2770_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  415. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  416. #define TAS2770_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  417. SNDRV_PCM_RATE_96000 |\
  418. SNDRV_PCM_RATE_192000\
  419. )
  420. static struct snd_soc_dai_driver tas2770_dai_driver[] = {
  421. {
  422. .name = "tas2770 ASI1",
  423. .id = 0,
  424. .playback = {
  425. .stream_name = "ASI1 Playback",
  426. .channels_min = 2,
  427. .channels_max = 2,
  428. .rates = TAS2770_RATES,
  429. .formats = TAS2770_FORMATS,
  430. },
  431. .capture = {
  432. .stream_name = "ASI1 Capture",
  433. .channels_min = 0,
  434. .channels_max = 2,
  435. .rates = TAS2770_RATES,
  436. .formats = TAS2770_FORMATS,
  437. },
  438. .ops = &tas2770_dai_ops,
  439. .symmetric_rates = 1,
  440. },
  441. };
  442. static int tas2770_codec_probe(struct snd_soc_component *component)
  443. {
  444. struct tas2770_priv *tas2770 =
  445. snd_soc_component_get_drvdata(component);
  446. tas2770->component = component;
  447. if (tas2770->sdz_gpio) {
  448. gpiod_set_value_cansleep(tas2770->sdz_gpio, 1);
  449. usleep_range(1000, 2000);
  450. }
  451. tas2770_reset(tas2770);
  452. return 0;
  453. }
  454. static DECLARE_TLV_DB_SCALE(tas2770_digital_tlv, 1100, 50, 0);
  455. static DECLARE_TLV_DB_SCALE(tas2770_playback_volume, -12750, 50, 0);
  456. static const struct snd_kcontrol_new tas2770_snd_controls[] = {
  457. SOC_SINGLE_TLV("Speaker Playback Volume", TAS2770_PLAY_CFG_REG2,
  458. 0, TAS2770_PLAY_CFG_REG2_VMAX, 1, tas2770_playback_volume),
  459. SOC_SINGLE_TLV("Amp Gain Volume", TAS2770_PLAY_CFG_REG0, 0, 0x14, 0,
  460. tas2770_digital_tlv),
  461. };
  462. static const struct snd_soc_component_driver soc_component_driver_tas2770 = {
  463. .probe = tas2770_codec_probe,
  464. .suspend = tas2770_codec_suspend,
  465. .resume = tas2770_codec_resume,
  466. .set_bias_level = tas2770_set_bias_level,
  467. .controls = tas2770_snd_controls,
  468. .num_controls = ARRAY_SIZE(tas2770_snd_controls),
  469. .dapm_widgets = tas2770_dapm_widgets,
  470. .num_dapm_widgets = ARRAY_SIZE(tas2770_dapm_widgets),
  471. .dapm_routes = tas2770_audio_map,
  472. .num_dapm_routes = ARRAY_SIZE(tas2770_audio_map),
  473. .idle_bias_on = 1,
  474. .endianness = 1,
  475. .non_legacy_dai_naming = 1,
  476. };
  477. static int tas2770_register_codec(struct tas2770_priv *tas2770)
  478. {
  479. return devm_snd_soc_register_component(tas2770->dev,
  480. &soc_component_driver_tas2770,
  481. tas2770_dai_driver, ARRAY_SIZE(tas2770_dai_driver));
  482. }
  483. static const struct reg_default tas2770_reg_defaults[] = {
  484. { TAS2770_PAGE, 0x00 },
  485. { TAS2770_SW_RST, 0x00 },
  486. { TAS2770_PWR_CTRL, 0x0e },
  487. { TAS2770_PLAY_CFG_REG0, 0x10 },
  488. { TAS2770_PLAY_CFG_REG1, 0x01 },
  489. { TAS2770_PLAY_CFG_REG2, 0x00 },
  490. { TAS2770_MSC_CFG_REG0, 0x07 },
  491. { TAS2770_TDM_CFG_REG1, 0x02 },
  492. { TAS2770_TDM_CFG_REG2, 0x0a },
  493. { TAS2770_TDM_CFG_REG3, 0x10 },
  494. { TAS2770_INT_MASK_REG0, 0xfc },
  495. { TAS2770_INT_MASK_REG1, 0xb1 },
  496. { TAS2770_INT_CFG, 0x05 },
  497. { TAS2770_MISC_IRQ, 0x81 },
  498. { TAS2770_CLK_CGF, 0x0c },
  499. };
  500. static bool tas2770_volatile(struct device *dev, unsigned int reg)
  501. {
  502. switch (reg) {
  503. case TAS2770_PAGE: /* regmap implementation requires this */
  504. case TAS2770_SW_RST: /* always clears after write */
  505. case TAS2770_BO_PRV_REG0:/* has a self clearing bit */
  506. case TAS2770_LVE_INT_REG0:
  507. case TAS2770_LVE_INT_REG1:
  508. case TAS2770_LAT_INT_REG0:/* Sticky interrupt flags */
  509. case TAS2770_LAT_INT_REG1:/* Sticky interrupt flags */
  510. case TAS2770_VBAT_MSB:
  511. case TAS2770_VBAT_LSB:
  512. case TAS2770_TEMP_MSB:
  513. case TAS2770_TEMP_LSB:
  514. return true;
  515. }
  516. return false;
  517. }
  518. static bool tas2770_writeable(struct device *dev, unsigned int reg)
  519. {
  520. switch (reg) {
  521. case TAS2770_LVE_INT_REG0:
  522. case TAS2770_LVE_INT_REG1:
  523. case TAS2770_LAT_INT_REG0:
  524. case TAS2770_LAT_INT_REG1:
  525. case TAS2770_VBAT_MSB:
  526. case TAS2770_VBAT_LSB:
  527. case TAS2770_TEMP_MSB:
  528. case TAS2770_TEMP_LSB:
  529. case TAS2770_TDM_CLK_DETC:
  530. case TAS2770_REV_AND_GPID:
  531. return false;
  532. }
  533. return true;
  534. }
  535. static const struct regmap_range_cfg tas2770_regmap_ranges[] = {
  536. {
  537. .range_min = 0,
  538. .range_max = 1 * 128,
  539. .selector_reg = TAS2770_PAGE,
  540. .selector_mask = 0xff,
  541. .selector_shift = 0,
  542. .window_start = 0,
  543. .window_len = 128,
  544. },
  545. };
  546. static const struct regmap_config tas2770_i2c_regmap = {
  547. .reg_bits = 8,
  548. .val_bits = 8,
  549. .writeable_reg = tas2770_writeable,
  550. .volatile_reg = tas2770_volatile,
  551. .reg_defaults = tas2770_reg_defaults,
  552. .num_reg_defaults = ARRAY_SIZE(tas2770_reg_defaults),
  553. .cache_type = REGCACHE_RBTREE,
  554. .ranges = tas2770_regmap_ranges,
  555. .num_ranges = ARRAY_SIZE(tas2770_regmap_ranges),
  556. .max_register = 1 * 128,
  557. };
  558. static int tas2770_parse_dt(struct device *dev, struct tas2770_priv *tas2770)
  559. {
  560. int rc = 0;
  561. rc = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
  562. &tas2770->i_sense_slot);
  563. if (rc) {
  564. dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
  565. "ti,imon-slot-no");
  566. tas2770->i_sense_slot = 0;
  567. }
  568. rc = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
  569. &tas2770->v_sense_slot);
  570. if (rc) {
  571. dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
  572. "ti,vmon-slot-no");
  573. tas2770->v_sense_slot = 2;
  574. }
  575. tas2770->sdz_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
  576. if (IS_ERR(tas2770->sdz_gpio)) {
  577. if (PTR_ERR(tas2770->sdz_gpio) == -EPROBE_DEFER)
  578. return -EPROBE_DEFER;
  579. tas2770->sdz_gpio = NULL;
  580. }
  581. return 0;
  582. }
  583. static int tas2770_i2c_probe(struct i2c_client *client,
  584. const struct i2c_device_id *id)
  585. {
  586. struct tas2770_priv *tas2770;
  587. int result;
  588. tas2770 = devm_kzalloc(&client->dev, sizeof(struct tas2770_priv),
  589. GFP_KERNEL);
  590. if (!tas2770)
  591. return -ENOMEM;
  592. tas2770->dev = &client->dev;
  593. i2c_set_clientdata(client, tas2770);
  594. dev_set_drvdata(&client->dev, tas2770);
  595. tas2770->regmap = devm_regmap_init_i2c(client, &tas2770_i2c_regmap);
  596. if (IS_ERR(tas2770->regmap)) {
  597. result = PTR_ERR(tas2770->regmap);
  598. dev_err(&client->dev, "Failed to allocate register map: %d\n",
  599. result);
  600. return result;
  601. }
  602. if (client->dev.of_node) {
  603. result = tas2770_parse_dt(&client->dev, tas2770);
  604. if (result) {
  605. dev_err(tas2770->dev, "%s: Failed to parse devicetree\n",
  606. __func__);
  607. return result;
  608. }
  609. }
  610. tas2770->reset_gpio = devm_gpiod_get_optional(tas2770->dev, "reset",
  611. GPIOD_OUT_HIGH);
  612. if (IS_ERR(tas2770->reset_gpio)) {
  613. if (PTR_ERR(tas2770->reset_gpio) == -EPROBE_DEFER) {
  614. tas2770->reset_gpio = NULL;
  615. return -EPROBE_DEFER;
  616. }
  617. }
  618. result = tas2770_register_codec(tas2770);
  619. if (result)
  620. dev_err(tas2770->dev, "Register codec failed.\n");
  621. return result;
  622. }
  623. static const struct i2c_device_id tas2770_i2c_id[] = {
  624. { "tas2770", 0},
  625. { }
  626. };
  627. MODULE_DEVICE_TABLE(i2c, tas2770_i2c_id);
  628. #if defined(CONFIG_OF)
  629. static const struct of_device_id tas2770_of_match[] = {
  630. { .compatible = "ti,tas2770" },
  631. {},
  632. };
  633. MODULE_DEVICE_TABLE(of, tas2770_of_match);
  634. #endif
  635. static struct i2c_driver tas2770_i2c_driver = {
  636. .driver = {
  637. .name = "tas2770",
  638. .of_match_table = of_match_ptr(tas2770_of_match),
  639. },
  640. .probe = tas2770_i2c_probe,
  641. .id_table = tas2770_i2c_id,
  642. };
  643. module_i2c_driver(tas2770_i2c_driver);
  644. MODULE_AUTHOR("Shi Fu <shifu0704@thundersoft.com>");
  645. MODULE_DESCRIPTION("TAS2770 I2C Smart Amplifier driver");
  646. MODULE_LICENSE("GPL v2");