tas2552.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * tas2552.c - ALSA SoC Texas Instruments TAS2552 Mono Audio Amplifier
  4. *
  5. * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com
  6. *
  7. * Author: Dan Murphy <dmurphy@ti.com>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/errno.h>
  11. #include <linux/device.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio.h>
  14. #include <linux/of_gpio.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/regmap.h>
  17. #include <linux/slab.h>
  18. #include <linux/gpio/consumer.h>
  19. #include <linux/regulator/consumer.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include <sound/soc-dapm.h>
  24. #include <sound/tlv.h>
  25. #include <sound/tas2552-plat.h>
  26. #include <dt-bindings/sound/tas2552.h>
  27. #include "tas2552.h"
  28. static const struct reg_default tas2552_reg_defs[] = {
  29. {TAS2552_CFG_1, 0x22},
  30. {TAS2552_CFG_3, 0x80},
  31. {TAS2552_DOUT, 0x00},
  32. {TAS2552_OUTPUT_DATA, 0xc0},
  33. {TAS2552_PDM_CFG, 0x01},
  34. {TAS2552_PGA_GAIN, 0x00},
  35. {TAS2552_BOOST_APT_CTRL, 0x0f},
  36. {TAS2552_RESERVED_0D, 0xbe},
  37. {TAS2552_LIMIT_RATE_HYS, 0x08},
  38. {TAS2552_CFG_2, 0xef},
  39. {TAS2552_SER_CTRL_1, 0x00},
  40. {TAS2552_SER_CTRL_2, 0x00},
  41. {TAS2552_PLL_CTRL_1, 0x10},
  42. {TAS2552_PLL_CTRL_2, 0x00},
  43. {TAS2552_PLL_CTRL_3, 0x00},
  44. {TAS2552_BTIP, 0x8f},
  45. {TAS2552_BTS_CTRL, 0x80},
  46. {TAS2552_LIMIT_RELEASE, 0x04},
  47. {TAS2552_LIMIT_INT_COUNT, 0x00},
  48. {TAS2552_EDGE_RATE_CTRL, 0x40},
  49. {TAS2552_VBAT_DATA, 0x00},
  50. };
  51. #define TAS2552_NUM_SUPPLIES 3
  52. static const char *tas2552_supply_names[TAS2552_NUM_SUPPLIES] = {
  53. "vbat", /* vbat voltage */
  54. "iovdd", /* I/O Voltage */
  55. "avdd", /* Analog DAC Voltage */
  56. };
  57. struct tas2552_data {
  58. struct snd_soc_component *component;
  59. struct regmap *regmap;
  60. struct i2c_client *tas2552_client;
  61. struct regulator_bulk_data supplies[TAS2552_NUM_SUPPLIES];
  62. struct gpio_desc *enable_gpio;
  63. unsigned char regs[TAS2552_VBAT_DATA];
  64. unsigned int pll_clkin;
  65. int pll_clk_id;
  66. unsigned int pdm_clk;
  67. int pdm_clk_id;
  68. unsigned int dai_fmt;
  69. unsigned int tdm_delay;
  70. };
  71. static int tas2552_post_event(struct snd_soc_dapm_widget *w,
  72. struct snd_kcontrol *kcontrol, int event)
  73. {
  74. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  75. switch (event) {
  76. case SND_SOC_DAPM_POST_PMU:
  77. snd_soc_component_write(component, TAS2552_RESERVED_0D, 0xc0);
  78. snd_soc_component_update_bits(component, TAS2552_LIMIT_RATE_HYS, (1 << 5),
  79. (1 << 5));
  80. snd_soc_component_update_bits(component, TAS2552_CFG_2, 1, 0);
  81. snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_SWS, 0);
  82. break;
  83. case SND_SOC_DAPM_POST_PMD:
  84. snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_SWS,
  85. TAS2552_SWS);
  86. snd_soc_component_update_bits(component, TAS2552_CFG_2, 1, 1);
  87. snd_soc_component_update_bits(component, TAS2552_LIMIT_RATE_HYS, (1 << 5), 0);
  88. snd_soc_component_write(component, TAS2552_RESERVED_0D, 0xbe);
  89. break;
  90. }
  91. return 0;
  92. }
  93. /* Input mux controls */
  94. static const char * const tas2552_input_texts[] = {
  95. "Digital", "Analog" };
  96. static SOC_ENUM_SINGLE_DECL(tas2552_input_mux_enum, TAS2552_CFG_3, 7,
  97. tas2552_input_texts);
  98. static const struct snd_kcontrol_new tas2552_input_mux_control =
  99. SOC_DAPM_ENUM("Route", tas2552_input_mux_enum);
  100. static const struct snd_soc_dapm_widget tas2552_dapm_widgets[] =
  101. {
  102. SND_SOC_DAPM_INPUT("IN"),
  103. /* MUX Controls */
  104. SND_SOC_DAPM_MUX("Input selection", SND_SOC_NOPM, 0, 0,
  105. &tas2552_input_mux_control),
  106. SND_SOC_DAPM_AIF_IN("DAC IN", "DAC Playback", 0, SND_SOC_NOPM, 0, 0),
  107. SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
  108. SND_SOC_DAPM_OUT_DRV("ClassD", TAS2552_CFG_2, 7, 0, NULL, 0),
  109. SND_SOC_DAPM_SUPPLY("PLL", TAS2552_CFG_2, 3, 0, NULL, 0),
  110. SND_SOC_DAPM_POST("Post Event", tas2552_post_event),
  111. SND_SOC_DAPM_OUTPUT("OUT")
  112. };
  113. static const struct snd_soc_dapm_route tas2552_audio_map[] = {
  114. {"DAC", NULL, "DAC IN"},
  115. {"Input selection", "Digital", "DAC"},
  116. {"Input selection", "Analog", "IN"},
  117. {"ClassD", NULL, "Input selection"},
  118. {"OUT", NULL, "ClassD"},
  119. {"ClassD", NULL, "PLL"},
  120. };
  121. #ifdef CONFIG_PM
  122. static void tas2552_sw_shutdown(struct tas2552_data *tas2552, int sw_shutdown)
  123. {
  124. u8 cfg1_reg = 0;
  125. if (!tas2552->component)
  126. return;
  127. if (sw_shutdown)
  128. cfg1_reg = TAS2552_SWS;
  129. snd_soc_component_update_bits(tas2552->component, TAS2552_CFG_1, TAS2552_SWS,
  130. cfg1_reg);
  131. }
  132. #endif
  133. static int tas2552_setup_pll(struct snd_soc_component *component,
  134. struct snd_pcm_hw_params *params)
  135. {
  136. struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
  137. bool bypass_pll = false;
  138. unsigned int pll_clk = params_rate(params) * 512;
  139. unsigned int pll_clkin = tas2552->pll_clkin;
  140. u8 pll_enable;
  141. if (!pll_clkin) {
  142. if (tas2552->pll_clk_id != TAS2552_PLL_CLKIN_BCLK)
  143. return -EINVAL;
  144. pll_clkin = snd_soc_params_to_bclk(params);
  145. pll_clkin += tas2552->tdm_delay;
  146. }
  147. pll_enable = snd_soc_component_read(component, TAS2552_CFG_2) & TAS2552_PLL_ENABLE;
  148. snd_soc_component_update_bits(component, TAS2552_CFG_2, TAS2552_PLL_ENABLE, 0);
  149. if (pll_clkin == pll_clk)
  150. bypass_pll = true;
  151. if (bypass_pll) {
  152. /* By pass the PLL configuration */
  153. snd_soc_component_update_bits(component, TAS2552_PLL_CTRL_2,
  154. TAS2552_PLL_BYPASS, TAS2552_PLL_BYPASS);
  155. } else {
  156. /* Fill in the PLL control registers for J & D
  157. * pll_clk = (.5 * pll_clkin * J.D) / 2^p
  158. * Need to fill in J and D here based on incoming freq
  159. */
  160. unsigned int d, q, t;
  161. u8 j;
  162. u8 pll_sel = (tas2552->pll_clk_id << 3) & TAS2552_PLL_SRC_MASK;
  163. u8 p = snd_soc_component_read(component, TAS2552_PLL_CTRL_1);
  164. p = (p >> 7);
  165. recalc:
  166. t = (pll_clk * 2) << p;
  167. j = t / pll_clkin;
  168. d = t % pll_clkin;
  169. t = pll_clkin / 10000;
  170. q = d / (t + 1);
  171. d = q + ((9999 - pll_clkin % 10000) * (d / t - q)) / 10000;
  172. if (d && (pll_clkin < 512000 || pll_clkin > 9200000)) {
  173. if (tas2552->pll_clk_id == TAS2552_PLL_CLKIN_BCLK) {
  174. pll_clkin = 1800000;
  175. pll_sel = (TAS2552_PLL_CLKIN_1_8_FIXED << 3) &
  176. TAS2552_PLL_SRC_MASK;
  177. } else {
  178. pll_clkin = snd_soc_params_to_bclk(params);
  179. pll_clkin += tas2552->tdm_delay;
  180. pll_sel = (TAS2552_PLL_CLKIN_BCLK << 3) &
  181. TAS2552_PLL_SRC_MASK;
  182. }
  183. goto recalc;
  184. }
  185. snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_PLL_SRC_MASK,
  186. pll_sel);
  187. snd_soc_component_update_bits(component, TAS2552_PLL_CTRL_1,
  188. TAS2552_PLL_J_MASK, j);
  189. /* Will clear the PLL_BYPASS bit */
  190. snd_soc_component_write(component, TAS2552_PLL_CTRL_2,
  191. TAS2552_PLL_D_UPPER(d));
  192. snd_soc_component_write(component, TAS2552_PLL_CTRL_3,
  193. TAS2552_PLL_D_LOWER(d));
  194. }
  195. /* Restore PLL status */
  196. snd_soc_component_update_bits(component, TAS2552_CFG_2, TAS2552_PLL_ENABLE,
  197. pll_enable);
  198. return 0;
  199. }
  200. static int tas2552_hw_params(struct snd_pcm_substream *substream,
  201. struct snd_pcm_hw_params *params,
  202. struct snd_soc_dai *dai)
  203. {
  204. struct snd_soc_component *component = dai->component;
  205. struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
  206. int cpf;
  207. u8 ser_ctrl1_reg, wclk_rate;
  208. switch (params_width(params)) {
  209. case 16:
  210. ser_ctrl1_reg = TAS2552_WORDLENGTH_16BIT;
  211. cpf = 32 + tas2552->tdm_delay;
  212. break;
  213. case 20:
  214. ser_ctrl1_reg = TAS2552_WORDLENGTH_20BIT;
  215. cpf = 64 + tas2552->tdm_delay;
  216. break;
  217. case 24:
  218. ser_ctrl1_reg = TAS2552_WORDLENGTH_24BIT;
  219. cpf = 64 + tas2552->tdm_delay;
  220. break;
  221. case 32:
  222. ser_ctrl1_reg = TAS2552_WORDLENGTH_32BIT;
  223. cpf = 64 + tas2552->tdm_delay;
  224. break;
  225. default:
  226. dev_err(component->dev, "Not supported sample size: %d\n",
  227. params_width(params));
  228. return -EINVAL;
  229. }
  230. if (cpf <= 32)
  231. ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_32;
  232. else if (cpf <= 64)
  233. ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_64;
  234. else if (cpf <= 128)
  235. ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_128;
  236. else
  237. ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_256;
  238. snd_soc_component_update_bits(component, TAS2552_SER_CTRL_1,
  239. TAS2552_WORDLENGTH_MASK | TAS2552_CLKSPERFRAME_MASK,
  240. ser_ctrl1_reg);
  241. switch (params_rate(params)) {
  242. case 8000:
  243. wclk_rate = TAS2552_WCLK_FREQ_8KHZ;
  244. break;
  245. case 11025:
  246. case 12000:
  247. wclk_rate = TAS2552_WCLK_FREQ_11_12KHZ;
  248. break;
  249. case 16000:
  250. wclk_rate = TAS2552_WCLK_FREQ_16KHZ;
  251. break;
  252. case 22050:
  253. case 24000:
  254. wclk_rate = TAS2552_WCLK_FREQ_22_24KHZ;
  255. break;
  256. case 32000:
  257. wclk_rate = TAS2552_WCLK_FREQ_32KHZ;
  258. break;
  259. case 44100:
  260. case 48000:
  261. wclk_rate = TAS2552_WCLK_FREQ_44_48KHZ;
  262. break;
  263. case 88200:
  264. case 96000:
  265. wclk_rate = TAS2552_WCLK_FREQ_88_96KHZ;
  266. break;
  267. case 176400:
  268. case 192000:
  269. wclk_rate = TAS2552_WCLK_FREQ_176_192KHZ;
  270. break;
  271. default:
  272. dev_err(component->dev, "Not supported sample rate: %d\n",
  273. params_rate(params));
  274. return -EINVAL;
  275. }
  276. snd_soc_component_update_bits(component, TAS2552_CFG_3, TAS2552_WCLK_FREQ_MASK,
  277. wclk_rate);
  278. return tas2552_setup_pll(component, params);
  279. }
  280. #define TAS2552_DAI_FMT_MASK (TAS2552_BCLKDIR | \
  281. TAS2552_WCLKDIR | \
  282. TAS2552_DATAFORMAT_MASK)
  283. static int tas2552_prepare(struct snd_pcm_substream *substream,
  284. struct snd_soc_dai *dai)
  285. {
  286. struct snd_soc_component *component = dai->component;
  287. struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
  288. int delay = 0;
  289. /* TDM slot selection only valid in DSP_A/_B mode */
  290. if (tas2552->dai_fmt == SND_SOC_DAIFMT_DSP_A)
  291. delay += (tas2552->tdm_delay + 1);
  292. else if (tas2552->dai_fmt == SND_SOC_DAIFMT_DSP_B)
  293. delay += tas2552->tdm_delay;
  294. /* Configure data delay */
  295. snd_soc_component_write(component, TAS2552_SER_CTRL_2, delay);
  296. return 0;
  297. }
  298. static int tas2552_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  299. {
  300. struct snd_soc_component *component = dai->component;
  301. struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
  302. u8 serial_format;
  303. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  304. case SND_SOC_DAIFMT_CBS_CFS:
  305. serial_format = 0x00;
  306. break;
  307. case SND_SOC_DAIFMT_CBS_CFM:
  308. serial_format = TAS2552_WCLKDIR;
  309. break;
  310. case SND_SOC_DAIFMT_CBM_CFS:
  311. serial_format = TAS2552_BCLKDIR;
  312. break;
  313. case SND_SOC_DAIFMT_CBM_CFM:
  314. serial_format = (TAS2552_BCLKDIR | TAS2552_WCLKDIR);
  315. break;
  316. default:
  317. dev_vdbg(component->dev, "DAI Format master is not found\n");
  318. return -EINVAL;
  319. }
  320. switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
  321. SND_SOC_DAIFMT_INV_MASK)) {
  322. case (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF):
  323. break;
  324. case (SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF):
  325. case (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF):
  326. serial_format |= TAS2552_DATAFORMAT_DSP;
  327. break;
  328. case (SND_SOC_DAIFMT_RIGHT_J | SND_SOC_DAIFMT_NB_NF):
  329. serial_format |= TAS2552_DATAFORMAT_RIGHT_J;
  330. break;
  331. case (SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF):
  332. serial_format |= TAS2552_DATAFORMAT_LEFT_J;
  333. break;
  334. default:
  335. dev_vdbg(component->dev, "DAI Format is not found\n");
  336. return -EINVAL;
  337. }
  338. tas2552->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
  339. snd_soc_component_update_bits(component, TAS2552_SER_CTRL_1, TAS2552_DAI_FMT_MASK,
  340. serial_format);
  341. return 0;
  342. }
  343. static int tas2552_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
  344. unsigned int freq, int dir)
  345. {
  346. struct snd_soc_component *component = dai->component;
  347. struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
  348. u8 reg, mask, val;
  349. switch (clk_id) {
  350. case TAS2552_PLL_CLKIN_MCLK:
  351. case TAS2552_PLL_CLKIN_IVCLKIN:
  352. if (freq < 512000 || freq > 24576000) {
  353. /* out of range PLL_CLKIN, fall back to use BCLK */
  354. dev_warn(component->dev, "Out of range PLL_CLKIN: %u\n",
  355. freq);
  356. clk_id = TAS2552_PLL_CLKIN_BCLK;
  357. freq = 0;
  358. }
  359. fallthrough;
  360. case TAS2552_PLL_CLKIN_BCLK:
  361. case TAS2552_PLL_CLKIN_1_8_FIXED:
  362. mask = TAS2552_PLL_SRC_MASK;
  363. val = (clk_id << 3) & mask; /* bit 4:5 in the register */
  364. reg = TAS2552_CFG_1;
  365. tas2552->pll_clk_id = clk_id;
  366. tas2552->pll_clkin = freq;
  367. break;
  368. case TAS2552_PDM_CLK_PLL:
  369. case TAS2552_PDM_CLK_IVCLKIN:
  370. case TAS2552_PDM_CLK_BCLK:
  371. case TAS2552_PDM_CLK_MCLK:
  372. mask = TAS2552_PDM_CLK_SEL_MASK;
  373. val = (clk_id >> 1) & mask; /* bit 0:1 in the register */
  374. reg = TAS2552_PDM_CFG;
  375. tas2552->pdm_clk_id = clk_id;
  376. tas2552->pdm_clk = freq;
  377. break;
  378. default:
  379. dev_err(component->dev, "Invalid clk id: %d\n", clk_id);
  380. return -EINVAL;
  381. }
  382. snd_soc_component_update_bits(component, reg, mask, val);
  383. return 0;
  384. }
  385. static int tas2552_set_dai_tdm_slot(struct snd_soc_dai *dai,
  386. unsigned int tx_mask, unsigned int rx_mask,
  387. int slots, int slot_width)
  388. {
  389. struct snd_soc_component *component = dai->component;
  390. struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
  391. unsigned int lsb;
  392. if (unlikely(!tx_mask)) {
  393. dev_err(component->dev, "tx masks need to be non 0\n");
  394. return -EINVAL;
  395. }
  396. /* TDM based on DSP mode requires slots to be adjacent */
  397. lsb = __ffs(tx_mask);
  398. if ((lsb + 1) != __fls(tx_mask)) {
  399. dev_err(component->dev, "Invalid mask, slots must be adjacent\n");
  400. return -EINVAL;
  401. }
  402. tas2552->tdm_delay = lsb * slot_width;
  403. /* DOUT in high-impedance on inactive bit clocks */
  404. snd_soc_component_update_bits(component, TAS2552_DOUT,
  405. TAS2552_SDOUT_TRISTATE, TAS2552_SDOUT_TRISTATE);
  406. return 0;
  407. }
  408. static int tas2552_mute(struct snd_soc_dai *dai, int mute, int direction)
  409. {
  410. u8 cfg1_reg = 0;
  411. struct snd_soc_component *component = dai->component;
  412. if (mute)
  413. cfg1_reg |= TAS2552_MUTE;
  414. snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_MUTE, cfg1_reg);
  415. return 0;
  416. }
  417. #ifdef CONFIG_PM
  418. static int tas2552_runtime_suspend(struct device *dev)
  419. {
  420. struct tas2552_data *tas2552 = dev_get_drvdata(dev);
  421. tas2552_sw_shutdown(tas2552, 1);
  422. regcache_cache_only(tas2552->regmap, true);
  423. regcache_mark_dirty(tas2552->regmap);
  424. gpiod_set_value(tas2552->enable_gpio, 0);
  425. return 0;
  426. }
  427. static int tas2552_runtime_resume(struct device *dev)
  428. {
  429. struct tas2552_data *tas2552 = dev_get_drvdata(dev);
  430. gpiod_set_value(tas2552->enable_gpio, 1);
  431. tas2552_sw_shutdown(tas2552, 0);
  432. regcache_cache_only(tas2552->regmap, false);
  433. regcache_sync(tas2552->regmap);
  434. return 0;
  435. }
  436. #endif
  437. static const struct dev_pm_ops tas2552_pm = {
  438. SET_RUNTIME_PM_OPS(tas2552_runtime_suspend, tas2552_runtime_resume,
  439. NULL)
  440. };
  441. static const struct snd_soc_dai_ops tas2552_speaker_dai_ops = {
  442. .hw_params = tas2552_hw_params,
  443. .prepare = tas2552_prepare,
  444. .set_sysclk = tas2552_set_dai_sysclk,
  445. .set_fmt = tas2552_set_dai_fmt,
  446. .set_tdm_slot = tas2552_set_dai_tdm_slot,
  447. .mute_stream = tas2552_mute,
  448. .no_capture_mute = 1,
  449. };
  450. /* Formats supported by TAS2552 driver. */
  451. #define TAS2552_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  452. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  453. /* TAS2552 dai structure. */
  454. static struct snd_soc_dai_driver tas2552_dai[] = {
  455. {
  456. .name = "tas2552-amplifier",
  457. .playback = {
  458. .stream_name = "Playback",
  459. .channels_min = 2,
  460. .channels_max = 2,
  461. .rates = SNDRV_PCM_RATE_8000_192000,
  462. .formats = TAS2552_FORMATS,
  463. },
  464. .ops = &tas2552_speaker_dai_ops,
  465. },
  466. };
  467. /*
  468. * DAC digital volumes. From -7 to 24 dB in 1 dB steps
  469. */
  470. static DECLARE_TLV_DB_SCALE(dac_tlv, -700, 100, 0);
  471. static const char * const tas2552_din_source_select[] = {
  472. "Muted",
  473. "Left",
  474. "Right",
  475. "Left + Right average",
  476. };
  477. static SOC_ENUM_SINGLE_DECL(tas2552_din_source_enum,
  478. TAS2552_CFG_3, 3,
  479. tas2552_din_source_select);
  480. static const struct snd_kcontrol_new tas2552_snd_controls[] = {
  481. SOC_SINGLE_TLV("Speaker Driver Playback Volume",
  482. TAS2552_PGA_GAIN, 0, 0x1f, 0, dac_tlv),
  483. SOC_ENUM("DIN source", tas2552_din_source_enum),
  484. };
  485. static int tas2552_component_probe(struct snd_soc_component *component)
  486. {
  487. struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
  488. int ret;
  489. tas2552->component = component;
  490. ret = regulator_bulk_enable(ARRAY_SIZE(tas2552->supplies),
  491. tas2552->supplies);
  492. if (ret != 0) {
  493. dev_err(component->dev, "Failed to enable supplies: %d\n",
  494. ret);
  495. return ret;
  496. }
  497. gpiod_set_value(tas2552->enable_gpio, 1);
  498. ret = pm_runtime_get_sync(component->dev);
  499. if (ret < 0) {
  500. dev_err(component->dev, "Enabling device failed: %d\n",
  501. ret);
  502. goto probe_fail;
  503. }
  504. snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_MUTE, TAS2552_MUTE);
  505. snd_soc_component_write(component, TAS2552_CFG_3, TAS2552_I2S_OUT_SEL |
  506. TAS2552_DIN_SRC_SEL_AVG_L_R);
  507. snd_soc_component_write(component, TAS2552_OUTPUT_DATA,
  508. TAS2552_PDM_DATA_SEL_V_I |
  509. TAS2552_R_DATA_OUT(TAS2552_DATA_OUT_V_DATA));
  510. snd_soc_component_write(component, TAS2552_BOOST_APT_CTRL, TAS2552_APT_DELAY_200 |
  511. TAS2552_APT_THRESH_20_17);
  512. snd_soc_component_write(component, TAS2552_CFG_2, TAS2552_BOOST_EN | TAS2552_APT_EN |
  513. TAS2552_LIM_EN);
  514. return 0;
  515. probe_fail:
  516. pm_runtime_put_noidle(component->dev);
  517. gpiod_set_value(tas2552->enable_gpio, 0);
  518. regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies),
  519. tas2552->supplies);
  520. return ret;
  521. }
  522. static void tas2552_component_remove(struct snd_soc_component *component)
  523. {
  524. struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
  525. pm_runtime_put(component->dev);
  526. gpiod_set_value(tas2552->enable_gpio, 0);
  527. };
  528. #ifdef CONFIG_PM
  529. static int tas2552_suspend(struct snd_soc_component *component)
  530. {
  531. struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
  532. int ret;
  533. ret = regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies),
  534. tas2552->supplies);
  535. if (ret != 0)
  536. dev_err(component->dev, "Failed to disable supplies: %d\n",
  537. ret);
  538. return ret;
  539. }
  540. static int tas2552_resume(struct snd_soc_component *component)
  541. {
  542. struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
  543. int ret;
  544. ret = regulator_bulk_enable(ARRAY_SIZE(tas2552->supplies),
  545. tas2552->supplies);
  546. if (ret != 0) {
  547. dev_err(component->dev, "Failed to enable supplies: %d\n",
  548. ret);
  549. }
  550. return ret;
  551. }
  552. #else
  553. #define tas2552_suspend NULL
  554. #define tas2552_resume NULL
  555. #endif
  556. static const struct snd_soc_component_driver soc_component_dev_tas2552 = {
  557. .probe = tas2552_component_probe,
  558. .remove = tas2552_component_remove,
  559. .suspend = tas2552_suspend,
  560. .resume = tas2552_resume,
  561. .controls = tas2552_snd_controls,
  562. .num_controls = ARRAY_SIZE(tas2552_snd_controls),
  563. .dapm_widgets = tas2552_dapm_widgets,
  564. .num_dapm_widgets = ARRAY_SIZE(tas2552_dapm_widgets),
  565. .dapm_routes = tas2552_audio_map,
  566. .num_dapm_routes = ARRAY_SIZE(tas2552_audio_map),
  567. .idle_bias_on = 1,
  568. .endianness = 1,
  569. .non_legacy_dai_naming = 1,
  570. };
  571. static const struct regmap_config tas2552_regmap_config = {
  572. .reg_bits = 8,
  573. .val_bits = 8,
  574. .max_register = TAS2552_MAX_REG,
  575. .reg_defaults = tas2552_reg_defs,
  576. .num_reg_defaults = ARRAY_SIZE(tas2552_reg_defs),
  577. .cache_type = REGCACHE_RBTREE,
  578. };
  579. static int tas2552_probe(struct i2c_client *client,
  580. const struct i2c_device_id *id)
  581. {
  582. struct device *dev;
  583. struct tas2552_data *data;
  584. int ret;
  585. int i;
  586. dev = &client->dev;
  587. data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
  588. if (data == NULL)
  589. return -ENOMEM;
  590. data->enable_gpio = devm_gpiod_get_optional(dev, "enable",
  591. GPIOD_OUT_LOW);
  592. if (IS_ERR(data->enable_gpio))
  593. return PTR_ERR(data->enable_gpio);
  594. data->tas2552_client = client;
  595. data->regmap = devm_regmap_init_i2c(client, &tas2552_regmap_config);
  596. if (IS_ERR(data->regmap)) {
  597. ret = PTR_ERR(data->regmap);
  598. dev_err(&client->dev, "Failed to allocate register map: %d\n",
  599. ret);
  600. return ret;
  601. }
  602. for (i = 0; i < ARRAY_SIZE(data->supplies); i++)
  603. data->supplies[i].supply = tas2552_supply_names[i];
  604. ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->supplies),
  605. data->supplies);
  606. if (ret != 0) {
  607. dev_err(dev, "Failed to request supplies: %d\n", ret);
  608. return ret;
  609. }
  610. pm_runtime_set_active(&client->dev);
  611. pm_runtime_set_autosuspend_delay(&client->dev, 1000);
  612. pm_runtime_use_autosuspend(&client->dev);
  613. pm_runtime_enable(&client->dev);
  614. pm_runtime_mark_last_busy(&client->dev);
  615. pm_runtime_put_sync_autosuspend(&client->dev);
  616. dev_set_drvdata(&client->dev, data);
  617. ret = devm_snd_soc_register_component(&client->dev,
  618. &soc_component_dev_tas2552,
  619. tas2552_dai, ARRAY_SIZE(tas2552_dai));
  620. if (ret < 0)
  621. dev_err(&client->dev, "Failed to register component: %d\n", ret);
  622. return ret;
  623. }
  624. static int tas2552_i2c_remove(struct i2c_client *client)
  625. {
  626. pm_runtime_disable(&client->dev);
  627. return 0;
  628. }
  629. static const struct i2c_device_id tas2552_id[] = {
  630. { "tas2552", 0 },
  631. { }
  632. };
  633. MODULE_DEVICE_TABLE(i2c, tas2552_id);
  634. #if IS_ENABLED(CONFIG_OF)
  635. static const struct of_device_id tas2552_of_match[] = {
  636. { .compatible = "ti,tas2552", },
  637. {},
  638. };
  639. MODULE_DEVICE_TABLE(of, tas2552_of_match);
  640. #endif
  641. static struct i2c_driver tas2552_i2c_driver = {
  642. .driver = {
  643. .name = "tas2552",
  644. .of_match_table = of_match_ptr(tas2552_of_match),
  645. .pm = &tas2552_pm,
  646. },
  647. .probe = tas2552_probe,
  648. .remove = tas2552_i2c_remove,
  649. .id_table = tas2552_id,
  650. };
  651. module_i2c_driver(tas2552_i2c_driver);
  652. MODULE_AUTHOR("Dan Muprhy <dmurphy@ti.com>");
  653. MODULE_DESCRIPTION("TAS2552 Audio amplifier driver");
  654. MODULE_LICENSE("GPL");