sta529.c 9.7 KB

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  1. /*
  2. * ASoC codec driver for spear platform
  3. *
  4. * sound/soc/codecs/sta529.c -- spear ALSA Soc codec driver
  5. *
  6. * Copyright (C) 2012 ST Microelectronics
  7. * Rajeev Kumar <rajeevkumar.linux@gmail.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/init.h>
  15. #include <linux/i2c.h>
  16. #include <linux/io.h>
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/pm.h>
  20. #include <linux/regmap.h>
  21. #include <linux/slab.h>
  22. #include <sound/core.h>
  23. #include <sound/initval.h>
  24. #include <sound/pcm.h>
  25. #include <sound/pcm_params.h>
  26. #include <sound/soc.h>
  27. #include <sound/soc-dapm.h>
  28. #include <sound/tlv.h>
  29. /* STA529 Register offsets */
  30. #define STA529_FFXCFG0 0x00
  31. #define STA529_FFXCFG1 0x01
  32. #define STA529_MVOL 0x02
  33. #define STA529_LVOL 0x03
  34. #define STA529_RVOL 0x04
  35. #define STA529_TTF0 0x05
  36. #define STA529_TTF1 0x06
  37. #define STA529_TTP0 0x07
  38. #define STA529_TTP1 0x08
  39. #define STA529_S2PCFG0 0x0A
  40. #define STA529_S2PCFG1 0x0B
  41. #define STA529_P2SCFG0 0x0C
  42. #define STA529_P2SCFG1 0x0D
  43. #define STA529_PLLCFG0 0x14
  44. #define STA529_PLLCFG1 0x15
  45. #define STA529_PLLCFG2 0x16
  46. #define STA529_PLLCFG3 0x17
  47. #define STA529_PLLPFE 0x18
  48. #define STA529_PLLST 0x19
  49. #define STA529_ADCCFG 0x1E /*mic_select*/
  50. #define STA529_CKOCFG 0x1F
  51. #define STA529_MISC 0x20
  52. #define STA529_PADST0 0x21
  53. #define STA529_PADST1 0x22
  54. #define STA529_FFXST 0x23
  55. #define STA529_PWMIN1 0x2D
  56. #define STA529_PWMIN2 0x2E
  57. #define STA529_POWST 0x32
  58. #define STA529_MAX_REGISTER 0x32
  59. #define STA529_RATES (SNDRV_PCM_RATE_8000 | \
  60. SNDRV_PCM_RATE_11025 | \
  61. SNDRV_PCM_RATE_16000 | \
  62. SNDRV_PCM_RATE_22050 | \
  63. SNDRV_PCM_RATE_32000 | \
  64. SNDRV_PCM_RATE_44100 | \
  65. SNDRV_PCM_RATE_48000)
  66. #define STA529_FORMAT (SNDRV_PCM_FMTBIT_S16_LE | \
  67. SNDRV_PCM_FMTBIT_S24_LE | \
  68. SNDRV_PCM_FMTBIT_S32_LE)
  69. #define S2PC_VALUE 0x98
  70. #define CLOCK_OUT 0x60
  71. #define DATA_FORMAT_MSK 0x0E
  72. #define LEFT_J_DATA_FORMAT 0x00
  73. #define I2S_DATA_FORMAT 0x02
  74. #define RIGHT_J_DATA_FORMAT 0x04
  75. #define CODEC_MUTE_VAL 0x80
  76. #define POWER_CNTLMSAK 0x40
  77. #define POWER_STDBY 0x40
  78. #define FFX_MASK 0x80
  79. #define FFX_OFF 0x80
  80. #define POWER_UP 0x00
  81. #define FFX_CLK_ENB 0x01
  82. #define FFX_CLK_DIS 0x00
  83. #define FFX_CLK_MSK 0x01
  84. #define PLAY_FREQ_RANGE_MSK 0x70
  85. #define CAP_FREQ_RANGE_MSK 0x0C
  86. #define PDATA_LEN_MSK 0xC0
  87. #define BCLK_TO_FS_MSK 0x30
  88. #define AUDIO_MUTE_MSK 0x80
  89. static const struct reg_default sta529_reg_defaults[] = {
  90. { 0, 0x35 }, /* R0 - FFX Configuration reg 0 */
  91. { 1, 0xc8 }, /* R1 - FFX Configuration reg 1 */
  92. { 2, 0x50 }, /* R2 - Master Volume */
  93. { 3, 0x00 }, /* R3 - Left Volume */
  94. { 4, 0x00 }, /* R4 - Right Volume */
  95. { 10, 0xb2 }, /* R10 - S2P Config Reg 0 */
  96. { 11, 0x41 }, /* R11 - S2P Config Reg 1 */
  97. { 12, 0x92 }, /* R12 - P2S Config Reg 0 */
  98. { 13, 0x41 }, /* R13 - P2S Config Reg 1 */
  99. { 30, 0xd2 }, /* R30 - ADC Config Reg */
  100. { 31, 0x40 }, /* R31 - clock Out Reg */
  101. { 32, 0x21 }, /* R32 - Misc Register */
  102. };
  103. struct sta529 {
  104. struct regmap *regmap;
  105. };
  106. static bool sta529_readable(struct device *dev, unsigned int reg)
  107. {
  108. switch (reg) {
  109. case STA529_FFXCFG0:
  110. case STA529_FFXCFG1:
  111. case STA529_MVOL:
  112. case STA529_LVOL:
  113. case STA529_RVOL:
  114. case STA529_S2PCFG0:
  115. case STA529_S2PCFG1:
  116. case STA529_P2SCFG0:
  117. case STA529_P2SCFG1:
  118. case STA529_ADCCFG:
  119. case STA529_CKOCFG:
  120. case STA529_MISC:
  121. return true;
  122. default:
  123. return false;
  124. }
  125. }
  126. static const char *pwm_mode_text[] = { "Binary", "Headphone", "Ternary",
  127. "Phase-shift"};
  128. static const DECLARE_TLV_DB_SCALE(out_gain_tlv, -9150, 50, 0);
  129. static const DECLARE_TLV_DB_SCALE(master_vol_tlv, -12750, 50, 0);
  130. static SOC_ENUM_SINGLE_DECL(pwm_src, STA529_FFXCFG1, 4, pwm_mode_text);
  131. static const struct snd_kcontrol_new sta529_snd_controls[] = {
  132. SOC_DOUBLE_R_TLV("Digital Playback Volume", STA529_LVOL, STA529_RVOL, 0,
  133. 127, 0, out_gain_tlv),
  134. SOC_SINGLE_TLV("Master Playback Volume", STA529_MVOL, 0, 127, 1,
  135. master_vol_tlv),
  136. SOC_ENUM("PWM Select", pwm_src),
  137. };
  138. static int sta529_set_bias_level(struct snd_soc_component *component, enum
  139. snd_soc_bias_level level)
  140. {
  141. struct sta529 *sta529 = snd_soc_component_get_drvdata(component);
  142. switch (level) {
  143. case SND_SOC_BIAS_ON:
  144. case SND_SOC_BIAS_PREPARE:
  145. snd_soc_component_update_bits(component, STA529_FFXCFG0, POWER_CNTLMSAK,
  146. POWER_UP);
  147. snd_soc_component_update_bits(component, STA529_MISC, FFX_CLK_MSK,
  148. FFX_CLK_ENB);
  149. break;
  150. case SND_SOC_BIAS_STANDBY:
  151. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
  152. regcache_sync(sta529->regmap);
  153. snd_soc_component_update_bits(component, STA529_FFXCFG0,
  154. POWER_CNTLMSAK, POWER_STDBY);
  155. /* Making FFX output to zero */
  156. snd_soc_component_update_bits(component, STA529_FFXCFG0, FFX_MASK,
  157. FFX_OFF);
  158. snd_soc_component_update_bits(component, STA529_MISC, FFX_CLK_MSK,
  159. FFX_CLK_DIS);
  160. break;
  161. case SND_SOC_BIAS_OFF:
  162. break;
  163. }
  164. return 0;
  165. }
  166. static int sta529_hw_params(struct snd_pcm_substream *substream,
  167. struct snd_pcm_hw_params *params,
  168. struct snd_soc_dai *dai)
  169. {
  170. struct snd_soc_component *component = dai->component;
  171. int pdata, play_freq_val, record_freq_val;
  172. int bclk_to_fs_ratio;
  173. switch (params_width(params)) {
  174. case 16:
  175. pdata = 1;
  176. bclk_to_fs_ratio = 0;
  177. break;
  178. case 24:
  179. pdata = 2;
  180. bclk_to_fs_ratio = 1;
  181. break;
  182. case 32:
  183. pdata = 3;
  184. bclk_to_fs_ratio = 2;
  185. break;
  186. default:
  187. dev_err(component->dev, "Unsupported format\n");
  188. return -EINVAL;
  189. }
  190. switch (params_rate(params)) {
  191. case 8000:
  192. case 11025:
  193. play_freq_val = 0;
  194. record_freq_val = 2;
  195. break;
  196. case 16000:
  197. case 22050:
  198. play_freq_val = 1;
  199. record_freq_val = 0;
  200. break;
  201. case 32000:
  202. case 44100:
  203. case 48000:
  204. play_freq_val = 2;
  205. record_freq_val = 0;
  206. break;
  207. default:
  208. dev_err(component->dev, "Unsupported rate\n");
  209. return -EINVAL;
  210. }
  211. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  212. snd_soc_component_update_bits(component, STA529_S2PCFG1, PDATA_LEN_MSK,
  213. pdata << 6);
  214. snd_soc_component_update_bits(component, STA529_S2PCFG1, BCLK_TO_FS_MSK,
  215. bclk_to_fs_ratio << 4);
  216. snd_soc_component_update_bits(component, STA529_MISC, PLAY_FREQ_RANGE_MSK,
  217. play_freq_val << 4);
  218. } else {
  219. snd_soc_component_update_bits(component, STA529_P2SCFG1, PDATA_LEN_MSK,
  220. pdata << 6);
  221. snd_soc_component_update_bits(component, STA529_P2SCFG1, BCLK_TO_FS_MSK,
  222. bclk_to_fs_ratio << 4);
  223. snd_soc_component_update_bits(component, STA529_MISC, CAP_FREQ_RANGE_MSK,
  224. record_freq_val << 2);
  225. }
  226. return 0;
  227. }
  228. static int sta529_mute(struct snd_soc_dai *dai, int mute, int direction)
  229. {
  230. u8 val = 0;
  231. if (mute)
  232. val |= CODEC_MUTE_VAL;
  233. snd_soc_component_update_bits(dai->component, STA529_FFXCFG0, AUDIO_MUTE_MSK, val);
  234. return 0;
  235. }
  236. static int sta529_set_dai_fmt(struct snd_soc_dai *codec_dai, u32 fmt)
  237. {
  238. struct snd_soc_component *component = codec_dai->component;
  239. u8 mode = 0;
  240. /* interface format */
  241. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  242. case SND_SOC_DAIFMT_LEFT_J:
  243. mode = LEFT_J_DATA_FORMAT;
  244. break;
  245. case SND_SOC_DAIFMT_I2S:
  246. mode = I2S_DATA_FORMAT;
  247. break;
  248. case SND_SOC_DAIFMT_RIGHT_J:
  249. mode = RIGHT_J_DATA_FORMAT;
  250. break;
  251. default:
  252. return -EINVAL;
  253. }
  254. snd_soc_component_update_bits(component, STA529_S2PCFG0, DATA_FORMAT_MSK, mode);
  255. return 0;
  256. }
  257. static const struct snd_soc_dai_ops sta529_dai_ops = {
  258. .hw_params = sta529_hw_params,
  259. .set_fmt = sta529_set_dai_fmt,
  260. .mute_stream = sta529_mute,
  261. .no_capture_mute = 1,
  262. };
  263. static struct snd_soc_dai_driver sta529_dai = {
  264. .name = "sta529-audio",
  265. .playback = {
  266. .stream_name = "Playback",
  267. .channels_min = 2,
  268. .channels_max = 2,
  269. .rates = STA529_RATES,
  270. .formats = STA529_FORMAT,
  271. },
  272. .capture = {
  273. .stream_name = "Capture",
  274. .channels_min = 2,
  275. .channels_max = 2,
  276. .rates = STA529_RATES,
  277. .formats = STA529_FORMAT,
  278. },
  279. .ops = &sta529_dai_ops,
  280. };
  281. static const struct snd_soc_component_driver sta529_component_driver = {
  282. .set_bias_level = sta529_set_bias_level,
  283. .controls = sta529_snd_controls,
  284. .num_controls = ARRAY_SIZE(sta529_snd_controls),
  285. .suspend_bias_off = 1,
  286. .idle_bias_on = 1,
  287. .use_pmdown_time = 1,
  288. .endianness = 1,
  289. .non_legacy_dai_naming = 1,
  290. };
  291. static const struct regmap_config sta529_regmap = {
  292. .reg_bits = 8,
  293. .val_bits = 8,
  294. .max_register = STA529_MAX_REGISTER,
  295. .readable_reg = sta529_readable,
  296. .cache_type = REGCACHE_RBTREE,
  297. .reg_defaults = sta529_reg_defaults,
  298. .num_reg_defaults = ARRAY_SIZE(sta529_reg_defaults),
  299. };
  300. static int sta529_i2c_probe(struct i2c_client *i2c,
  301. const struct i2c_device_id *id)
  302. {
  303. struct sta529 *sta529;
  304. int ret;
  305. sta529 = devm_kzalloc(&i2c->dev, sizeof(struct sta529), GFP_KERNEL);
  306. if (!sta529)
  307. return -ENOMEM;
  308. sta529->regmap = devm_regmap_init_i2c(i2c, &sta529_regmap);
  309. if (IS_ERR(sta529->regmap)) {
  310. ret = PTR_ERR(sta529->regmap);
  311. dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret);
  312. return ret;
  313. }
  314. i2c_set_clientdata(i2c, sta529);
  315. ret = devm_snd_soc_register_component(&i2c->dev,
  316. &sta529_component_driver, &sta529_dai, 1);
  317. if (ret != 0)
  318. dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
  319. return ret;
  320. }
  321. static const struct i2c_device_id sta529_i2c_id[] = {
  322. { "sta529", 0 },
  323. { }
  324. };
  325. MODULE_DEVICE_TABLE(i2c, sta529_i2c_id);
  326. static const struct of_device_id sta529_of_match[] = {
  327. { .compatible = "st,sta529", },
  328. { }
  329. };
  330. MODULE_DEVICE_TABLE(of, sta529_of_match);
  331. static struct i2c_driver sta529_i2c_driver = {
  332. .driver = {
  333. .name = "sta529",
  334. .of_match_table = sta529_of_match,
  335. },
  336. .probe = sta529_i2c_probe,
  337. .id_table = sta529_i2c_id,
  338. };
  339. module_i2c_driver(sta529_i2c_driver);
  340. MODULE_DESCRIPTION("ASoC STA529 codec driver");
  341. MODULE_AUTHOR("Rajeev Kumar <rajeevkumar.linux@gmail.com>");
  342. MODULE_LICENSE("GPL");