sta350.c 37 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Codec driver for ST STA350 2.1-channel high-efficiency digital audio system
  4. *
  5. * Copyright: 2014 Raumfeld GmbH
  6. * Author: Sven Brandau <info@brandau.biz>
  7. *
  8. * based on code from:
  9. * Raumfeld GmbH
  10. * Johannes Stezenbach <js@sig21.net>
  11. * Wolfson Microelectronics PLC.
  12. * Mark Brown <broonie@opensource.wolfsonmicro.com>
  13. * Freescale Semiconductor, Inc.
  14. * Timur Tabi <timur@freescale.com>
  15. */
  16. #define pr_fmt(fmt) KBUILD_MODNAME ":%s:%d: " fmt, __func__, __LINE__
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/init.h>
  20. #include <linux/delay.h>
  21. #include <linux/pm.h>
  22. #include <linux/i2c.h>
  23. #include <linux/of_device.h>
  24. #include <linux/of_gpio.h>
  25. #include <linux/regmap.h>
  26. #include <linux/regulator/consumer.h>
  27. #include <linux/gpio/consumer.h>
  28. #include <linux/slab.h>
  29. #include <sound/core.h>
  30. #include <sound/pcm.h>
  31. #include <sound/pcm_params.h>
  32. #include <sound/soc.h>
  33. #include <sound/soc-dapm.h>
  34. #include <sound/initval.h>
  35. #include <sound/tlv.h>
  36. #include <sound/sta350.h>
  37. #include "sta350.h"
  38. #define STA350_RATES (SNDRV_PCM_RATE_32000 | \
  39. SNDRV_PCM_RATE_44100 | \
  40. SNDRV_PCM_RATE_48000 | \
  41. SNDRV_PCM_RATE_88200 | \
  42. SNDRV_PCM_RATE_96000 | \
  43. SNDRV_PCM_RATE_176400 | \
  44. SNDRV_PCM_RATE_192000)
  45. #define STA350_FORMATS \
  46. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
  47. SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
  48. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
  49. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
  50. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE | \
  51. SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE)
  52. /* Power-up register defaults */
  53. static const struct reg_default sta350_regs[] = {
  54. { 0x0, 0x63 },
  55. { 0x1, 0x80 },
  56. { 0x2, 0xdf },
  57. { 0x3, 0x40 },
  58. { 0x4, 0xc2 },
  59. { 0x5, 0x5c },
  60. { 0x6, 0x00 },
  61. { 0x7, 0xff },
  62. { 0x8, 0x60 },
  63. { 0x9, 0x60 },
  64. { 0xa, 0x60 },
  65. { 0xb, 0x00 },
  66. { 0xc, 0x00 },
  67. { 0xd, 0x00 },
  68. { 0xe, 0x00 },
  69. { 0xf, 0x40 },
  70. { 0x10, 0x80 },
  71. { 0x11, 0x77 },
  72. { 0x12, 0x6a },
  73. { 0x13, 0x69 },
  74. { 0x14, 0x6a },
  75. { 0x15, 0x69 },
  76. { 0x16, 0x00 },
  77. { 0x17, 0x00 },
  78. { 0x18, 0x00 },
  79. { 0x19, 0x00 },
  80. { 0x1a, 0x00 },
  81. { 0x1b, 0x00 },
  82. { 0x1c, 0x00 },
  83. { 0x1d, 0x00 },
  84. { 0x1e, 0x00 },
  85. { 0x1f, 0x00 },
  86. { 0x20, 0x00 },
  87. { 0x21, 0x00 },
  88. { 0x22, 0x00 },
  89. { 0x23, 0x00 },
  90. { 0x24, 0x00 },
  91. { 0x25, 0x00 },
  92. { 0x26, 0x00 },
  93. { 0x27, 0x2a },
  94. { 0x28, 0xc0 },
  95. { 0x29, 0xf3 },
  96. { 0x2a, 0x33 },
  97. { 0x2b, 0x00 },
  98. { 0x2c, 0x0c },
  99. { 0x31, 0x00 },
  100. { 0x36, 0x00 },
  101. { 0x37, 0x00 },
  102. { 0x38, 0x00 },
  103. { 0x39, 0x01 },
  104. { 0x3a, 0xee },
  105. { 0x3b, 0xff },
  106. { 0x3c, 0x7e },
  107. { 0x3d, 0xc0 },
  108. { 0x3e, 0x26 },
  109. { 0x3f, 0x00 },
  110. { 0x48, 0x00 },
  111. { 0x49, 0x00 },
  112. { 0x4a, 0x00 },
  113. { 0x4b, 0x04 },
  114. { 0x4c, 0x00 },
  115. };
  116. static const struct regmap_range sta350_write_regs_range[] = {
  117. regmap_reg_range(STA350_CONFA, STA350_AUTO2),
  118. regmap_reg_range(STA350_C1CFG, STA350_FDRC2),
  119. regmap_reg_range(STA350_EQCFG, STA350_EVOLRES),
  120. regmap_reg_range(STA350_NSHAPE, STA350_MISC2),
  121. };
  122. static const struct regmap_range sta350_read_regs_range[] = {
  123. regmap_reg_range(STA350_CONFA, STA350_AUTO2),
  124. regmap_reg_range(STA350_C1CFG, STA350_STATUS),
  125. regmap_reg_range(STA350_EQCFG, STA350_EVOLRES),
  126. regmap_reg_range(STA350_NSHAPE, STA350_MISC2),
  127. };
  128. static const struct regmap_range sta350_volatile_regs_range[] = {
  129. regmap_reg_range(STA350_CFADDR2, STA350_CFUD),
  130. regmap_reg_range(STA350_STATUS, STA350_STATUS),
  131. };
  132. static const struct regmap_access_table sta350_write_regs = {
  133. .yes_ranges = sta350_write_regs_range,
  134. .n_yes_ranges = ARRAY_SIZE(sta350_write_regs_range),
  135. };
  136. static const struct regmap_access_table sta350_read_regs = {
  137. .yes_ranges = sta350_read_regs_range,
  138. .n_yes_ranges = ARRAY_SIZE(sta350_read_regs_range),
  139. };
  140. static const struct regmap_access_table sta350_volatile_regs = {
  141. .yes_ranges = sta350_volatile_regs_range,
  142. .n_yes_ranges = ARRAY_SIZE(sta350_volatile_regs_range),
  143. };
  144. /* regulator power supply names */
  145. static const char * const sta350_supply_names[] = {
  146. "vdd-dig", /* digital supply, 3.3V */
  147. "vdd-pll", /* pll supply, 3.3V */
  148. "vcc" /* power amp supply, 5V - 26V */
  149. };
  150. /* codec private data */
  151. struct sta350_priv {
  152. struct regmap *regmap;
  153. struct regulator_bulk_data supplies[ARRAY_SIZE(sta350_supply_names)];
  154. struct sta350_platform_data *pdata;
  155. unsigned int mclk;
  156. unsigned int format;
  157. u32 coef_shadow[STA350_COEF_COUNT];
  158. int shutdown;
  159. struct gpio_desc *gpiod_nreset;
  160. struct gpio_desc *gpiod_power_down;
  161. struct mutex coeff_lock;
  162. };
  163. static const DECLARE_TLV_DB_SCALE(mvol_tlv, -12750, 50, 1);
  164. static const DECLARE_TLV_DB_SCALE(chvol_tlv, -7950, 50, 1);
  165. static const DECLARE_TLV_DB_SCALE(tone_tlv, -1200, 200, 0);
  166. static const char * const sta350_drc_ac[] = {
  167. "Anti-Clipping", "Dynamic Range Compression"
  168. };
  169. static const char * const sta350_auto_gc_mode[] = {
  170. "User", "AC no clipping", "AC limited clipping (10%)",
  171. "DRC nighttime listening mode"
  172. };
  173. static const char * const sta350_auto_xo_mode[] = {
  174. "User", "80Hz", "100Hz", "120Hz", "140Hz", "160Hz", "180Hz",
  175. "200Hz", "220Hz", "240Hz", "260Hz", "280Hz", "300Hz", "320Hz",
  176. "340Hz", "360Hz"
  177. };
  178. static const char * const sta350_binary_output[] = {
  179. "FFX 3-state output - normal operation", "Binary output"
  180. };
  181. static const char * const sta350_limiter_select[] = {
  182. "Limiter Disabled", "Limiter #1", "Limiter #2"
  183. };
  184. static const char * const sta350_limiter_attack_rate[] = {
  185. "3.1584", "2.7072", "2.2560", "1.8048", "1.3536", "0.9024",
  186. "0.4512", "0.2256", "0.1504", "0.1123", "0.0902", "0.0752",
  187. "0.0645", "0.0564", "0.0501", "0.0451"
  188. };
  189. static const char * const sta350_limiter_release_rate[] = {
  190. "0.5116", "0.1370", "0.0744", "0.0499", "0.0360", "0.0299",
  191. "0.0264", "0.0208", "0.0198", "0.0172", "0.0147", "0.0137",
  192. "0.0134", "0.0117", "0.0110", "0.0104"
  193. };
  194. static const char * const sta350_noise_shaper_type[] = {
  195. "Third order", "Fourth order"
  196. };
  197. static DECLARE_TLV_DB_RANGE(sta350_limiter_ac_attack_tlv,
  198. 0, 7, TLV_DB_SCALE_ITEM(-1200, 200, 0),
  199. 8, 16, TLV_DB_SCALE_ITEM(300, 100, 0),
  200. );
  201. static DECLARE_TLV_DB_RANGE(sta350_limiter_ac_release_tlv,
  202. 0, 0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 0),
  203. 1, 1, TLV_DB_SCALE_ITEM(-2900, 0, 0),
  204. 2, 2, TLV_DB_SCALE_ITEM(-2000, 0, 0),
  205. 3, 8, TLV_DB_SCALE_ITEM(-1400, 200, 0),
  206. 8, 16, TLV_DB_SCALE_ITEM(-700, 100, 0),
  207. );
  208. static DECLARE_TLV_DB_RANGE(sta350_limiter_drc_attack_tlv,
  209. 0, 7, TLV_DB_SCALE_ITEM(-3100, 200, 0),
  210. 8, 13, TLV_DB_SCALE_ITEM(-1600, 100, 0),
  211. 14, 16, TLV_DB_SCALE_ITEM(-1000, 300, 0),
  212. );
  213. static DECLARE_TLV_DB_RANGE(sta350_limiter_drc_release_tlv,
  214. 0, 0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 0),
  215. 1, 2, TLV_DB_SCALE_ITEM(-3800, 200, 0),
  216. 3, 4, TLV_DB_SCALE_ITEM(-3300, 200, 0),
  217. 5, 12, TLV_DB_SCALE_ITEM(-3000, 200, 0),
  218. 13, 16, TLV_DB_SCALE_ITEM(-1500, 300, 0),
  219. );
  220. static SOC_ENUM_SINGLE_DECL(sta350_drc_ac_enum,
  221. STA350_CONFD, STA350_CONFD_DRC_SHIFT,
  222. sta350_drc_ac);
  223. static SOC_ENUM_SINGLE_DECL(sta350_noise_shaper_enum,
  224. STA350_CONFE, STA350_CONFE_NSBW_SHIFT,
  225. sta350_noise_shaper_type);
  226. static SOC_ENUM_SINGLE_DECL(sta350_auto_gc_enum,
  227. STA350_AUTO1, STA350_AUTO1_AMGC_SHIFT,
  228. sta350_auto_gc_mode);
  229. static SOC_ENUM_SINGLE_DECL(sta350_auto_xo_enum,
  230. STA350_AUTO2, STA350_AUTO2_XO_SHIFT,
  231. sta350_auto_xo_mode);
  232. static SOC_ENUM_SINGLE_DECL(sta350_binary_output_ch1_enum,
  233. STA350_C1CFG, STA350_CxCFG_BO_SHIFT,
  234. sta350_binary_output);
  235. static SOC_ENUM_SINGLE_DECL(sta350_binary_output_ch2_enum,
  236. STA350_C2CFG, STA350_CxCFG_BO_SHIFT,
  237. sta350_binary_output);
  238. static SOC_ENUM_SINGLE_DECL(sta350_binary_output_ch3_enum,
  239. STA350_C3CFG, STA350_CxCFG_BO_SHIFT,
  240. sta350_binary_output);
  241. static SOC_ENUM_SINGLE_DECL(sta350_limiter_ch1_enum,
  242. STA350_C1CFG, STA350_CxCFG_LS_SHIFT,
  243. sta350_limiter_select);
  244. static SOC_ENUM_SINGLE_DECL(sta350_limiter_ch2_enum,
  245. STA350_C2CFG, STA350_CxCFG_LS_SHIFT,
  246. sta350_limiter_select);
  247. static SOC_ENUM_SINGLE_DECL(sta350_limiter_ch3_enum,
  248. STA350_C3CFG, STA350_CxCFG_LS_SHIFT,
  249. sta350_limiter_select);
  250. static SOC_ENUM_SINGLE_DECL(sta350_limiter1_attack_rate_enum,
  251. STA350_L1AR, STA350_LxA_SHIFT,
  252. sta350_limiter_attack_rate);
  253. static SOC_ENUM_SINGLE_DECL(sta350_limiter2_attack_rate_enum,
  254. STA350_L2AR, STA350_LxA_SHIFT,
  255. sta350_limiter_attack_rate);
  256. static SOC_ENUM_SINGLE_DECL(sta350_limiter1_release_rate_enum,
  257. STA350_L1AR, STA350_LxR_SHIFT,
  258. sta350_limiter_release_rate);
  259. static SOC_ENUM_SINGLE_DECL(sta350_limiter2_release_rate_enum,
  260. STA350_L2AR, STA350_LxR_SHIFT,
  261. sta350_limiter_release_rate);
  262. /*
  263. * byte array controls for setting biquad, mixer, scaling coefficients;
  264. * for biquads all five coefficients need to be set in one go,
  265. * mixer and pre/postscale coefs can be set individually;
  266. * each coef is 24bit, the bytes are ordered in the same way
  267. * as given in the STA350 data sheet (big endian; b1, b2, a1, a2, b0)
  268. */
  269. static int sta350_coefficient_info(struct snd_kcontrol *kcontrol,
  270. struct snd_ctl_elem_info *uinfo)
  271. {
  272. int numcoef = kcontrol->private_value >> 16;
  273. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  274. uinfo->count = 3 * numcoef;
  275. return 0;
  276. }
  277. static int sta350_coefficient_get(struct snd_kcontrol *kcontrol,
  278. struct snd_ctl_elem_value *ucontrol)
  279. {
  280. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  281. struct sta350_priv *sta350 = snd_soc_component_get_drvdata(component);
  282. int numcoef = kcontrol->private_value >> 16;
  283. int index = kcontrol->private_value & 0xffff;
  284. unsigned int cfud, val;
  285. int i, ret = 0;
  286. mutex_lock(&sta350->coeff_lock);
  287. /* preserve reserved bits in STA350_CFUD */
  288. regmap_read(sta350->regmap, STA350_CFUD, &cfud);
  289. cfud &= 0xf0;
  290. /*
  291. * chip documentation does not say if the bits are self clearing,
  292. * so do it explicitly
  293. */
  294. regmap_write(sta350->regmap, STA350_CFUD, cfud);
  295. regmap_write(sta350->regmap, STA350_CFADDR2, index);
  296. if (numcoef == 1) {
  297. regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x04);
  298. } else if (numcoef == 5) {
  299. regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x08);
  300. } else {
  301. ret = -EINVAL;
  302. goto exit_unlock;
  303. }
  304. for (i = 0; i < 3 * numcoef; i++) {
  305. regmap_read(sta350->regmap, STA350_B1CF1 + i, &val);
  306. ucontrol->value.bytes.data[i] = val;
  307. }
  308. exit_unlock:
  309. mutex_unlock(&sta350->coeff_lock);
  310. return ret;
  311. }
  312. static int sta350_coefficient_put(struct snd_kcontrol *kcontrol,
  313. struct snd_ctl_elem_value *ucontrol)
  314. {
  315. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  316. struct sta350_priv *sta350 = snd_soc_component_get_drvdata(component);
  317. int numcoef = kcontrol->private_value >> 16;
  318. int index = kcontrol->private_value & 0xffff;
  319. unsigned int cfud;
  320. int i;
  321. /* preserve reserved bits in STA350_CFUD */
  322. regmap_read(sta350->regmap, STA350_CFUD, &cfud);
  323. cfud &= 0xf0;
  324. /*
  325. * chip documentation does not say if the bits are self clearing,
  326. * so do it explicitly
  327. */
  328. regmap_write(sta350->regmap, STA350_CFUD, cfud);
  329. regmap_write(sta350->regmap, STA350_CFADDR2, index);
  330. for (i = 0; i < numcoef && (index + i < STA350_COEF_COUNT); i++)
  331. sta350->coef_shadow[index + i] =
  332. (ucontrol->value.bytes.data[3 * i] << 16)
  333. | (ucontrol->value.bytes.data[3 * i + 1] << 8)
  334. | (ucontrol->value.bytes.data[3 * i + 2]);
  335. for (i = 0; i < 3 * numcoef; i++)
  336. regmap_write(sta350->regmap, STA350_B1CF1 + i,
  337. ucontrol->value.bytes.data[i]);
  338. if (numcoef == 1)
  339. regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x01);
  340. else if (numcoef == 5)
  341. regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x02);
  342. else
  343. return -EINVAL;
  344. return 0;
  345. }
  346. static int sta350_sync_coef_shadow(struct snd_soc_component *component)
  347. {
  348. struct sta350_priv *sta350 = snd_soc_component_get_drvdata(component);
  349. unsigned int cfud;
  350. int i;
  351. /* preserve reserved bits in STA350_CFUD */
  352. regmap_read(sta350->regmap, STA350_CFUD, &cfud);
  353. cfud &= 0xf0;
  354. for (i = 0; i < STA350_COEF_COUNT; i++) {
  355. regmap_write(sta350->regmap, STA350_CFADDR2, i);
  356. regmap_write(sta350->regmap, STA350_B1CF1,
  357. (sta350->coef_shadow[i] >> 16) & 0xff);
  358. regmap_write(sta350->regmap, STA350_B1CF2,
  359. (sta350->coef_shadow[i] >> 8) & 0xff);
  360. regmap_write(sta350->regmap, STA350_B1CF3,
  361. (sta350->coef_shadow[i]) & 0xff);
  362. /*
  363. * chip documentation does not say if the bits are
  364. * self-clearing, so do it explicitly
  365. */
  366. regmap_write(sta350->regmap, STA350_CFUD, cfud);
  367. regmap_write(sta350->regmap, STA350_CFUD, cfud | 0x01);
  368. }
  369. return 0;
  370. }
  371. static int sta350_cache_sync(struct snd_soc_component *component)
  372. {
  373. struct sta350_priv *sta350 = snd_soc_component_get_drvdata(component);
  374. unsigned int mute;
  375. int rc;
  376. /* mute during register sync */
  377. regmap_read(sta350->regmap, STA350_CFUD, &mute);
  378. regmap_write(sta350->regmap, STA350_MMUTE, mute | STA350_MMUTE_MMUTE);
  379. sta350_sync_coef_shadow(component);
  380. rc = regcache_sync(sta350->regmap);
  381. regmap_write(sta350->regmap, STA350_MMUTE, mute);
  382. return rc;
  383. }
  384. #define SINGLE_COEF(xname, index) \
  385. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  386. .info = sta350_coefficient_info, \
  387. .get = sta350_coefficient_get,\
  388. .put = sta350_coefficient_put, \
  389. .private_value = index | (1 << 16) }
  390. #define BIQUAD_COEFS(xname, index) \
  391. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  392. .info = sta350_coefficient_info, \
  393. .get = sta350_coefficient_get,\
  394. .put = sta350_coefficient_put, \
  395. .private_value = index | (5 << 16) }
  396. static const struct snd_kcontrol_new sta350_snd_controls[] = {
  397. SOC_SINGLE_TLV("Master Volume", STA350_MVOL, 0, 0xff, 1, mvol_tlv),
  398. /* VOL */
  399. SOC_SINGLE_TLV("Ch1 Volume", STA350_C1VOL, 0, 0xff, 1, chvol_tlv),
  400. SOC_SINGLE_TLV("Ch2 Volume", STA350_C2VOL, 0, 0xff, 1, chvol_tlv),
  401. SOC_SINGLE_TLV("Ch3 Volume", STA350_C3VOL, 0, 0xff, 1, chvol_tlv),
  402. /* CONFD */
  403. SOC_SINGLE("High Pass Filter Bypass Switch",
  404. STA350_CONFD, STA350_CONFD_HPB_SHIFT, 1, 1),
  405. SOC_SINGLE("De-emphasis Filter Switch",
  406. STA350_CONFD, STA350_CONFD_DEMP_SHIFT, 1, 0),
  407. SOC_SINGLE("DSP Bypass Switch",
  408. STA350_CONFD, STA350_CONFD_DSPB_SHIFT, 1, 0),
  409. SOC_SINGLE("Post-scale Link Switch",
  410. STA350_CONFD, STA350_CONFD_PSL_SHIFT, 1, 0),
  411. SOC_SINGLE("Biquad Coefficient Link Switch",
  412. STA350_CONFD, STA350_CONFD_BQL_SHIFT, 1, 0),
  413. SOC_ENUM("Compressor/Limiter Switch", sta350_drc_ac_enum),
  414. SOC_ENUM("Noise Shaper Bandwidth", sta350_noise_shaper_enum),
  415. SOC_SINGLE("Zero-detect Mute Enable Switch",
  416. STA350_CONFD, STA350_CONFD_ZDE_SHIFT, 1, 0),
  417. SOC_SINGLE("Submix Mode Switch",
  418. STA350_CONFD, STA350_CONFD_SME_SHIFT, 1, 0),
  419. /* CONFE */
  420. SOC_SINGLE("Zero Cross Switch", STA350_CONFE, STA350_CONFE_ZCE_SHIFT, 1, 0),
  421. SOC_SINGLE("Soft Ramp Switch", STA350_CONFE, STA350_CONFE_SVE_SHIFT, 1, 0),
  422. /* MUTE */
  423. SOC_SINGLE("Master Switch", STA350_MMUTE, STA350_MMUTE_MMUTE_SHIFT, 1, 1),
  424. SOC_SINGLE("Ch1 Switch", STA350_MMUTE, STA350_MMUTE_C1M_SHIFT, 1, 1),
  425. SOC_SINGLE("Ch2 Switch", STA350_MMUTE, STA350_MMUTE_C2M_SHIFT, 1, 1),
  426. SOC_SINGLE("Ch3 Switch", STA350_MMUTE, STA350_MMUTE_C3M_SHIFT, 1, 1),
  427. /* AUTOx */
  428. SOC_ENUM("Automode GC", sta350_auto_gc_enum),
  429. SOC_ENUM("Automode XO", sta350_auto_xo_enum),
  430. /* CxCFG */
  431. SOC_SINGLE("Ch1 Tone Control Bypass Switch",
  432. STA350_C1CFG, STA350_CxCFG_TCB_SHIFT, 1, 0),
  433. SOC_SINGLE("Ch2 Tone Control Bypass Switch",
  434. STA350_C2CFG, STA350_CxCFG_TCB_SHIFT, 1, 0),
  435. SOC_SINGLE("Ch1 EQ Bypass Switch",
  436. STA350_C1CFG, STA350_CxCFG_EQBP_SHIFT, 1, 0),
  437. SOC_SINGLE("Ch2 EQ Bypass Switch",
  438. STA350_C2CFG, STA350_CxCFG_EQBP_SHIFT, 1, 0),
  439. SOC_SINGLE("Ch1 Master Volume Bypass Switch",
  440. STA350_C1CFG, STA350_CxCFG_VBP_SHIFT, 1, 0),
  441. SOC_SINGLE("Ch2 Master Volume Bypass Switch",
  442. STA350_C1CFG, STA350_CxCFG_VBP_SHIFT, 1, 0),
  443. SOC_SINGLE("Ch3 Master Volume Bypass Switch",
  444. STA350_C1CFG, STA350_CxCFG_VBP_SHIFT, 1, 0),
  445. SOC_ENUM("Ch1 Binary Output Select", sta350_binary_output_ch1_enum),
  446. SOC_ENUM("Ch2 Binary Output Select", sta350_binary_output_ch2_enum),
  447. SOC_ENUM("Ch3 Binary Output Select", sta350_binary_output_ch3_enum),
  448. SOC_ENUM("Ch1 Limiter Select", sta350_limiter_ch1_enum),
  449. SOC_ENUM("Ch2 Limiter Select", sta350_limiter_ch2_enum),
  450. SOC_ENUM("Ch3 Limiter Select", sta350_limiter_ch3_enum),
  451. /* TONE */
  452. SOC_SINGLE_RANGE_TLV("Bass Tone Control Volume",
  453. STA350_TONE, STA350_TONE_BTC_SHIFT, 1, 13, 0, tone_tlv),
  454. SOC_SINGLE_RANGE_TLV("Treble Tone Control Volume",
  455. STA350_TONE, STA350_TONE_TTC_SHIFT, 1, 13, 0, tone_tlv),
  456. SOC_ENUM("Limiter1 Attack Rate (dB/ms)", sta350_limiter1_attack_rate_enum),
  457. SOC_ENUM("Limiter2 Attack Rate (dB/ms)", sta350_limiter2_attack_rate_enum),
  458. SOC_ENUM("Limiter1 Release Rate (dB/ms)", sta350_limiter1_release_rate_enum),
  459. SOC_ENUM("Limiter2 Release Rate (dB/ms)", sta350_limiter2_release_rate_enum),
  460. /*
  461. * depending on mode, the attack/release thresholds have
  462. * two different enum definitions; provide both
  463. */
  464. SOC_SINGLE_TLV("Limiter1 Attack Threshold (AC Mode)",
  465. STA350_L1ATRT, STA350_LxA_SHIFT,
  466. 16, 0, sta350_limiter_ac_attack_tlv),
  467. SOC_SINGLE_TLV("Limiter2 Attack Threshold (AC Mode)",
  468. STA350_L2ATRT, STA350_LxA_SHIFT,
  469. 16, 0, sta350_limiter_ac_attack_tlv),
  470. SOC_SINGLE_TLV("Limiter1 Release Threshold (AC Mode)",
  471. STA350_L1ATRT, STA350_LxR_SHIFT,
  472. 16, 0, sta350_limiter_ac_release_tlv),
  473. SOC_SINGLE_TLV("Limiter2 Release Threshold (AC Mode)",
  474. STA350_L2ATRT, STA350_LxR_SHIFT,
  475. 16, 0, sta350_limiter_ac_release_tlv),
  476. SOC_SINGLE_TLV("Limiter1 Attack Threshold (DRC Mode)",
  477. STA350_L1ATRT, STA350_LxA_SHIFT,
  478. 16, 0, sta350_limiter_drc_attack_tlv),
  479. SOC_SINGLE_TLV("Limiter2 Attack Threshold (DRC Mode)",
  480. STA350_L2ATRT, STA350_LxA_SHIFT,
  481. 16, 0, sta350_limiter_drc_attack_tlv),
  482. SOC_SINGLE_TLV("Limiter1 Release Threshold (DRC Mode)",
  483. STA350_L1ATRT, STA350_LxR_SHIFT,
  484. 16, 0, sta350_limiter_drc_release_tlv),
  485. SOC_SINGLE_TLV("Limiter2 Release Threshold (DRC Mode)",
  486. STA350_L2ATRT, STA350_LxR_SHIFT,
  487. 16, 0, sta350_limiter_drc_release_tlv),
  488. BIQUAD_COEFS("Ch1 - Biquad 1", 0),
  489. BIQUAD_COEFS("Ch1 - Biquad 2", 5),
  490. BIQUAD_COEFS("Ch1 - Biquad 3", 10),
  491. BIQUAD_COEFS("Ch1 - Biquad 4", 15),
  492. BIQUAD_COEFS("Ch2 - Biquad 1", 20),
  493. BIQUAD_COEFS("Ch2 - Biquad 2", 25),
  494. BIQUAD_COEFS("Ch2 - Biquad 3", 30),
  495. BIQUAD_COEFS("Ch2 - Biquad 4", 35),
  496. BIQUAD_COEFS("High-pass", 40),
  497. BIQUAD_COEFS("Low-pass", 45),
  498. SINGLE_COEF("Ch1 - Prescale", 50),
  499. SINGLE_COEF("Ch2 - Prescale", 51),
  500. SINGLE_COEF("Ch1 - Postscale", 52),
  501. SINGLE_COEF("Ch2 - Postscale", 53),
  502. SINGLE_COEF("Ch3 - Postscale", 54),
  503. SINGLE_COEF("Thermal warning - Postscale", 55),
  504. SINGLE_COEF("Ch1 - Mix 1", 56),
  505. SINGLE_COEF("Ch1 - Mix 2", 57),
  506. SINGLE_COEF("Ch2 - Mix 1", 58),
  507. SINGLE_COEF("Ch2 - Mix 2", 59),
  508. SINGLE_COEF("Ch3 - Mix 1", 60),
  509. SINGLE_COEF("Ch3 - Mix 2", 61),
  510. };
  511. static const struct snd_soc_dapm_widget sta350_dapm_widgets[] = {
  512. SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
  513. SND_SOC_DAPM_OUTPUT("LEFT"),
  514. SND_SOC_DAPM_OUTPUT("RIGHT"),
  515. SND_SOC_DAPM_OUTPUT("SUB"),
  516. };
  517. static const struct snd_soc_dapm_route sta350_dapm_routes[] = {
  518. { "LEFT", NULL, "DAC" },
  519. { "RIGHT", NULL, "DAC" },
  520. { "SUB", NULL, "DAC" },
  521. { "DAC", NULL, "Playback" },
  522. };
  523. /* MCLK interpolation ratio per fs */
  524. static struct {
  525. int fs;
  526. int ir;
  527. } interpolation_ratios[] = {
  528. { 32000, 0 },
  529. { 44100, 0 },
  530. { 48000, 0 },
  531. { 88200, 1 },
  532. { 96000, 1 },
  533. { 176400, 2 },
  534. { 192000, 2 },
  535. };
  536. /* MCLK to fs clock ratios */
  537. static int mcs_ratio_table[3][6] = {
  538. { 768, 512, 384, 256, 128, 576 },
  539. { 384, 256, 192, 128, 64, 0 },
  540. { 192, 128, 96, 64, 32, 0 },
  541. };
  542. /**
  543. * sta350_set_dai_sysclk - configure MCLK
  544. * @codec_dai: the codec DAI
  545. * @clk_id: the clock ID (ignored)
  546. * @freq: the MCLK input frequency
  547. * @dir: the clock direction (ignored)
  548. *
  549. * The value of MCLK is used to determine which sample rates are supported
  550. * by the STA350, based on the mcs_ratio_table.
  551. *
  552. * This function must be called by the machine driver's 'startup' function,
  553. * otherwise the list of supported sample rates will not be available in
  554. * time for ALSA.
  555. */
  556. static int sta350_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  557. int clk_id, unsigned int freq, int dir)
  558. {
  559. struct snd_soc_component *component = codec_dai->component;
  560. struct sta350_priv *sta350 = snd_soc_component_get_drvdata(component);
  561. dev_dbg(component->dev, "mclk=%u\n", freq);
  562. sta350->mclk = freq;
  563. return 0;
  564. }
  565. /**
  566. * sta350_set_dai_fmt - configure the codec for the selected audio format
  567. * @codec_dai: the codec DAI
  568. * @fmt: a SND_SOC_DAIFMT_x value indicating the data format
  569. *
  570. * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
  571. * codec accordingly.
  572. */
  573. static int sta350_set_dai_fmt(struct snd_soc_dai *codec_dai,
  574. unsigned int fmt)
  575. {
  576. struct snd_soc_component *component = codec_dai->component;
  577. struct sta350_priv *sta350 = snd_soc_component_get_drvdata(component);
  578. unsigned int confb = 0;
  579. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  580. case SND_SOC_DAIFMT_CBS_CFS:
  581. break;
  582. default:
  583. return -EINVAL;
  584. }
  585. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  586. case SND_SOC_DAIFMT_I2S:
  587. case SND_SOC_DAIFMT_RIGHT_J:
  588. case SND_SOC_DAIFMT_LEFT_J:
  589. sta350->format = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
  590. break;
  591. default:
  592. return -EINVAL;
  593. }
  594. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  595. case SND_SOC_DAIFMT_NB_NF:
  596. confb |= STA350_CONFB_C2IM;
  597. break;
  598. case SND_SOC_DAIFMT_NB_IF:
  599. confb |= STA350_CONFB_C1IM;
  600. break;
  601. default:
  602. return -EINVAL;
  603. }
  604. return regmap_update_bits(sta350->regmap, STA350_CONFB,
  605. STA350_CONFB_C1IM | STA350_CONFB_C2IM, confb);
  606. }
  607. /**
  608. * sta350_hw_params - program the STA350 with the given hardware parameters.
  609. * @substream: the audio stream
  610. * @params: the hardware parameters to set
  611. * @dai: the SOC DAI (ignored)
  612. *
  613. * This function programs the hardware with the values provided.
  614. * Specifically, the sample rate and the data format.
  615. */
  616. static int sta350_hw_params(struct snd_pcm_substream *substream,
  617. struct snd_pcm_hw_params *params,
  618. struct snd_soc_dai *dai)
  619. {
  620. struct snd_soc_component *component = dai->component;
  621. struct sta350_priv *sta350 = snd_soc_component_get_drvdata(component);
  622. int i, mcs = -EINVAL, ir = -EINVAL;
  623. unsigned int confa, confb;
  624. unsigned int rate, ratio;
  625. int ret;
  626. if (!sta350->mclk) {
  627. dev_err(component->dev,
  628. "sta350->mclk is unset. Unable to determine ratio\n");
  629. return -EIO;
  630. }
  631. rate = params_rate(params);
  632. ratio = sta350->mclk / rate;
  633. dev_dbg(component->dev, "rate: %u, ratio: %u\n", rate, ratio);
  634. for (i = 0; i < ARRAY_SIZE(interpolation_ratios); i++) {
  635. if (interpolation_ratios[i].fs == rate) {
  636. ir = interpolation_ratios[i].ir;
  637. break;
  638. }
  639. }
  640. if (ir < 0) {
  641. dev_err(component->dev, "Unsupported samplerate: %u\n", rate);
  642. return -EINVAL;
  643. }
  644. for (i = 0; i < 6; i++) {
  645. if (mcs_ratio_table[ir][i] == ratio) {
  646. mcs = i;
  647. break;
  648. }
  649. }
  650. if (mcs < 0) {
  651. dev_err(component->dev, "Unresolvable ratio: %u\n", ratio);
  652. return -EINVAL;
  653. }
  654. confa = (ir << STA350_CONFA_IR_SHIFT) |
  655. (mcs << STA350_CONFA_MCS_SHIFT);
  656. confb = 0;
  657. switch (params_width(params)) {
  658. case 24:
  659. dev_dbg(component->dev, "24bit\n");
  660. fallthrough;
  661. case 32:
  662. dev_dbg(component->dev, "24bit or 32bit\n");
  663. switch (sta350->format) {
  664. case SND_SOC_DAIFMT_I2S:
  665. confb |= 0x0;
  666. break;
  667. case SND_SOC_DAIFMT_LEFT_J:
  668. confb |= 0x1;
  669. break;
  670. case SND_SOC_DAIFMT_RIGHT_J:
  671. confb |= 0x2;
  672. break;
  673. }
  674. break;
  675. case 20:
  676. dev_dbg(component->dev, "20bit\n");
  677. switch (sta350->format) {
  678. case SND_SOC_DAIFMT_I2S:
  679. confb |= 0x4;
  680. break;
  681. case SND_SOC_DAIFMT_LEFT_J:
  682. confb |= 0x5;
  683. break;
  684. case SND_SOC_DAIFMT_RIGHT_J:
  685. confb |= 0x6;
  686. break;
  687. }
  688. break;
  689. case 18:
  690. dev_dbg(component->dev, "18bit\n");
  691. switch (sta350->format) {
  692. case SND_SOC_DAIFMT_I2S:
  693. confb |= 0x8;
  694. break;
  695. case SND_SOC_DAIFMT_LEFT_J:
  696. confb |= 0x9;
  697. break;
  698. case SND_SOC_DAIFMT_RIGHT_J:
  699. confb |= 0xa;
  700. break;
  701. }
  702. break;
  703. case 16:
  704. dev_dbg(component->dev, "16bit\n");
  705. switch (sta350->format) {
  706. case SND_SOC_DAIFMT_I2S:
  707. confb |= 0x0;
  708. break;
  709. case SND_SOC_DAIFMT_LEFT_J:
  710. confb |= 0xd;
  711. break;
  712. case SND_SOC_DAIFMT_RIGHT_J:
  713. confb |= 0xe;
  714. break;
  715. }
  716. break;
  717. default:
  718. return -EINVAL;
  719. }
  720. ret = regmap_update_bits(sta350->regmap, STA350_CONFA,
  721. STA350_CONFA_MCS_MASK | STA350_CONFA_IR_MASK,
  722. confa);
  723. if (ret < 0)
  724. return ret;
  725. ret = regmap_update_bits(sta350->regmap, STA350_CONFB,
  726. STA350_CONFB_SAI_MASK | STA350_CONFB_SAIFB,
  727. confb);
  728. if (ret < 0)
  729. return ret;
  730. return 0;
  731. }
  732. static int sta350_startup_sequence(struct sta350_priv *sta350)
  733. {
  734. if (sta350->gpiod_power_down)
  735. gpiod_set_value(sta350->gpiod_power_down, 1);
  736. if (sta350->gpiod_nreset) {
  737. gpiod_set_value(sta350->gpiod_nreset, 0);
  738. mdelay(1);
  739. gpiod_set_value(sta350->gpiod_nreset, 1);
  740. mdelay(1);
  741. }
  742. return 0;
  743. }
  744. /**
  745. * sta350_set_bias_level - DAPM callback
  746. * @component: the component device
  747. * @level: DAPM power level
  748. *
  749. * This is called by ALSA to put the component into low power mode
  750. * or to wake it up. If the component is powered off completely
  751. * all registers must be restored after power on.
  752. */
  753. static int sta350_set_bias_level(struct snd_soc_component *component,
  754. enum snd_soc_bias_level level)
  755. {
  756. struct sta350_priv *sta350 = snd_soc_component_get_drvdata(component);
  757. int ret;
  758. dev_dbg(component->dev, "level = %d\n", level);
  759. switch (level) {
  760. case SND_SOC_BIAS_ON:
  761. break;
  762. case SND_SOC_BIAS_PREPARE:
  763. /* Full power on */
  764. regmap_update_bits(sta350->regmap, STA350_CONFF,
  765. STA350_CONFF_PWDN | STA350_CONFF_EAPD,
  766. STA350_CONFF_PWDN | STA350_CONFF_EAPD);
  767. break;
  768. case SND_SOC_BIAS_STANDBY:
  769. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  770. ret = regulator_bulk_enable(
  771. ARRAY_SIZE(sta350->supplies),
  772. sta350->supplies);
  773. if (ret < 0) {
  774. dev_err(component->dev,
  775. "Failed to enable supplies: %d\n",
  776. ret);
  777. return ret;
  778. }
  779. sta350_startup_sequence(sta350);
  780. sta350_cache_sync(component);
  781. }
  782. /* Power down */
  783. regmap_update_bits(sta350->regmap, STA350_CONFF,
  784. STA350_CONFF_PWDN | STA350_CONFF_EAPD,
  785. 0);
  786. break;
  787. case SND_SOC_BIAS_OFF:
  788. /* The chip runs through the power down sequence for us */
  789. regmap_update_bits(sta350->regmap, STA350_CONFF,
  790. STA350_CONFF_PWDN | STA350_CONFF_EAPD, 0);
  791. /* power down: low */
  792. if (sta350->gpiod_power_down)
  793. gpiod_set_value(sta350->gpiod_power_down, 0);
  794. if (sta350->gpiod_nreset)
  795. gpiod_set_value(sta350->gpiod_nreset, 0);
  796. regulator_bulk_disable(ARRAY_SIZE(sta350->supplies),
  797. sta350->supplies);
  798. break;
  799. }
  800. return 0;
  801. }
  802. static const struct snd_soc_dai_ops sta350_dai_ops = {
  803. .hw_params = sta350_hw_params,
  804. .set_sysclk = sta350_set_dai_sysclk,
  805. .set_fmt = sta350_set_dai_fmt,
  806. };
  807. static struct snd_soc_dai_driver sta350_dai = {
  808. .name = "sta350-hifi",
  809. .playback = {
  810. .stream_name = "Playback",
  811. .channels_min = 2,
  812. .channels_max = 2,
  813. .rates = STA350_RATES,
  814. .formats = STA350_FORMATS,
  815. },
  816. .ops = &sta350_dai_ops,
  817. };
  818. static int sta350_probe(struct snd_soc_component *component)
  819. {
  820. struct sta350_priv *sta350 = snd_soc_component_get_drvdata(component);
  821. struct sta350_platform_data *pdata = sta350->pdata;
  822. int i, ret = 0, thermal = 0;
  823. ret = regulator_bulk_enable(ARRAY_SIZE(sta350->supplies),
  824. sta350->supplies);
  825. if (ret < 0) {
  826. dev_err(component->dev, "Failed to enable supplies: %d\n", ret);
  827. return ret;
  828. }
  829. ret = sta350_startup_sequence(sta350);
  830. if (ret < 0) {
  831. dev_err(component->dev, "Failed to startup device\n");
  832. return ret;
  833. }
  834. /* CONFA */
  835. if (!pdata->thermal_warning_recovery)
  836. thermal |= STA350_CONFA_TWAB;
  837. if (!pdata->thermal_warning_adjustment)
  838. thermal |= STA350_CONFA_TWRB;
  839. if (!pdata->fault_detect_recovery)
  840. thermal |= STA350_CONFA_FDRB;
  841. regmap_update_bits(sta350->regmap, STA350_CONFA,
  842. STA350_CONFA_TWAB | STA350_CONFA_TWRB |
  843. STA350_CONFA_FDRB,
  844. thermal);
  845. /* CONFC */
  846. regmap_update_bits(sta350->regmap, STA350_CONFC,
  847. STA350_CONFC_OM_MASK,
  848. pdata->ffx_power_output_mode
  849. << STA350_CONFC_OM_SHIFT);
  850. regmap_update_bits(sta350->regmap, STA350_CONFC,
  851. STA350_CONFC_CSZ_MASK,
  852. pdata->drop_compensation_ns
  853. << STA350_CONFC_CSZ_SHIFT);
  854. regmap_update_bits(sta350->regmap,
  855. STA350_CONFC,
  856. STA350_CONFC_OCRB,
  857. pdata->oc_warning_adjustment ?
  858. STA350_CONFC_OCRB : 0);
  859. /* CONFE */
  860. regmap_update_bits(sta350->regmap, STA350_CONFE,
  861. STA350_CONFE_MPCV,
  862. pdata->max_power_use_mpcc ?
  863. STA350_CONFE_MPCV : 0);
  864. regmap_update_bits(sta350->regmap, STA350_CONFE,
  865. STA350_CONFE_MPC,
  866. pdata->max_power_correction ?
  867. STA350_CONFE_MPC : 0);
  868. regmap_update_bits(sta350->regmap, STA350_CONFE,
  869. STA350_CONFE_AME,
  870. pdata->am_reduction_mode ?
  871. STA350_CONFE_AME : 0);
  872. regmap_update_bits(sta350->regmap, STA350_CONFE,
  873. STA350_CONFE_PWMS,
  874. pdata->odd_pwm_speed_mode ?
  875. STA350_CONFE_PWMS : 0);
  876. regmap_update_bits(sta350->regmap, STA350_CONFE,
  877. STA350_CONFE_DCCV,
  878. pdata->distortion_compensation ?
  879. STA350_CONFE_DCCV : 0);
  880. /* CONFF */
  881. regmap_update_bits(sta350->regmap, STA350_CONFF,
  882. STA350_CONFF_IDE,
  883. pdata->invalid_input_detect_mute ?
  884. STA350_CONFF_IDE : 0);
  885. regmap_update_bits(sta350->regmap, STA350_CONFF,
  886. STA350_CONFF_OCFG_MASK,
  887. pdata->output_conf
  888. << STA350_CONFF_OCFG_SHIFT);
  889. /* channel to output mapping */
  890. regmap_update_bits(sta350->regmap, STA350_C1CFG,
  891. STA350_CxCFG_OM_MASK,
  892. pdata->ch1_output_mapping
  893. << STA350_CxCFG_OM_SHIFT);
  894. regmap_update_bits(sta350->regmap, STA350_C2CFG,
  895. STA350_CxCFG_OM_MASK,
  896. pdata->ch2_output_mapping
  897. << STA350_CxCFG_OM_SHIFT);
  898. regmap_update_bits(sta350->regmap, STA350_C3CFG,
  899. STA350_CxCFG_OM_MASK,
  900. pdata->ch3_output_mapping
  901. << STA350_CxCFG_OM_SHIFT);
  902. /* miscellaneous registers */
  903. regmap_update_bits(sta350->regmap, STA350_MISC1,
  904. STA350_MISC1_CPWMEN,
  905. pdata->activate_mute_output ?
  906. STA350_MISC1_CPWMEN : 0);
  907. regmap_update_bits(sta350->regmap, STA350_MISC1,
  908. STA350_MISC1_BRIDGOFF,
  909. pdata->bridge_immediate_off ?
  910. STA350_MISC1_BRIDGOFF : 0);
  911. regmap_update_bits(sta350->regmap, STA350_MISC1,
  912. STA350_MISC1_NSHHPEN,
  913. pdata->noise_shape_dc_cut ?
  914. STA350_MISC1_NSHHPEN : 0);
  915. regmap_update_bits(sta350->regmap, STA350_MISC1,
  916. STA350_MISC1_RPDNEN,
  917. pdata->powerdown_master_vol ?
  918. STA350_MISC1_RPDNEN: 0);
  919. regmap_update_bits(sta350->regmap, STA350_MISC2,
  920. STA350_MISC2_PNDLSL_MASK,
  921. pdata->powerdown_delay_divider
  922. << STA350_MISC2_PNDLSL_SHIFT);
  923. /* initialize coefficient shadow RAM with reset values */
  924. for (i = 4; i <= 49; i += 5)
  925. sta350->coef_shadow[i] = 0x400000;
  926. for (i = 50; i <= 54; i++)
  927. sta350->coef_shadow[i] = 0x7fffff;
  928. sta350->coef_shadow[55] = 0x5a9df7;
  929. sta350->coef_shadow[56] = 0x7fffff;
  930. sta350->coef_shadow[59] = 0x7fffff;
  931. sta350->coef_shadow[60] = 0x400000;
  932. sta350->coef_shadow[61] = 0x400000;
  933. snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
  934. /* Bias level configuration will have done an extra enable */
  935. regulator_bulk_disable(ARRAY_SIZE(sta350->supplies), sta350->supplies);
  936. return 0;
  937. }
  938. static void sta350_remove(struct snd_soc_component *component)
  939. {
  940. struct sta350_priv *sta350 = snd_soc_component_get_drvdata(component);
  941. regulator_bulk_disable(ARRAY_SIZE(sta350->supplies), sta350->supplies);
  942. }
  943. static const struct snd_soc_component_driver sta350_component = {
  944. .probe = sta350_probe,
  945. .remove = sta350_remove,
  946. .set_bias_level = sta350_set_bias_level,
  947. .controls = sta350_snd_controls,
  948. .num_controls = ARRAY_SIZE(sta350_snd_controls),
  949. .dapm_widgets = sta350_dapm_widgets,
  950. .num_dapm_widgets = ARRAY_SIZE(sta350_dapm_widgets),
  951. .dapm_routes = sta350_dapm_routes,
  952. .num_dapm_routes = ARRAY_SIZE(sta350_dapm_routes),
  953. .suspend_bias_off = 1,
  954. .idle_bias_on = 1,
  955. .use_pmdown_time = 1,
  956. .endianness = 1,
  957. .non_legacy_dai_naming = 1,
  958. };
  959. static const struct regmap_config sta350_regmap = {
  960. .reg_bits = 8,
  961. .val_bits = 8,
  962. .max_register = STA350_MISC2,
  963. .reg_defaults = sta350_regs,
  964. .num_reg_defaults = ARRAY_SIZE(sta350_regs),
  965. .cache_type = REGCACHE_RBTREE,
  966. .wr_table = &sta350_write_regs,
  967. .rd_table = &sta350_read_regs,
  968. .volatile_table = &sta350_volatile_regs,
  969. };
  970. #ifdef CONFIG_OF
  971. static const struct of_device_id st350_dt_ids[] = {
  972. { .compatible = "st,sta350", },
  973. { }
  974. };
  975. MODULE_DEVICE_TABLE(of, st350_dt_ids);
  976. static const char * const sta350_ffx_modes[] = {
  977. [STA350_FFX_PM_DROP_COMP] = "drop-compensation",
  978. [STA350_FFX_PM_TAPERED_COMP] = "tapered-compensation",
  979. [STA350_FFX_PM_FULL_POWER] = "full-power-mode",
  980. [STA350_FFX_PM_VARIABLE_DROP_COMP] = "variable-drop-compensation",
  981. };
  982. static int sta350_probe_dt(struct device *dev, struct sta350_priv *sta350)
  983. {
  984. struct device_node *np = dev->of_node;
  985. struct sta350_platform_data *pdata;
  986. const char *ffx_power_mode;
  987. u16 tmp;
  988. u8 tmp8;
  989. pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
  990. if (!pdata)
  991. return -ENOMEM;
  992. of_property_read_u8(np, "st,output-conf",
  993. &pdata->output_conf);
  994. of_property_read_u8(np, "st,ch1-output-mapping",
  995. &pdata->ch1_output_mapping);
  996. of_property_read_u8(np, "st,ch2-output-mapping",
  997. &pdata->ch2_output_mapping);
  998. of_property_read_u8(np, "st,ch3-output-mapping",
  999. &pdata->ch3_output_mapping);
  1000. if (of_get_property(np, "st,thermal-warning-recovery", NULL))
  1001. pdata->thermal_warning_recovery = 1;
  1002. if (of_get_property(np, "st,thermal-warning-adjustment", NULL))
  1003. pdata->thermal_warning_adjustment = 1;
  1004. if (of_get_property(np, "st,fault-detect-recovery", NULL))
  1005. pdata->fault_detect_recovery = 1;
  1006. pdata->ffx_power_output_mode = STA350_FFX_PM_VARIABLE_DROP_COMP;
  1007. if (!of_property_read_string(np, "st,ffx-power-output-mode",
  1008. &ffx_power_mode)) {
  1009. int i, mode = -EINVAL;
  1010. for (i = 0; i < ARRAY_SIZE(sta350_ffx_modes); i++)
  1011. if (!strcasecmp(ffx_power_mode, sta350_ffx_modes[i]))
  1012. mode = i;
  1013. if (mode < 0)
  1014. dev_warn(dev, "Unsupported ffx output mode: %s\n",
  1015. ffx_power_mode);
  1016. else
  1017. pdata->ffx_power_output_mode = mode;
  1018. }
  1019. tmp = 140;
  1020. of_property_read_u16(np, "st,drop-compensation-ns", &tmp);
  1021. pdata->drop_compensation_ns = clamp_t(u16, tmp, 0, 300) / 20;
  1022. if (of_get_property(np, "st,overcurrent-warning-adjustment", NULL))
  1023. pdata->oc_warning_adjustment = 1;
  1024. /* CONFE */
  1025. if (of_get_property(np, "st,max-power-use-mpcc", NULL))
  1026. pdata->max_power_use_mpcc = 1;
  1027. if (of_get_property(np, "st,max-power-correction", NULL))
  1028. pdata->max_power_correction = 1;
  1029. if (of_get_property(np, "st,am-reduction-mode", NULL))
  1030. pdata->am_reduction_mode = 1;
  1031. if (of_get_property(np, "st,odd-pwm-speed-mode", NULL))
  1032. pdata->odd_pwm_speed_mode = 1;
  1033. if (of_get_property(np, "st,distortion-compensation", NULL))
  1034. pdata->distortion_compensation = 1;
  1035. /* CONFF */
  1036. if (of_get_property(np, "st,invalid-input-detect-mute", NULL))
  1037. pdata->invalid_input_detect_mute = 1;
  1038. /* MISC */
  1039. if (of_get_property(np, "st,activate-mute-output", NULL))
  1040. pdata->activate_mute_output = 1;
  1041. if (of_get_property(np, "st,bridge-immediate-off", NULL))
  1042. pdata->bridge_immediate_off = 1;
  1043. if (of_get_property(np, "st,noise-shape-dc-cut", NULL))
  1044. pdata->noise_shape_dc_cut = 1;
  1045. if (of_get_property(np, "st,powerdown-master-volume", NULL))
  1046. pdata->powerdown_master_vol = 1;
  1047. if (!of_property_read_u8(np, "st,powerdown-delay-divider", &tmp8)) {
  1048. if (is_power_of_2(tmp8) && tmp8 >= 1 && tmp8 <= 128)
  1049. pdata->powerdown_delay_divider = ilog2(tmp8);
  1050. else
  1051. dev_warn(dev, "Unsupported powerdown delay divider %d\n",
  1052. tmp8);
  1053. }
  1054. sta350->pdata = pdata;
  1055. return 0;
  1056. }
  1057. #endif
  1058. static int sta350_i2c_probe(struct i2c_client *i2c,
  1059. const struct i2c_device_id *id)
  1060. {
  1061. struct device *dev = &i2c->dev;
  1062. struct sta350_priv *sta350;
  1063. int ret, i;
  1064. sta350 = devm_kzalloc(dev, sizeof(struct sta350_priv), GFP_KERNEL);
  1065. if (!sta350)
  1066. return -ENOMEM;
  1067. mutex_init(&sta350->coeff_lock);
  1068. sta350->pdata = dev_get_platdata(dev);
  1069. #ifdef CONFIG_OF
  1070. if (dev->of_node) {
  1071. ret = sta350_probe_dt(dev, sta350);
  1072. if (ret < 0)
  1073. return ret;
  1074. }
  1075. #endif
  1076. /* GPIOs */
  1077. sta350->gpiod_nreset = devm_gpiod_get_optional(dev, "reset",
  1078. GPIOD_OUT_LOW);
  1079. if (IS_ERR(sta350->gpiod_nreset))
  1080. return PTR_ERR(sta350->gpiod_nreset);
  1081. sta350->gpiod_power_down = devm_gpiod_get_optional(dev, "power-down",
  1082. GPIOD_OUT_LOW);
  1083. if (IS_ERR(sta350->gpiod_power_down))
  1084. return PTR_ERR(sta350->gpiod_power_down);
  1085. /* regulators */
  1086. for (i = 0; i < ARRAY_SIZE(sta350->supplies); i++)
  1087. sta350->supplies[i].supply = sta350_supply_names[i];
  1088. ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(sta350->supplies),
  1089. sta350->supplies);
  1090. if (ret < 0) {
  1091. dev_err(dev, "Failed to request supplies: %d\n", ret);
  1092. return ret;
  1093. }
  1094. sta350->regmap = devm_regmap_init_i2c(i2c, &sta350_regmap);
  1095. if (IS_ERR(sta350->regmap)) {
  1096. ret = PTR_ERR(sta350->regmap);
  1097. dev_err(dev, "Failed to init regmap: %d\n", ret);
  1098. return ret;
  1099. }
  1100. i2c_set_clientdata(i2c, sta350);
  1101. ret = devm_snd_soc_register_component(dev, &sta350_component, &sta350_dai, 1);
  1102. if (ret < 0)
  1103. dev_err(dev, "Failed to register component (%d)\n", ret);
  1104. return ret;
  1105. }
  1106. static int sta350_i2c_remove(struct i2c_client *client)
  1107. {
  1108. return 0;
  1109. }
  1110. static const struct i2c_device_id sta350_i2c_id[] = {
  1111. { "sta350", 0 },
  1112. { }
  1113. };
  1114. MODULE_DEVICE_TABLE(i2c, sta350_i2c_id);
  1115. static struct i2c_driver sta350_i2c_driver = {
  1116. .driver = {
  1117. .name = "sta350",
  1118. .of_match_table = of_match_ptr(st350_dt_ids),
  1119. },
  1120. .probe = sta350_i2c_probe,
  1121. .remove = sta350_i2c_remove,
  1122. .id_table = sta350_i2c_id,
  1123. };
  1124. module_i2c_driver(sta350_i2c_driver);
  1125. MODULE_DESCRIPTION("ASoC STA350 driver");
  1126. MODULE_AUTHOR("Sven Brandau <info@brandau.biz>");
  1127. MODULE_LICENSE("GPL");