rt711-sdw.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // rt711-sdw.c -- rt711 ALSA SoC audio driver
  4. //
  5. // Copyright(c) 2019 Realtek Semiconductor Corp.
  6. //
  7. //
  8. #include <linux/delay.h>
  9. #include <linux/device.h>
  10. #include <linux/mod_devicetable.h>
  11. #include <linux/soundwire/sdw.h>
  12. #include <linux/soundwire/sdw_type.h>
  13. #include <linux/soundwire/sdw_registers.h>
  14. #include <linux/module.h>
  15. #include <linux/regmap.h>
  16. #include <sound/soc.h>
  17. #include "rt711.h"
  18. #include "rt711-sdw.h"
  19. static bool rt711_readable_register(struct device *dev, unsigned int reg)
  20. {
  21. switch (reg) {
  22. case 0x00e0:
  23. case 0x00f0:
  24. case 0x2012 ... 0x2016:
  25. case 0x201a ... 0x2027:
  26. case 0x2029 ... 0x202a:
  27. case 0x202d ... 0x2034:
  28. case 0x2201 ... 0x2204:
  29. case 0x2206 ... 0x2212:
  30. case 0x2220 ... 0x2223:
  31. case 0x2230 ... 0x2239:
  32. case 0x2f01 ... 0x2f0f:
  33. case 0x3000 ... 0x3fff:
  34. case 0x7000 ... 0x7fff:
  35. case 0x8300 ... 0x83ff:
  36. case 0x9c00 ... 0x9cff:
  37. case 0xb900 ... 0xb9ff:
  38. case 0x752009:
  39. case 0x752011:
  40. case 0x75201a:
  41. case 0x752045:
  42. case 0x752046:
  43. case 0x752048:
  44. case 0x75204a:
  45. case 0x75206b:
  46. case 0x75206f:
  47. case 0x752080:
  48. case 0x752081:
  49. case 0x752091:
  50. case 0x755800:
  51. return true;
  52. default:
  53. return false;
  54. }
  55. }
  56. static bool rt711_volatile_register(struct device *dev, unsigned int reg)
  57. {
  58. switch (reg) {
  59. case 0x2016:
  60. case 0x201b:
  61. case 0x201c:
  62. case 0x201d:
  63. case 0x201f:
  64. case 0x2021:
  65. case 0x2023:
  66. case 0x2230:
  67. case 0x2012 ... 0x2015: /* HD-A read */
  68. case 0x202d ... 0x202f: /* BRA */
  69. case 0x2201 ... 0x2212: /* i2c debug */
  70. case 0x2220 ... 0x2223: /* decoded HD-A */
  71. case 0x9c00 ... 0x9cff:
  72. case 0xb900 ... 0xb9ff:
  73. case 0xff01:
  74. case 0x75201a:
  75. case 0x752046:
  76. case 0x752080:
  77. case 0x752081:
  78. case 0x755800:
  79. return true;
  80. default:
  81. return false;
  82. }
  83. }
  84. static int rt711_sdw_read(void *context, unsigned int reg, unsigned int *val)
  85. {
  86. struct device *dev = context;
  87. struct rt711_priv *rt711 = dev_get_drvdata(dev);
  88. unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
  89. unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
  90. unsigned int is_hda_reg = 1, is_index_reg = 0;
  91. int ret;
  92. if (reg > 0xffff)
  93. is_index_reg = 1;
  94. mask = reg & 0xf000;
  95. if (is_index_reg) { /* index registers */
  96. val2 = reg & 0xff;
  97. reg = reg >> 8;
  98. nid = reg & 0xff;
  99. ret = regmap_write(rt711->sdw_regmap, reg, 0);
  100. if (ret < 0)
  101. return ret;
  102. reg2 = reg + 0x1000;
  103. reg2 |= 0x80;
  104. ret = regmap_write(rt711->sdw_regmap, reg2, val2);
  105. if (ret < 0)
  106. return ret;
  107. reg3 = RT711_PRIV_DATA_R_H | nid;
  108. ret = regmap_write(rt711->sdw_regmap,
  109. reg3, ((*val >> 8) & 0xff));
  110. if (ret < 0)
  111. return ret;
  112. reg4 = reg3 + 0x1000;
  113. reg4 |= 0x80;
  114. ret = regmap_write(rt711->sdw_regmap, reg4, (*val & 0xff));
  115. if (ret < 0)
  116. return ret;
  117. } else if (mask == 0x3000) {
  118. reg += 0x8000;
  119. ret = regmap_write(rt711->sdw_regmap, reg, *val);
  120. if (ret < 0)
  121. return ret;
  122. } else if (mask == 0x7000) {
  123. reg += 0x2000;
  124. reg |= 0x800;
  125. ret = regmap_write(rt711->sdw_regmap,
  126. reg, ((*val >> 8) & 0xff));
  127. if (ret < 0)
  128. return ret;
  129. reg2 = reg + 0x1000;
  130. reg2 |= 0x80;
  131. ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff));
  132. if (ret < 0)
  133. return ret;
  134. } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
  135. reg2 = reg - 0x1000;
  136. reg2 &= ~0x80;
  137. ret = regmap_write(rt711->sdw_regmap,
  138. reg2, ((*val >> 8) & 0xff));
  139. if (ret < 0)
  140. return ret;
  141. ret = regmap_write(rt711->sdw_regmap, reg, (*val & 0xff));
  142. if (ret < 0)
  143. return ret;
  144. } else if (mask == 0x9000) {
  145. ret = regmap_write(rt711->sdw_regmap,
  146. reg, ((*val >> 8) & 0xff));
  147. if (ret < 0)
  148. return ret;
  149. reg2 = reg + 0x1000;
  150. reg2 |= 0x80;
  151. ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff));
  152. if (ret < 0)
  153. return ret;
  154. } else if (mask == 0xb000) {
  155. ret = regmap_write(rt711->sdw_regmap, reg, *val);
  156. if (ret < 0)
  157. return ret;
  158. } else {
  159. ret = regmap_read(rt711->sdw_regmap, reg, val);
  160. if (ret < 0)
  161. return ret;
  162. is_hda_reg = 0;
  163. }
  164. if (is_hda_reg || is_index_reg) {
  165. sdw_data_3 = 0;
  166. sdw_data_2 = 0;
  167. sdw_data_1 = 0;
  168. sdw_data_0 = 0;
  169. ret = regmap_read(rt711->sdw_regmap,
  170. RT711_READ_HDA_3, &sdw_data_3);
  171. if (ret < 0)
  172. return ret;
  173. ret = regmap_read(rt711->sdw_regmap,
  174. RT711_READ_HDA_2, &sdw_data_2);
  175. if (ret < 0)
  176. return ret;
  177. ret = regmap_read(rt711->sdw_regmap,
  178. RT711_READ_HDA_1, &sdw_data_1);
  179. if (ret < 0)
  180. return ret;
  181. ret = regmap_read(rt711->sdw_regmap,
  182. RT711_READ_HDA_0, &sdw_data_0);
  183. if (ret < 0)
  184. return ret;
  185. *val = ((sdw_data_3 & 0xff) << 24) |
  186. ((sdw_data_2 & 0xff) << 16) |
  187. ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff);
  188. }
  189. if (is_hda_reg == 0)
  190. dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
  191. else if (is_index_reg)
  192. dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n",
  193. __func__, reg, reg2, reg3, reg4, *val);
  194. else
  195. dev_dbg(dev, "[%s] %04x %04x => %08x\n",
  196. __func__, reg, reg2, *val);
  197. return 0;
  198. }
  199. static int rt711_sdw_write(void *context, unsigned int reg, unsigned int val)
  200. {
  201. struct device *dev = context;
  202. struct rt711_priv *rt711 = dev_get_drvdata(dev);
  203. unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
  204. unsigned int is_index_reg = 0;
  205. int ret;
  206. if (reg > 0xffff)
  207. is_index_reg = 1;
  208. mask = reg & 0xf000;
  209. if (is_index_reg) { /* index registers */
  210. val2 = reg & 0xff;
  211. reg = reg >> 8;
  212. nid = reg & 0xff;
  213. ret = regmap_write(rt711->sdw_regmap, reg, 0);
  214. if (ret < 0)
  215. return ret;
  216. reg2 = reg + 0x1000;
  217. reg2 |= 0x80;
  218. ret = regmap_write(rt711->sdw_regmap, reg2, val2);
  219. if (ret < 0)
  220. return ret;
  221. reg3 = RT711_PRIV_DATA_W_H | nid;
  222. ret = regmap_write(rt711->sdw_regmap,
  223. reg3, ((val >> 8) & 0xff));
  224. if (ret < 0)
  225. return ret;
  226. reg4 = reg3 + 0x1000;
  227. reg4 |= 0x80;
  228. ret = regmap_write(rt711->sdw_regmap, reg4, (val & 0xff));
  229. if (ret < 0)
  230. return ret;
  231. is_index_reg = 1;
  232. } else if (reg < 0x4fff) {
  233. ret = regmap_write(rt711->sdw_regmap, reg, val);
  234. if (ret < 0)
  235. return ret;
  236. } else if (reg == RT711_FUNC_RESET) {
  237. ret = regmap_write(rt711->sdw_regmap, reg, val);
  238. if (ret < 0)
  239. return ret;
  240. } else if (mask == 0x7000) {
  241. ret = regmap_write(rt711->sdw_regmap,
  242. reg, ((val >> 8) & 0xff));
  243. if (ret < 0)
  244. return ret;
  245. reg2 = reg + 0x1000;
  246. reg2 |= 0x80;
  247. ret = regmap_write(rt711->sdw_regmap, reg2, (val & 0xff));
  248. if (ret < 0)
  249. return ret;
  250. } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
  251. reg2 = reg - 0x1000;
  252. reg2 &= ~0x80;
  253. ret = regmap_write(rt711->sdw_regmap,
  254. reg2, ((val >> 8) & 0xff));
  255. if (ret < 0)
  256. return ret;
  257. ret = regmap_write(rt711->sdw_regmap, reg, (val & 0xff));
  258. if (ret < 0)
  259. return ret;
  260. }
  261. if (reg2 == 0)
  262. dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
  263. else if (is_index_reg)
  264. dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
  265. __func__, reg, reg2, reg3, reg4, val2, val);
  266. else
  267. dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
  268. __func__, reg, reg2, val);
  269. return 0;
  270. }
  271. static const struct regmap_config rt711_regmap = {
  272. .reg_bits = 24,
  273. .val_bits = 32,
  274. .readable_reg = rt711_readable_register,
  275. .volatile_reg = rt711_volatile_register,
  276. .max_register = 0x755800,
  277. .reg_defaults = rt711_reg_defaults,
  278. .num_reg_defaults = ARRAY_SIZE(rt711_reg_defaults),
  279. .cache_type = REGCACHE_RBTREE,
  280. .use_single_read = true,
  281. .use_single_write = true,
  282. .reg_read = rt711_sdw_read,
  283. .reg_write = rt711_sdw_write,
  284. };
  285. static const struct regmap_config rt711_sdw_regmap = {
  286. .name = "sdw",
  287. .reg_bits = 32,
  288. .val_bits = 8,
  289. .readable_reg = rt711_readable_register,
  290. .max_register = 0xff01,
  291. .cache_type = REGCACHE_NONE,
  292. .use_single_read = true,
  293. .use_single_write = true,
  294. };
  295. static int rt711_update_status(struct sdw_slave *slave,
  296. enum sdw_slave_status status)
  297. {
  298. struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
  299. /* Update the status */
  300. rt711->status = status;
  301. if (status == SDW_SLAVE_UNATTACHED)
  302. rt711->hw_init = false;
  303. /*
  304. * Perform initialization only if slave status is present and
  305. * hw_init flag is false
  306. */
  307. if (rt711->hw_init || rt711->status != SDW_SLAVE_ATTACHED)
  308. return 0;
  309. /* perform I/O transfers required for Slave initialization */
  310. return rt711_io_init(&slave->dev, slave);
  311. }
  312. static int rt711_read_prop(struct sdw_slave *slave)
  313. {
  314. struct sdw_slave_prop *prop = &slave->prop;
  315. int nval, i;
  316. u32 bit;
  317. unsigned long addr;
  318. struct sdw_dpn_prop *dpn;
  319. prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
  320. SDW_SCP_INT1_PARITY;
  321. prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
  322. prop->paging_support = false;
  323. /* first we need to allocate memory for set bits in port lists */
  324. prop->source_ports = 0x14; /* BITMAP: 00010100 */
  325. prop->sink_ports = 0x8; /* BITMAP: 00001000 */
  326. nval = hweight32(prop->source_ports);
  327. prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
  328. sizeof(*prop->src_dpn_prop),
  329. GFP_KERNEL);
  330. if (!prop->src_dpn_prop)
  331. return -ENOMEM;
  332. i = 0;
  333. dpn = prop->src_dpn_prop;
  334. addr = prop->source_ports;
  335. for_each_set_bit(bit, &addr, 32) {
  336. dpn[i].num = bit;
  337. dpn[i].type = SDW_DPN_FULL;
  338. dpn[i].simple_ch_prep_sm = true;
  339. dpn[i].ch_prep_timeout = 10;
  340. i++;
  341. }
  342. /* do this again for sink now */
  343. nval = hweight32(prop->sink_ports);
  344. prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
  345. sizeof(*prop->sink_dpn_prop),
  346. GFP_KERNEL);
  347. if (!prop->sink_dpn_prop)
  348. return -ENOMEM;
  349. i = 0;
  350. dpn = prop->sink_dpn_prop;
  351. addr = prop->sink_ports;
  352. for_each_set_bit(bit, &addr, 32) {
  353. dpn[i].num = bit;
  354. dpn[i].type = SDW_DPN_FULL;
  355. dpn[i].simple_ch_prep_sm = true;
  356. dpn[i].ch_prep_timeout = 10;
  357. i++;
  358. }
  359. /* set the timeout values */
  360. prop->clk_stop_timeout = 20;
  361. /* wake-up event */
  362. prop->wake_capable = 1;
  363. return 0;
  364. }
  365. static int rt711_bus_config(struct sdw_slave *slave,
  366. struct sdw_bus_params *params)
  367. {
  368. struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
  369. int ret;
  370. memcpy(&rt711->params, params, sizeof(*params));
  371. ret = rt711_clock_config(&slave->dev);
  372. if (ret < 0)
  373. dev_err(&slave->dev, "Invalid clk config");
  374. return ret;
  375. }
  376. static int rt711_interrupt_callback(struct sdw_slave *slave,
  377. struct sdw_slave_intr_status *status)
  378. {
  379. struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
  380. dev_dbg(&slave->dev,
  381. "%s control_port_stat=%x", __func__, status->control_port);
  382. if (status->control_port & 0x4) {
  383. mod_delayed_work(system_power_efficient_wq,
  384. &rt711->jack_detect_work, msecs_to_jiffies(250));
  385. }
  386. return 0;
  387. }
  388. static struct sdw_slave_ops rt711_slave_ops = {
  389. .read_prop = rt711_read_prop,
  390. .interrupt_callback = rt711_interrupt_callback,
  391. .update_status = rt711_update_status,
  392. .bus_config = rt711_bus_config,
  393. };
  394. static int rt711_sdw_probe(struct sdw_slave *slave,
  395. const struct sdw_device_id *id)
  396. {
  397. struct regmap *sdw_regmap, *regmap;
  398. /* Regmap Initialization */
  399. sdw_regmap = devm_regmap_init_sdw(slave, &rt711_sdw_regmap);
  400. if (IS_ERR(sdw_regmap))
  401. return PTR_ERR(sdw_regmap);
  402. regmap = devm_regmap_init(&slave->dev, NULL,
  403. &slave->dev, &rt711_regmap);
  404. if (IS_ERR(regmap))
  405. return PTR_ERR(regmap);
  406. rt711_init(&slave->dev, sdw_regmap, regmap, slave);
  407. return 0;
  408. }
  409. static int rt711_sdw_remove(struct sdw_slave *slave)
  410. {
  411. struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev);
  412. if (rt711 && rt711->hw_init) {
  413. cancel_delayed_work(&rt711->jack_detect_work);
  414. cancel_delayed_work(&rt711->jack_btn_check_work);
  415. cancel_work_sync(&rt711->calibration_work);
  416. }
  417. return 0;
  418. }
  419. static const struct sdw_device_id rt711_id[] = {
  420. SDW_SLAVE_ENTRY_EXT(0x025d, 0x711, 0x2, 0, 0),
  421. {},
  422. };
  423. MODULE_DEVICE_TABLE(sdw, rt711_id);
  424. static int __maybe_unused rt711_dev_suspend(struct device *dev)
  425. {
  426. struct rt711_priv *rt711 = dev_get_drvdata(dev);
  427. if (!rt711->hw_init)
  428. return 0;
  429. cancel_delayed_work_sync(&rt711->jack_detect_work);
  430. cancel_delayed_work_sync(&rt711->jack_btn_check_work);
  431. cancel_work_sync(&rt711->calibration_work);
  432. regcache_cache_only(rt711->regmap, true);
  433. return 0;
  434. }
  435. #define RT711_PROBE_TIMEOUT 2000
  436. static int __maybe_unused rt711_dev_resume(struct device *dev)
  437. {
  438. struct sdw_slave *slave = dev_to_sdw_dev(dev);
  439. struct rt711_priv *rt711 = dev_get_drvdata(dev);
  440. unsigned long time;
  441. if (!rt711->first_hw_init)
  442. return 0;
  443. if (!slave->unattach_request)
  444. goto regmap_sync;
  445. time = wait_for_completion_timeout(&slave->initialization_complete,
  446. msecs_to_jiffies(RT711_PROBE_TIMEOUT));
  447. if (!time) {
  448. dev_err(&slave->dev, "Initialization not complete, timed out\n");
  449. return -ETIMEDOUT;
  450. }
  451. regmap_sync:
  452. slave->unattach_request = 0;
  453. regcache_cache_only(rt711->regmap, false);
  454. regcache_sync_region(rt711->regmap, 0x3000, 0x8fff);
  455. regcache_sync_region(rt711->regmap, 0x752009, 0x752091);
  456. return 0;
  457. }
  458. static const struct dev_pm_ops rt711_pm = {
  459. SET_SYSTEM_SLEEP_PM_OPS(rt711_dev_suspend, rt711_dev_resume)
  460. SET_RUNTIME_PM_OPS(rt711_dev_suspend, rt711_dev_resume, NULL)
  461. };
  462. static struct sdw_driver rt711_sdw_driver = {
  463. .driver = {
  464. .name = "rt711",
  465. .owner = THIS_MODULE,
  466. .pm = &rt711_pm,
  467. },
  468. .probe = rt711_sdw_probe,
  469. .remove = rt711_sdw_remove,
  470. .ops = &rt711_slave_ops,
  471. .id_table = rt711_id,
  472. };
  473. module_sdw_driver(rt711_sdw_driver);
  474. MODULE_DESCRIPTION("ASoC RT711 SDW driver");
  475. MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
  476. MODULE_LICENSE("GPL");