rt700-sdw.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543
  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // rt700-sdw.c -- rt700 ALSA SoC audio driver
  4. //
  5. // Copyright(c) 2019 Realtek Semiconductor Corp.
  6. //
  7. //
  8. #include <linux/delay.h>
  9. #include <linux/device.h>
  10. #include <linux/mod_devicetable.h>
  11. #include <linux/soundwire/sdw.h>
  12. #include <linux/soundwire/sdw_type.h>
  13. #include <linux/soundwire/sdw_registers.h>
  14. #include <linux/module.h>
  15. #include <linux/regmap.h>
  16. #include <sound/soc.h>
  17. #include "rt700.h"
  18. #include "rt700-sdw.h"
  19. static bool rt700_readable_register(struct device *dev, unsigned int reg)
  20. {
  21. switch (reg) {
  22. case 0x00e0:
  23. case 0x00f0:
  24. case 0x2000 ... 0x200e:
  25. case 0x2012 ... 0x2016:
  26. case 0x201a ... 0x2027:
  27. case 0x2029 ... 0x202a:
  28. case 0x202d ... 0x2034:
  29. case 0x2200 ... 0x2204:
  30. case 0x2206 ... 0x2212:
  31. case 0x2220 ... 0x2223:
  32. case 0x2230 ... 0x2231:
  33. case 0x3000 ... 0x3fff:
  34. case 0x7000 ... 0x7fff:
  35. case 0x8300 ... 0x83ff:
  36. case 0x9c00 ... 0x9cff:
  37. case 0xb900 ... 0xb9ff:
  38. case 0x75201a:
  39. case 0x752045:
  40. case 0x752046:
  41. case 0x752048:
  42. case 0x75204a:
  43. case 0x75206b:
  44. case 0x752080:
  45. case 0x752081:
  46. return true;
  47. default:
  48. return false;
  49. }
  50. }
  51. static bool rt700_volatile_register(struct device *dev, unsigned int reg)
  52. {
  53. switch (reg) {
  54. case 0x2009:
  55. case 0x2016:
  56. case 0x201b:
  57. case 0x201c:
  58. case 0x201d:
  59. case 0x201f:
  60. case 0x2021:
  61. case 0x2023:
  62. case 0x2230:
  63. case 0x200b ... 0x200e: /* i2c read */
  64. case 0x2012 ... 0x2015: /* HD-A read */
  65. case 0x202d ... 0x202f: /* BRA */
  66. case 0x2201 ... 0x2212: /* i2c debug */
  67. case 0x2220 ... 0x2223: /* decoded HD-A */
  68. case 0x9c00 ... 0x9cff:
  69. case 0xb900 ... 0xb9ff:
  70. case 0xff01:
  71. case 0x75201a:
  72. case 0x752046:
  73. case 0x752080:
  74. case 0x752081:
  75. return true;
  76. default:
  77. return false;
  78. }
  79. }
  80. static int rt700_sdw_read(void *context, unsigned int reg, unsigned int *val)
  81. {
  82. struct device *dev = context;
  83. struct rt700_priv *rt700 = dev_get_drvdata(dev);
  84. unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
  85. unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
  86. unsigned int is_hda_reg = 1, is_index_reg = 0;
  87. int ret;
  88. if (reg > 0xffff)
  89. is_index_reg = 1;
  90. mask = reg & 0xf000;
  91. if (is_index_reg) { /* index registers */
  92. val2 = reg & 0xff;
  93. reg = reg >> 8;
  94. nid = reg & 0xff;
  95. ret = regmap_write(rt700->sdw_regmap, reg, 0);
  96. if (ret < 0)
  97. return ret;
  98. reg2 = reg + 0x1000;
  99. reg2 |= 0x80;
  100. ret = regmap_write(rt700->sdw_regmap, reg2, val2);
  101. if (ret < 0)
  102. return ret;
  103. reg3 = RT700_PRIV_DATA_R_H | nid;
  104. ret = regmap_write(rt700->sdw_regmap,
  105. reg3, ((*val >> 8) & 0xff));
  106. if (ret < 0)
  107. return ret;
  108. reg4 = reg3 + 0x1000;
  109. reg4 |= 0x80;
  110. ret = regmap_write(rt700->sdw_regmap, reg4, (*val & 0xff));
  111. if (ret < 0)
  112. return ret;
  113. } else if (mask == 0x3000) {
  114. reg += 0x8000;
  115. ret = regmap_write(rt700->sdw_regmap, reg, *val);
  116. if (ret < 0)
  117. return ret;
  118. } else if (mask == 0x7000) {
  119. reg += 0x2000;
  120. reg |= 0x800;
  121. ret = regmap_write(rt700->sdw_regmap,
  122. reg, ((*val >> 8) & 0xff));
  123. if (ret < 0)
  124. return ret;
  125. reg2 = reg + 0x1000;
  126. reg2 |= 0x80;
  127. ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff));
  128. if (ret < 0)
  129. return ret;
  130. } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
  131. reg2 = reg - 0x1000;
  132. reg2 &= ~0x80;
  133. ret = regmap_write(rt700->sdw_regmap,
  134. reg2, ((*val >> 8) & 0xff));
  135. if (ret < 0)
  136. return ret;
  137. ret = regmap_write(rt700->sdw_regmap, reg, (*val & 0xff));
  138. if (ret < 0)
  139. return ret;
  140. } else if (mask == 0x9000) {
  141. ret = regmap_write(rt700->sdw_regmap,
  142. reg, ((*val >> 8) & 0xff));
  143. if (ret < 0)
  144. return ret;
  145. reg2 = reg + 0x1000;
  146. reg2 |= 0x80;
  147. ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff));
  148. if (ret < 0)
  149. return ret;
  150. } else if (mask == 0xb000) {
  151. ret = regmap_write(rt700->sdw_regmap, reg, *val);
  152. if (ret < 0)
  153. return ret;
  154. } else {
  155. ret = regmap_read(rt700->sdw_regmap, reg, val);
  156. if (ret < 0)
  157. return ret;
  158. is_hda_reg = 0;
  159. }
  160. if (is_hda_reg || is_index_reg) {
  161. sdw_data_3 = 0;
  162. sdw_data_2 = 0;
  163. sdw_data_1 = 0;
  164. sdw_data_0 = 0;
  165. ret = regmap_read(rt700->sdw_regmap,
  166. RT700_READ_HDA_3, &sdw_data_3);
  167. if (ret < 0)
  168. return ret;
  169. ret = regmap_read(rt700->sdw_regmap,
  170. RT700_READ_HDA_2, &sdw_data_2);
  171. if (ret < 0)
  172. return ret;
  173. ret = regmap_read(rt700->sdw_regmap,
  174. RT700_READ_HDA_1, &sdw_data_1);
  175. if (ret < 0)
  176. return ret;
  177. ret = regmap_read(rt700->sdw_regmap,
  178. RT700_READ_HDA_0, &sdw_data_0);
  179. if (ret < 0)
  180. return ret;
  181. *val = ((sdw_data_3 & 0xff) << 24) |
  182. ((sdw_data_2 & 0xff) << 16) |
  183. ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff);
  184. }
  185. if (is_hda_reg == 0)
  186. dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
  187. else if (is_index_reg)
  188. dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n",
  189. __func__, reg, reg2, reg3, reg4, *val);
  190. else
  191. dev_dbg(dev, "[%s] %04x %04x => %08x\n",
  192. __func__, reg, reg2, *val);
  193. return 0;
  194. }
  195. static int rt700_sdw_write(void *context, unsigned int reg, unsigned int val)
  196. {
  197. struct device *dev = context;
  198. struct rt700_priv *rt700 = dev_get_drvdata(dev);
  199. unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
  200. unsigned int is_index_reg = 0;
  201. int ret;
  202. if (reg > 0xffff)
  203. is_index_reg = 1;
  204. mask = reg & 0xf000;
  205. if (is_index_reg) { /* index registers */
  206. val2 = reg & 0xff;
  207. reg = reg >> 8;
  208. nid = reg & 0xff;
  209. ret = regmap_write(rt700->sdw_regmap, reg, 0);
  210. if (ret < 0)
  211. return ret;
  212. reg2 = reg + 0x1000;
  213. reg2 |= 0x80;
  214. ret = regmap_write(rt700->sdw_regmap, reg2, val2);
  215. if (ret < 0)
  216. return ret;
  217. reg3 = RT700_PRIV_DATA_W_H | nid;
  218. ret = regmap_write(rt700->sdw_regmap,
  219. reg3, ((val >> 8) & 0xff));
  220. if (ret < 0)
  221. return ret;
  222. reg4 = reg3 + 0x1000;
  223. reg4 |= 0x80;
  224. ret = regmap_write(rt700->sdw_regmap, reg4, (val & 0xff));
  225. if (ret < 0)
  226. return ret;
  227. is_index_reg = 1;
  228. } else if (reg < 0x4fff) {
  229. ret = regmap_write(rt700->sdw_regmap, reg, val);
  230. if (ret < 0)
  231. return ret;
  232. } else if (reg == 0xff01) {
  233. ret = regmap_write(rt700->sdw_regmap, reg, val);
  234. if (ret < 0)
  235. return ret;
  236. } else if (mask == 0x7000) {
  237. ret = regmap_write(rt700->sdw_regmap,
  238. reg, ((val >> 8) & 0xff));
  239. if (ret < 0)
  240. return ret;
  241. reg2 = reg + 0x1000;
  242. reg2 |= 0x80;
  243. ret = regmap_write(rt700->sdw_regmap, reg2, (val & 0xff));
  244. if (ret < 0)
  245. return ret;
  246. } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
  247. reg2 = reg - 0x1000;
  248. reg2 &= ~0x80;
  249. ret = regmap_write(rt700->sdw_regmap,
  250. reg2, ((val >> 8) & 0xff));
  251. if (ret < 0)
  252. return ret;
  253. ret = regmap_write(rt700->sdw_regmap, reg, (val & 0xff));
  254. if (ret < 0)
  255. return ret;
  256. }
  257. if (reg2 == 0)
  258. dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
  259. else if (is_index_reg)
  260. dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
  261. __func__, reg, reg2, reg3, reg4, val2, val);
  262. else
  263. dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
  264. __func__, reg, reg2, val);
  265. return 0;
  266. }
  267. static const struct regmap_config rt700_regmap = {
  268. .reg_bits = 24,
  269. .val_bits = 32,
  270. .readable_reg = rt700_readable_register,
  271. .volatile_reg = rt700_volatile_register,
  272. .max_register = 0x755800,
  273. .reg_defaults = rt700_reg_defaults,
  274. .num_reg_defaults = ARRAY_SIZE(rt700_reg_defaults),
  275. .cache_type = REGCACHE_RBTREE,
  276. .use_single_read = true,
  277. .use_single_write = true,
  278. .reg_read = rt700_sdw_read,
  279. .reg_write = rt700_sdw_write,
  280. };
  281. static const struct regmap_config rt700_sdw_regmap = {
  282. .name = "sdw",
  283. .reg_bits = 32,
  284. .val_bits = 8,
  285. .readable_reg = rt700_readable_register,
  286. .max_register = 0xff01,
  287. .cache_type = REGCACHE_NONE,
  288. .use_single_read = true,
  289. .use_single_write = true,
  290. };
  291. static int rt700_update_status(struct sdw_slave *slave,
  292. enum sdw_slave_status status)
  293. {
  294. struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
  295. /* Update the status */
  296. rt700->status = status;
  297. if (status == SDW_SLAVE_UNATTACHED)
  298. rt700->hw_init = false;
  299. /*
  300. * Perform initialization only if slave status is present and
  301. * hw_init flag is false
  302. */
  303. if (rt700->hw_init || rt700->status != SDW_SLAVE_ATTACHED)
  304. return 0;
  305. /* perform I/O transfers required for Slave initialization */
  306. return rt700_io_init(&slave->dev, slave);
  307. }
  308. static int rt700_read_prop(struct sdw_slave *slave)
  309. {
  310. struct sdw_slave_prop *prop = &slave->prop;
  311. int nval, i;
  312. u32 bit;
  313. unsigned long addr;
  314. struct sdw_dpn_prop *dpn;
  315. prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
  316. SDW_SCP_INT1_PARITY;
  317. prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
  318. prop->paging_support = false;
  319. /* first we need to allocate memory for set bits in port lists */
  320. prop->source_ports = 0x14; /* BITMAP: 00010100 */
  321. prop->sink_ports = 0xA; /* BITMAP: 00001010 */
  322. nval = hweight32(prop->source_ports);
  323. prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
  324. sizeof(*prop->src_dpn_prop),
  325. GFP_KERNEL);
  326. if (!prop->src_dpn_prop)
  327. return -ENOMEM;
  328. i = 0;
  329. dpn = prop->src_dpn_prop;
  330. addr = prop->source_ports;
  331. for_each_set_bit(bit, &addr, 32) {
  332. dpn[i].num = bit;
  333. dpn[i].type = SDW_DPN_FULL;
  334. dpn[i].simple_ch_prep_sm = true;
  335. dpn[i].ch_prep_timeout = 10;
  336. i++;
  337. }
  338. /* do this again for sink now */
  339. nval = hweight32(prop->sink_ports);
  340. prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
  341. sizeof(*prop->sink_dpn_prop),
  342. GFP_KERNEL);
  343. if (!prop->sink_dpn_prop)
  344. return -ENOMEM;
  345. i = 0;
  346. dpn = prop->sink_dpn_prop;
  347. addr = prop->sink_ports;
  348. for_each_set_bit(bit, &addr, 32) {
  349. dpn[i].num = bit;
  350. dpn[i].type = SDW_DPN_FULL;
  351. dpn[i].simple_ch_prep_sm = true;
  352. dpn[i].ch_prep_timeout = 10;
  353. i++;
  354. }
  355. /* set the timeout values */
  356. prop->clk_stop_timeout = 20;
  357. /* wake-up event */
  358. prop->wake_capable = 1;
  359. return 0;
  360. }
  361. static int rt700_bus_config(struct sdw_slave *slave,
  362. struct sdw_bus_params *params)
  363. {
  364. struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
  365. int ret;
  366. memcpy(&rt700->params, params, sizeof(*params));
  367. ret = rt700_clock_config(&slave->dev);
  368. if (ret < 0)
  369. dev_err(&slave->dev, "Invalid clk config");
  370. return ret;
  371. }
  372. static int rt700_interrupt_callback(struct sdw_slave *slave,
  373. struct sdw_slave_intr_status *status)
  374. {
  375. struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
  376. dev_dbg(&slave->dev,
  377. "%s control_port_stat=%x", __func__, status->control_port);
  378. if (status->control_port & 0x4) {
  379. mod_delayed_work(system_power_efficient_wq,
  380. &rt700->jack_detect_work, msecs_to_jiffies(250));
  381. }
  382. return 0;
  383. }
  384. /*
  385. * slave_ops: callbacks for get_clock_stop_mode, clock_stop and
  386. * port_prep are not defined for now
  387. */
  388. static struct sdw_slave_ops rt700_slave_ops = {
  389. .read_prop = rt700_read_prop,
  390. .interrupt_callback = rt700_interrupt_callback,
  391. .update_status = rt700_update_status,
  392. .bus_config = rt700_bus_config,
  393. };
  394. static int rt700_sdw_probe(struct sdw_slave *slave,
  395. const struct sdw_device_id *id)
  396. {
  397. struct regmap *sdw_regmap, *regmap;
  398. /* Regmap Initialization */
  399. sdw_regmap = devm_regmap_init_sdw(slave, &rt700_sdw_regmap);
  400. if (IS_ERR(sdw_regmap))
  401. return PTR_ERR(sdw_regmap);
  402. regmap = devm_regmap_init(&slave->dev, NULL,
  403. &slave->dev, &rt700_regmap);
  404. if (IS_ERR(regmap))
  405. return PTR_ERR(regmap);
  406. rt700_init(&slave->dev, sdw_regmap, regmap, slave);
  407. return 0;
  408. }
  409. static int rt700_sdw_remove(struct sdw_slave *slave)
  410. {
  411. struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev);
  412. if (rt700 && rt700->hw_init) {
  413. cancel_delayed_work(&rt700->jack_detect_work);
  414. cancel_delayed_work(&rt700->jack_btn_check_work);
  415. }
  416. return 0;
  417. }
  418. static const struct sdw_device_id rt700_id[] = {
  419. SDW_SLAVE_ENTRY_EXT(0x025d, 0x700, 0x1, 0, 0),
  420. {},
  421. };
  422. MODULE_DEVICE_TABLE(sdw, rt700_id);
  423. static int __maybe_unused rt700_dev_suspend(struct device *dev)
  424. {
  425. struct rt700_priv *rt700 = dev_get_drvdata(dev);
  426. if (!rt700->hw_init)
  427. return 0;
  428. cancel_delayed_work_sync(&rt700->jack_detect_work);
  429. cancel_delayed_work_sync(&rt700->jack_btn_check_work);
  430. regcache_cache_only(rt700->regmap, true);
  431. return 0;
  432. }
  433. #define RT700_PROBE_TIMEOUT 2000
  434. static int __maybe_unused rt700_dev_resume(struct device *dev)
  435. {
  436. struct sdw_slave *slave = dev_to_sdw_dev(dev);
  437. struct rt700_priv *rt700 = dev_get_drvdata(dev);
  438. unsigned long time;
  439. if (!rt700->first_hw_init)
  440. return 0;
  441. if (!slave->unattach_request)
  442. goto regmap_sync;
  443. time = wait_for_completion_timeout(&slave->initialization_complete,
  444. msecs_to_jiffies(RT700_PROBE_TIMEOUT));
  445. if (!time) {
  446. dev_err(&slave->dev, "Initialization not complete, timed out\n");
  447. return -ETIMEDOUT;
  448. }
  449. regmap_sync:
  450. slave->unattach_request = 0;
  451. regcache_cache_only(rt700->regmap, false);
  452. regcache_sync_region(rt700->regmap, 0x3000, 0x8fff);
  453. regcache_sync_region(rt700->regmap, 0x752010, 0x75206b);
  454. return 0;
  455. }
  456. static const struct dev_pm_ops rt700_pm = {
  457. SET_SYSTEM_SLEEP_PM_OPS(rt700_dev_suspend, rt700_dev_resume)
  458. SET_RUNTIME_PM_OPS(rt700_dev_suspend, rt700_dev_resume, NULL)
  459. };
  460. static struct sdw_driver rt700_sdw_driver = {
  461. .driver = {
  462. .name = "rt700",
  463. .owner = THIS_MODULE,
  464. .pm = &rt700_pm,
  465. },
  466. .probe = rt700_sdw_probe,
  467. .remove = rt700_sdw_remove,
  468. .ops = &rt700_slave_ops,
  469. .id_table = rt700_id,
  470. };
  471. module_sdw_driver(rt700_sdw_driver);
  472. MODULE_DESCRIPTION("ASoC RT700 driver SDW");
  473. MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
  474. MODULE_LICENSE("GPL v2");