rt5659.c 131 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * rt5659.c -- RT5659/RT5658 ALSA SoC audio codec driver
  4. *
  5. * Copyright 2015 Realtek Semiconductor Corp.
  6. * Author: Bard Liao <bardliao@realtek.com>
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/module.h>
  10. #include <linux/moduleparam.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/pm.h>
  14. #include <linux/i2c.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/acpi.h>
  18. #include <linux/gpio.h>
  19. #include <linux/gpio/consumer.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/pcm_params.h>
  23. #include <sound/jack.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/initval.h>
  27. #include <sound/tlv.h>
  28. #include <sound/rt5659.h>
  29. #include "rl6231.h"
  30. #include "rt5659.h"
  31. static const struct reg_default rt5659_reg[] = {
  32. { 0x0000, 0x0000 },
  33. { 0x0001, 0x4848 },
  34. { 0x0002, 0x8080 },
  35. { 0x0003, 0xc8c8 },
  36. { 0x0004, 0xc80a },
  37. { 0x0005, 0x0000 },
  38. { 0x0006, 0x0000 },
  39. { 0x0007, 0x0103 },
  40. { 0x0008, 0x0080 },
  41. { 0x0009, 0x0000 },
  42. { 0x000a, 0x0000 },
  43. { 0x000c, 0x0000 },
  44. { 0x000d, 0x0000 },
  45. { 0x000f, 0x0808 },
  46. { 0x0010, 0x3080 },
  47. { 0x0011, 0x4a00 },
  48. { 0x0012, 0x4e00 },
  49. { 0x0015, 0x42c1 },
  50. { 0x0016, 0x0000 },
  51. { 0x0018, 0x000b },
  52. { 0x0019, 0xafaf },
  53. { 0x001a, 0xafaf },
  54. { 0x001b, 0x0011 },
  55. { 0x001c, 0x2f2f },
  56. { 0x001d, 0x2f2f },
  57. { 0x001e, 0x2f2f },
  58. { 0x001f, 0x0000 },
  59. { 0x0020, 0x0000 },
  60. { 0x0021, 0x0000 },
  61. { 0x0022, 0x5757 },
  62. { 0x0023, 0x0039 },
  63. { 0x0026, 0xc060 },
  64. { 0x0027, 0xd8d8 },
  65. { 0x0029, 0x8080 },
  66. { 0x002a, 0xaaaa },
  67. { 0x002b, 0xaaaa },
  68. { 0x002c, 0x00af },
  69. { 0x002d, 0x0000 },
  70. { 0x002f, 0x1002 },
  71. { 0x0031, 0x5000 },
  72. { 0x0032, 0x0000 },
  73. { 0x0033, 0x0000 },
  74. { 0x0034, 0x0000 },
  75. { 0x0035, 0x0000 },
  76. { 0x0036, 0x0000 },
  77. { 0x003a, 0x0000 },
  78. { 0x003b, 0x0000 },
  79. { 0x003c, 0x007f },
  80. { 0x003d, 0x0000 },
  81. { 0x003e, 0x007f },
  82. { 0x0040, 0x0808 },
  83. { 0x0046, 0x001f },
  84. { 0x0047, 0x001f },
  85. { 0x0048, 0x0003 },
  86. { 0x0049, 0xe061 },
  87. { 0x004a, 0x0000 },
  88. { 0x004b, 0x031f },
  89. { 0x004d, 0x0000 },
  90. { 0x004e, 0x001f },
  91. { 0x004f, 0x0000 },
  92. { 0x0050, 0x001f },
  93. { 0x0052, 0xf000 },
  94. { 0x0053, 0x0111 },
  95. { 0x0054, 0x0064 },
  96. { 0x0055, 0x0080 },
  97. { 0x0056, 0xef0e },
  98. { 0x0057, 0xf0f0 },
  99. { 0x0058, 0xef0e },
  100. { 0x0059, 0xf0f0 },
  101. { 0x005a, 0xef0e },
  102. { 0x005b, 0xf0f0 },
  103. { 0x005c, 0xf000 },
  104. { 0x005d, 0x0000 },
  105. { 0x005e, 0x1f2c },
  106. { 0x005f, 0x1f2c },
  107. { 0x0060, 0x2717 },
  108. { 0x0061, 0x0000 },
  109. { 0x0062, 0x0000 },
  110. { 0x0063, 0x003e },
  111. { 0x0064, 0x0000 },
  112. { 0x0065, 0x0000 },
  113. { 0x0066, 0x0000 },
  114. { 0x0067, 0x0000 },
  115. { 0x006a, 0x0000 },
  116. { 0x006b, 0x0000 },
  117. { 0x006c, 0x0000 },
  118. { 0x006e, 0x0000 },
  119. { 0x006f, 0x0000 },
  120. { 0x0070, 0x8000 },
  121. { 0x0071, 0x8000 },
  122. { 0x0072, 0x8000 },
  123. { 0x0073, 0x1110 },
  124. { 0x0074, 0xfe00 },
  125. { 0x0075, 0x2409 },
  126. { 0x0076, 0x000a },
  127. { 0x0077, 0x00f0 },
  128. { 0x0078, 0x0000 },
  129. { 0x0079, 0x0000 },
  130. { 0x007a, 0x0123 },
  131. { 0x007b, 0x8003 },
  132. { 0x0080, 0x0000 },
  133. { 0x0081, 0x0000 },
  134. { 0x0082, 0x0000 },
  135. { 0x0083, 0x0000 },
  136. { 0x0084, 0x0000 },
  137. { 0x0085, 0x0000 },
  138. { 0x0086, 0x0008 },
  139. { 0x0087, 0x0000 },
  140. { 0x0088, 0x0000 },
  141. { 0x0089, 0x0000 },
  142. { 0x008a, 0x0000 },
  143. { 0x008b, 0x0000 },
  144. { 0x008c, 0x0003 },
  145. { 0x008e, 0x0000 },
  146. { 0x008f, 0x1000 },
  147. { 0x0090, 0x0646 },
  148. { 0x0091, 0x0c16 },
  149. { 0x0092, 0x0073 },
  150. { 0x0093, 0x0000 },
  151. { 0x0094, 0x0080 },
  152. { 0x0097, 0x0000 },
  153. { 0x0098, 0x0000 },
  154. { 0x0099, 0x0000 },
  155. { 0x009a, 0x0000 },
  156. { 0x009b, 0x0000 },
  157. { 0x009c, 0x007f },
  158. { 0x009d, 0x0000 },
  159. { 0x009e, 0x007f },
  160. { 0x009f, 0x0000 },
  161. { 0x00a0, 0x0060 },
  162. { 0x00a1, 0x90a1 },
  163. { 0x00ae, 0x2000 },
  164. { 0x00af, 0x0000 },
  165. { 0x00b0, 0x2000 },
  166. { 0x00b1, 0x0000 },
  167. { 0x00b2, 0x0000 },
  168. { 0x00b6, 0x0000 },
  169. { 0x00b7, 0x0000 },
  170. { 0x00b8, 0x0000 },
  171. { 0x00b9, 0x0000 },
  172. { 0x00ba, 0x0000 },
  173. { 0x00bb, 0x0000 },
  174. { 0x00be, 0x0000 },
  175. { 0x00bf, 0x0000 },
  176. { 0x00c0, 0x0000 },
  177. { 0x00c1, 0x0000 },
  178. { 0x00c2, 0x0000 },
  179. { 0x00c3, 0x0000 },
  180. { 0x00c4, 0x0003 },
  181. { 0x00c5, 0x0000 },
  182. { 0x00cb, 0xa02f },
  183. { 0x00cc, 0x0000 },
  184. { 0x00cd, 0x0e02 },
  185. { 0x00d6, 0x0000 },
  186. { 0x00d7, 0x2244 },
  187. { 0x00d9, 0x0809 },
  188. { 0x00da, 0x0000 },
  189. { 0x00db, 0x0008 },
  190. { 0x00dc, 0x00c0 },
  191. { 0x00dd, 0x6724 },
  192. { 0x00de, 0x3131 },
  193. { 0x00df, 0x0008 },
  194. { 0x00e0, 0x4000 },
  195. { 0x00e1, 0x3131 },
  196. { 0x00e4, 0x400c },
  197. { 0x00e5, 0x8031 },
  198. { 0x00ea, 0xb320 },
  199. { 0x00eb, 0x0000 },
  200. { 0x00ec, 0xb300 },
  201. { 0x00ed, 0x0000 },
  202. { 0x00f0, 0x0000 },
  203. { 0x00f1, 0x0202 },
  204. { 0x00f2, 0x0ddd },
  205. { 0x00f3, 0x0ddd },
  206. { 0x00f4, 0x0ddd },
  207. { 0x00f6, 0x0000 },
  208. { 0x00f7, 0x0000 },
  209. { 0x00f8, 0x0000 },
  210. { 0x00f9, 0x0000 },
  211. { 0x00fa, 0x8000 },
  212. { 0x00fb, 0x0000 },
  213. { 0x00fc, 0x0000 },
  214. { 0x00fd, 0x0001 },
  215. { 0x00fe, 0x10ec },
  216. { 0x00ff, 0x6311 },
  217. { 0x0100, 0xaaaa },
  218. { 0x010a, 0xaaaa },
  219. { 0x010b, 0x00a0 },
  220. { 0x010c, 0xaeae },
  221. { 0x010d, 0xaaaa },
  222. { 0x010e, 0xaaa8 },
  223. { 0x010f, 0xa0aa },
  224. { 0x0110, 0xe02a },
  225. { 0x0111, 0xa702 },
  226. { 0x0112, 0xaaaa },
  227. { 0x0113, 0x2800 },
  228. { 0x0116, 0x0000 },
  229. { 0x0117, 0x0f00 },
  230. { 0x011a, 0x0020 },
  231. { 0x011b, 0x0011 },
  232. { 0x011c, 0x0150 },
  233. { 0x011d, 0x0000 },
  234. { 0x011e, 0x0000 },
  235. { 0x011f, 0x0000 },
  236. { 0x0120, 0x0000 },
  237. { 0x0121, 0x009b },
  238. { 0x0122, 0x5014 },
  239. { 0x0123, 0x0421 },
  240. { 0x0124, 0x7cea },
  241. { 0x0125, 0x0420 },
  242. { 0x0126, 0x5550 },
  243. { 0x0132, 0x0000 },
  244. { 0x0133, 0x0000 },
  245. { 0x0137, 0x5055 },
  246. { 0x0138, 0x3700 },
  247. { 0x0139, 0x79a1 },
  248. { 0x013a, 0x2020 },
  249. { 0x013b, 0x2020 },
  250. { 0x013c, 0x2005 },
  251. { 0x013e, 0x1f00 },
  252. { 0x013f, 0x0000 },
  253. { 0x0145, 0x0002 },
  254. { 0x0146, 0x0000 },
  255. { 0x0147, 0x0000 },
  256. { 0x0148, 0x0000 },
  257. { 0x0150, 0x1813 },
  258. { 0x0151, 0x0690 },
  259. { 0x0152, 0x1c17 },
  260. { 0x0153, 0x6883 },
  261. { 0x0154, 0xd3ce },
  262. { 0x0155, 0x352d },
  263. { 0x0156, 0x00eb },
  264. { 0x0157, 0x3717 },
  265. { 0x0158, 0x4c6a },
  266. { 0x0159, 0xe41b },
  267. { 0x015a, 0x2a13 },
  268. { 0x015b, 0xb600 },
  269. { 0x015c, 0xc730 },
  270. { 0x015d, 0x35d4 },
  271. { 0x015e, 0x00bf },
  272. { 0x0160, 0x0ec0 },
  273. { 0x0161, 0x0020 },
  274. { 0x0162, 0x0080 },
  275. { 0x0163, 0x0800 },
  276. { 0x0164, 0x0000 },
  277. { 0x0165, 0x0000 },
  278. { 0x0166, 0x0000 },
  279. { 0x0167, 0x001f },
  280. { 0x0170, 0x4e80 },
  281. { 0x0171, 0x0020 },
  282. { 0x0172, 0x0080 },
  283. { 0x0173, 0x0800 },
  284. { 0x0174, 0x000c },
  285. { 0x0175, 0x0000 },
  286. { 0x0190, 0x3300 },
  287. { 0x0191, 0x2200 },
  288. { 0x0192, 0x0000 },
  289. { 0x01b0, 0x4b38 },
  290. { 0x01b1, 0x0000 },
  291. { 0x01b2, 0x0000 },
  292. { 0x01b3, 0x0000 },
  293. { 0x01c0, 0x0045 },
  294. { 0x01c1, 0x0540 },
  295. { 0x01c2, 0x0000 },
  296. { 0x01c3, 0x0030 },
  297. { 0x01c7, 0x0000 },
  298. { 0x01c8, 0x5757 },
  299. { 0x01c9, 0x5757 },
  300. { 0x01ca, 0x5757 },
  301. { 0x01cb, 0x5757 },
  302. { 0x01cc, 0x5757 },
  303. { 0x01cd, 0x5757 },
  304. { 0x01ce, 0x006f },
  305. { 0x01da, 0x0000 },
  306. { 0x01db, 0x0000 },
  307. { 0x01de, 0x7d00 },
  308. { 0x01df, 0x10c0 },
  309. { 0x01e0, 0x06a1 },
  310. { 0x01e1, 0x0000 },
  311. { 0x01e2, 0x0000 },
  312. { 0x01e3, 0x0000 },
  313. { 0x01e4, 0x0001 },
  314. { 0x01e6, 0x0000 },
  315. { 0x01e7, 0x0000 },
  316. { 0x01e8, 0x0000 },
  317. { 0x01ea, 0x0000 },
  318. { 0x01eb, 0x0000 },
  319. { 0x01ec, 0x0000 },
  320. { 0x01ed, 0x0000 },
  321. { 0x01ee, 0x0000 },
  322. { 0x01ef, 0x0000 },
  323. { 0x01f0, 0x0000 },
  324. { 0x01f1, 0x0000 },
  325. { 0x01f2, 0x0000 },
  326. { 0x01f6, 0x1e04 },
  327. { 0x01f7, 0x01a1 },
  328. { 0x01f8, 0x0000 },
  329. { 0x01f9, 0x0000 },
  330. { 0x01fa, 0x0002 },
  331. { 0x01fb, 0x0000 },
  332. { 0x01fc, 0x0000 },
  333. { 0x01fd, 0x0000 },
  334. { 0x01fe, 0x0000 },
  335. { 0x0200, 0x066c },
  336. { 0x0201, 0x7fff },
  337. { 0x0202, 0x7fff },
  338. { 0x0203, 0x0000 },
  339. { 0x0204, 0x0000 },
  340. { 0x0205, 0x0000 },
  341. { 0x0206, 0x0000 },
  342. { 0x0207, 0x0000 },
  343. { 0x0208, 0x0000 },
  344. { 0x0256, 0x0000 },
  345. { 0x0257, 0x0000 },
  346. { 0x0258, 0x0000 },
  347. { 0x0259, 0x0000 },
  348. { 0x025a, 0x0000 },
  349. { 0x025b, 0x3333 },
  350. { 0x025c, 0x3333 },
  351. { 0x025d, 0x3333 },
  352. { 0x025e, 0x0000 },
  353. { 0x025f, 0x0000 },
  354. { 0x0260, 0x0000 },
  355. { 0x0261, 0x0022 },
  356. { 0x0262, 0x0300 },
  357. { 0x0265, 0x1e80 },
  358. { 0x0266, 0x0131 },
  359. { 0x0267, 0x0003 },
  360. { 0x0268, 0x0000 },
  361. { 0x0269, 0x0000 },
  362. { 0x026a, 0x0000 },
  363. { 0x026b, 0x0000 },
  364. { 0x026c, 0x0000 },
  365. { 0x026d, 0x0000 },
  366. { 0x026e, 0x0000 },
  367. { 0x026f, 0x0000 },
  368. { 0x0270, 0x0000 },
  369. { 0x0271, 0x0000 },
  370. { 0x0272, 0x0000 },
  371. { 0x0273, 0x0000 },
  372. { 0x0280, 0x0000 },
  373. { 0x0281, 0x0000 },
  374. { 0x0282, 0x0418 },
  375. { 0x0283, 0x7fff },
  376. { 0x0284, 0x7000 },
  377. { 0x0290, 0x01d0 },
  378. { 0x0291, 0x0100 },
  379. { 0x02fa, 0x0000 },
  380. { 0x02fb, 0x0000 },
  381. { 0x02fc, 0x0000 },
  382. { 0x0300, 0x001f },
  383. { 0x0301, 0x032c },
  384. { 0x0302, 0x5f21 },
  385. { 0x0303, 0x4000 },
  386. { 0x0304, 0x4000 },
  387. { 0x0305, 0x0600 },
  388. { 0x0306, 0x8000 },
  389. { 0x0307, 0x0700 },
  390. { 0x0308, 0x001f },
  391. { 0x0309, 0x032c },
  392. { 0x030a, 0x5f21 },
  393. { 0x030b, 0x4000 },
  394. { 0x030c, 0x4000 },
  395. { 0x030d, 0x0600 },
  396. { 0x030e, 0x8000 },
  397. { 0x030f, 0x0700 },
  398. { 0x0310, 0x4560 },
  399. { 0x0311, 0xa4a8 },
  400. { 0x0312, 0x7418 },
  401. { 0x0313, 0x0000 },
  402. { 0x0314, 0x0006 },
  403. { 0x0315, 0x00ff },
  404. { 0x0316, 0xc400 },
  405. { 0x0317, 0x4560 },
  406. { 0x0318, 0xa4a8 },
  407. { 0x0319, 0x7418 },
  408. { 0x031a, 0x0000 },
  409. { 0x031b, 0x0006 },
  410. { 0x031c, 0x00ff },
  411. { 0x031d, 0xc400 },
  412. { 0x0320, 0x0f20 },
  413. { 0x0321, 0x8700 },
  414. { 0x0322, 0x7dc2 },
  415. { 0x0323, 0xa178 },
  416. { 0x0324, 0x5383 },
  417. { 0x0325, 0x7dc2 },
  418. { 0x0326, 0xa178 },
  419. { 0x0327, 0x5383 },
  420. { 0x0328, 0x003e },
  421. { 0x0329, 0x02c1 },
  422. { 0x032a, 0xd37d },
  423. { 0x0330, 0x00a6 },
  424. { 0x0331, 0x04c3 },
  425. { 0x0332, 0x27c8 },
  426. { 0x0333, 0xbf50 },
  427. { 0x0334, 0x0045 },
  428. { 0x0335, 0x2007 },
  429. { 0x0336, 0x7418 },
  430. { 0x0337, 0x0501 },
  431. { 0x0338, 0x0000 },
  432. { 0x0339, 0x0010 },
  433. { 0x033a, 0x1010 },
  434. { 0x0340, 0x0800 },
  435. { 0x0341, 0x0800 },
  436. { 0x0342, 0x0800 },
  437. { 0x0343, 0x0800 },
  438. { 0x0344, 0x0000 },
  439. { 0x0345, 0x0000 },
  440. { 0x0346, 0x0000 },
  441. { 0x0347, 0x0000 },
  442. { 0x0348, 0x0000 },
  443. { 0x0349, 0x0000 },
  444. { 0x034a, 0x0000 },
  445. { 0x034b, 0x0000 },
  446. { 0x034c, 0x0000 },
  447. { 0x034d, 0x0000 },
  448. { 0x034e, 0x0000 },
  449. { 0x034f, 0x0000 },
  450. { 0x0350, 0x0000 },
  451. { 0x0351, 0x0000 },
  452. { 0x0352, 0x0000 },
  453. { 0x0353, 0x0000 },
  454. { 0x0354, 0x0000 },
  455. { 0x0355, 0x0000 },
  456. { 0x0356, 0x0000 },
  457. { 0x0357, 0x0000 },
  458. { 0x0358, 0x0000 },
  459. { 0x0359, 0x0000 },
  460. { 0x035a, 0x0000 },
  461. { 0x035b, 0x0000 },
  462. { 0x035c, 0x0000 },
  463. { 0x035d, 0x0000 },
  464. { 0x035e, 0x2000 },
  465. { 0x035f, 0x0000 },
  466. { 0x0360, 0x2000 },
  467. { 0x0361, 0x2000 },
  468. { 0x0362, 0x0000 },
  469. { 0x0363, 0x2000 },
  470. { 0x0364, 0x0200 },
  471. { 0x0365, 0x0000 },
  472. { 0x0366, 0x0000 },
  473. { 0x0367, 0x0000 },
  474. { 0x0368, 0x0000 },
  475. { 0x0369, 0x0000 },
  476. { 0x036a, 0x0000 },
  477. { 0x036b, 0x0000 },
  478. { 0x036c, 0x0000 },
  479. { 0x036d, 0x0000 },
  480. { 0x036e, 0x0200 },
  481. { 0x036f, 0x0000 },
  482. { 0x0370, 0x0000 },
  483. { 0x0371, 0x0000 },
  484. { 0x0372, 0x0000 },
  485. { 0x0373, 0x0000 },
  486. { 0x0374, 0x0000 },
  487. { 0x0375, 0x0000 },
  488. { 0x0376, 0x0000 },
  489. { 0x0377, 0x0000 },
  490. { 0x03d0, 0x0000 },
  491. { 0x03d1, 0x0000 },
  492. { 0x03d2, 0x0000 },
  493. { 0x03d3, 0x0000 },
  494. { 0x03d4, 0x2000 },
  495. { 0x03d5, 0x2000 },
  496. { 0x03d6, 0x0000 },
  497. { 0x03d7, 0x0000 },
  498. { 0x03d8, 0x2000 },
  499. { 0x03d9, 0x2000 },
  500. { 0x03da, 0x2000 },
  501. { 0x03db, 0x2000 },
  502. { 0x03dc, 0x0000 },
  503. { 0x03dd, 0x0000 },
  504. { 0x03de, 0x0000 },
  505. { 0x03df, 0x2000 },
  506. { 0x03e0, 0x0000 },
  507. { 0x03e1, 0x0000 },
  508. { 0x03e2, 0x0000 },
  509. { 0x03e3, 0x0000 },
  510. { 0x03e4, 0x0000 },
  511. { 0x03e5, 0x0000 },
  512. { 0x03e6, 0x0000 },
  513. { 0x03e7, 0x0000 },
  514. { 0x03e8, 0x0000 },
  515. { 0x03e9, 0x0000 },
  516. { 0x03ea, 0x0000 },
  517. { 0x03eb, 0x0000 },
  518. { 0x03ec, 0x0000 },
  519. { 0x03ed, 0x0000 },
  520. { 0x03ee, 0x0000 },
  521. { 0x03ef, 0x0000 },
  522. { 0x03f0, 0x0800 },
  523. { 0x03f1, 0x0800 },
  524. { 0x03f2, 0x0800 },
  525. { 0x03f3, 0x0800 },
  526. };
  527. static bool rt5659_volatile_register(struct device *dev, unsigned int reg)
  528. {
  529. switch (reg) {
  530. case RT5659_RESET:
  531. case RT5659_EJD_CTRL_2:
  532. case RT5659_SILENCE_CTRL:
  533. case RT5659_DAC2_DIG_VOL:
  534. case RT5659_HP_IMP_GAIN_2:
  535. case RT5659_PDM_OUT_CTRL:
  536. case RT5659_PDM_DATA_CTRL_1:
  537. case RT5659_PDM_DATA_CTRL_4:
  538. case RT5659_HAPTIC_GEN_CTRL_1:
  539. case RT5659_HAPTIC_GEN_CTRL_3:
  540. case RT5659_HAPTIC_LPF_CTRL_3:
  541. case RT5659_CLK_DET:
  542. case RT5659_MICBIAS_1:
  543. case RT5659_ASRC_11:
  544. case RT5659_ADC_EQ_CTRL_1:
  545. case RT5659_DAC_EQ_CTRL_1:
  546. case RT5659_INT_ST_1:
  547. case RT5659_INT_ST_2:
  548. case RT5659_GPIO_STA:
  549. case RT5659_SINE_GEN_CTRL_1:
  550. case RT5659_IL_CMD_1:
  551. case RT5659_4BTN_IL_CMD_1:
  552. case RT5659_PSV_IL_CMD_1:
  553. case RT5659_AJD1_CTRL:
  554. case RT5659_AJD2_AJD3_CTRL:
  555. case RT5659_JD_CTRL_3:
  556. case RT5659_VENDOR_ID:
  557. case RT5659_VENDOR_ID_1:
  558. case RT5659_DEVICE_ID:
  559. case RT5659_MEMORY_TEST:
  560. case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
  561. case RT5659_VOL_TEST:
  562. case RT5659_STO_NG2_CTRL_1:
  563. case RT5659_STO_NG2_CTRL_5:
  564. case RT5659_STO_NG2_CTRL_6:
  565. case RT5659_STO_NG2_CTRL_7:
  566. case RT5659_MONO_NG2_CTRL_1:
  567. case RT5659_MONO_NG2_CTRL_5:
  568. case RT5659_MONO_NG2_CTRL_6:
  569. case RT5659_HP_IMP_SENS_CTRL_1:
  570. case RT5659_HP_IMP_SENS_CTRL_3:
  571. case RT5659_HP_IMP_SENS_CTRL_4:
  572. case RT5659_HP_CALIB_CTRL_1:
  573. case RT5659_HP_CALIB_CTRL_9:
  574. case RT5659_HP_CALIB_STA_1:
  575. case RT5659_HP_CALIB_STA_2:
  576. case RT5659_HP_CALIB_STA_3:
  577. case RT5659_HP_CALIB_STA_4:
  578. case RT5659_HP_CALIB_STA_5:
  579. case RT5659_HP_CALIB_STA_6:
  580. case RT5659_HP_CALIB_STA_7:
  581. case RT5659_HP_CALIB_STA_8:
  582. case RT5659_HP_CALIB_STA_9:
  583. case RT5659_MONO_AMP_CALIB_CTRL_1:
  584. case RT5659_MONO_AMP_CALIB_CTRL_3:
  585. case RT5659_MONO_AMP_CALIB_STA_1:
  586. case RT5659_MONO_AMP_CALIB_STA_2:
  587. case RT5659_MONO_AMP_CALIB_STA_3:
  588. case RT5659_MONO_AMP_CALIB_STA_4:
  589. case RT5659_SPK_PWR_LMT_STA_1:
  590. case RT5659_SPK_PWR_LMT_STA_2:
  591. case RT5659_SPK_PWR_LMT_STA_3:
  592. case RT5659_SPK_PWR_LMT_STA_4:
  593. case RT5659_SPK_PWR_LMT_STA_5:
  594. case RT5659_SPK_PWR_LMT_STA_6:
  595. case RT5659_SPK_DC_CAILB_CTRL_1:
  596. case RT5659_SPK_DC_CAILB_STA_1:
  597. case RT5659_SPK_DC_CAILB_STA_2:
  598. case RT5659_SPK_DC_CAILB_STA_3:
  599. case RT5659_SPK_DC_CAILB_STA_4:
  600. case RT5659_SPK_DC_CAILB_STA_5:
  601. case RT5659_SPK_DC_CAILB_STA_6:
  602. case RT5659_SPK_DC_CAILB_STA_7:
  603. case RT5659_SPK_DC_CAILB_STA_8:
  604. case RT5659_SPK_DC_CAILB_STA_9:
  605. case RT5659_SPK_DC_CAILB_STA_10:
  606. case RT5659_SPK_VDD_STA_1:
  607. case RT5659_SPK_VDD_STA_2:
  608. case RT5659_SPK_DC_DET_CTRL_1:
  609. case RT5659_PURE_DC_DET_CTRL_1:
  610. case RT5659_PURE_DC_DET_CTRL_2:
  611. case RT5659_DRC1_PRIV_1:
  612. case RT5659_DRC1_PRIV_4:
  613. case RT5659_DRC1_PRIV_5:
  614. case RT5659_DRC1_PRIV_6:
  615. case RT5659_DRC1_PRIV_7:
  616. case RT5659_DRC2_PRIV_1:
  617. case RT5659_DRC2_PRIV_4:
  618. case RT5659_DRC2_PRIV_5:
  619. case RT5659_DRC2_PRIV_6:
  620. case RT5659_DRC2_PRIV_7:
  621. case RT5659_ALC_PGA_STA_1:
  622. case RT5659_ALC_PGA_STA_2:
  623. case RT5659_ALC_PGA_STA_3:
  624. return true;
  625. default:
  626. return false;
  627. }
  628. }
  629. static bool rt5659_readable_register(struct device *dev, unsigned int reg)
  630. {
  631. switch (reg) {
  632. case RT5659_RESET:
  633. case RT5659_SPO_VOL:
  634. case RT5659_HP_VOL:
  635. case RT5659_LOUT:
  636. case RT5659_MONO_OUT:
  637. case RT5659_HPL_GAIN:
  638. case RT5659_HPR_GAIN:
  639. case RT5659_MONO_GAIN:
  640. case RT5659_SPDIF_CTRL_1:
  641. case RT5659_SPDIF_CTRL_2:
  642. case RT5659_CAL_BST_CTRL:
  643. case RT5659_IN1_IN2:
  644. case RT5659_IN3_IN4:
  645. case RT5659_INL1_INR1_VOL:
  646. case RT5659_EJD_CTRL_1:
  647. case RT5659_EJD_CTRL_2:
  648. case RT5659_EJD_CTRL_3:
  649. case RT5659_SILENCE_CTRL:
  650. case RT5659_PSV_CTRL:
  651. case RT5659_SIDETONE_CTRL:
  652. case RT5659_DAC1_DIG_VOL:
  653. case RT5659_DAC2_DIG_VOL:
  654. case RT5659_DAC_CTRL:
  655. case RT5659_STO1_ADC_DIG_VOL:
  656. case RT5659_MONO_ADC_DIG_VOL:
  657. case RT5659_STO2_ADC_DIG_VOL:
  658. case RT5659_STO1_BOOST:
  659. case RT5659_MONO_BOOST:
  660. case RT5659_STO2_BOOST:
  661. case RT5659_HP_IMP_GAIN_1:
  662. case RT5659_HP_IMP_GAIN_2:
  663. case RT5659_STO1_ADC_MIXER:
  664. case RT5659_MONO_ADC_MIXER:
  665. case RT5659_AD_DA_MIXER:
  666. case RT5659_STO_DAC_MIXER:
  667. case RT5659_MONO_DAC_MIXER:
  668. case RT5659_DIG_MIXER:
  669. case RT5659_A_DAC_MUX:
  670. case RT5659_DIG_INF23_DATA:
  671. case RT5659_PDM_OUT_CTRL:
  672. case RT5659_PDM_DATA_CTRL_1:
  673. case RT5659_PDM_DATA_CTRL_2:
  674. case RT5659_PDM_DATA_CTRL_3:
  675. case RT5659_PDM_DATA_CTRL_4:
  676. case RT5659_SPDIF_CTRL:
  677. case RT5659_REC1_GAIN:
  678. case RT5659_REC1_L1_MIXER:
  679. case RT5659_REC1_L2_MIXER:
  680. case RT5659_REC1_R1_MIXER:
  681. case RT5659_REC1_R2_MIXER:
  682. case RT5659_CAL_REC:
  683. case RT5659_REC2_L1_MIXER:
  684. case RT5659_REC2_L2_MIXER:
  685. case RT5659_REC2_R1_MIXER:
  686. case RT5659_REC2_R2_MIXER:
  687. case RT5659_SPK_L_MIXER:
  688. case RT5659_SPK_R_MIXER:
  689. case RT5659_SPO_AMP_GAIN:
  690. case RT5659_ALC_BACK_GAIN:
  691. case RT5659_MONOMIX_GAIN:
  692. case RT5659_MONOMIX_IN_GAIN:
  693. case RT5659_OUT_L_GAIN:
  694. case RT5659_OUT_L_MIXER:
  695. case RT5659_OUT_R_GAIN:
  696. case RT5659_OUT_R_MIXER:
  697. case RT5659_LOUT_MIXER:
  698. case RT5659_HAPTIC_GEN_CTRL_1:
  699. case RT5659_HAPTIC_GEN_CTRL_2:
  700. case RT5659_HAPTIC_GEN_CTRL_3:
  701. case RT5659_HAPTIC_GEN_CTRL_4:
  702. case RT5659_HAPTIC_GEN_CTRL_5:
  703. case RT5659_HAPTIC_GEN_CTRL_6:
  704. case RT5659_HAPTIC_GEN_CTRL_7:
  705. case RT5659_HAPTIC_GEN_CTRL_8:
  706. case RT5659_HAPTIC_GEN_CTRL_9:
  707. case RT5659_HAPTIC_GEN_CTRL_10:
  708. case RT5659_HAPTIC_GEN_CTRL_11:
  709. case RT5659_HAPTIC_LPF_CTRL_1:
  710. case RT5659_HAPTIC_LPF_CTRL_2:
  711. case RT5659_HAPTIC_LPF_CTRL_3:
  712. case RT5659_PWR_DIG_1:
  713. case RT5659_PWR_DIG_2:
  714. case RT5659_PWR_ANLG_1:
  715. case RT5659_PWR_ANLG_2:
  716. case RT5659_PWR_ANLG_3:
  717. case RT5659_PWR_MIXER:
  718. case RT5659_PWR_VOL:
  719. case RT5659_PRIV_INDEX:
  720. case RT5659_CLK_DET:
  721. case RT5659_PRIV_DATA:
  722. case RT5659_PRE_DIV_1:
  723. case RT5659_PRE_DIV_2:
  724. case RT5659_I2S1_SDP:
  725. case RT5659_I2S2_SDP:
  726. case RT5659_I2S3_SDP:
  727. case RT5659_ADDA_CLK_1:
  728. case RT5659_ADDA_CLK_2:
  729. case RT5659_DMIC_CTRL_1:
  730. case RT5659_DMIC_CTRL_2:
  731. case RT5659_TDM_CTRL_1:
  732. case RT5659_TDM_CTRL_2:
  733. case RT5659_TDM_CTRL_3:
  734. case RT5659_TDM_CTRL_4:
  735. case RT5659_TDM_CTRL_5:
  736. case RT5659_GLB_CLK:
  737. case RT5659_PLL_CTRL_1:
  738. case RT5659_PLL_CTRL_2:
  739. case RT5659_ASRC_1:
  740. case RT5659_ASRC_2:
  741. case RT5659_ASRC_3:
  742. case RT5659_ASRC_4:
  743. case RT5659_ASRC_5:
  744. case RT5659_ASRC_6:
  745. case RT5659_ASRC_7:
  746. case RT5659_ASRC_8:
  747. case RT5659_ASRC_9:
  748. case RT5659_ASRC_10:
  749. case RT5659_DEPOP_1:
  750. case RT5659_DEPOP_2:
  751. case RT5659_DEPOP_3:
  752. case RT5659_HP_CHARGE_PUMP_1:
  753. case RT5659_HP_CHARGE_PUMP_2:
  754. case RT5659_MICBIAS_1:
  755. case RT5659_MICBIAS_2:
  756. case RT5659_ASRC_11:
  757. case RT5659_ASRC_12:
  758. case RT5659_ASRC_13:
  759. case RT5659_REC_M1_M2_GAIN_CTRL:
  760. case RT5659_RC_CLK_CTRL:
  761. case RT5659_CLASSD_CTRL_1:
  762. case RT5659_CLASSD_CTRL_2:
  763. case RT5659_ADC_EQ_CTRL_1:
  764. case RT5659_ADC_EQ_CTRL_2:
  765. case RT5659_DAC_EQ_CTRL_1:
  766. case RT5659_DAC_EQ_CTRL_2:
  767. case RT5659_DAC_EQ_CTRL_3:
  768. case RT5659_IRQ_CTRL_1:
  769. case RT5659_IRQ_CTRL_2:
  770. case RT5659_IRQ_CTRL_3:
  771. case RT5659_IRQ_CTRL_4:
  772. case RT5659_IRQ_CTRL_5:
  773. case RT5659_IRQ_CTRL_6:
  774. case RT5659_INT_ST_1:
  775. case RT5659_INT_ST_2:
  776. case RT5659_GPIO_CTRL_1:
  777. case RT5659_GPIO_CTRL_2:
  778. case RT5659_GPIO_CTRL_3:
  779. case RT5659_GPIO_CTRL_4:
  780. case RT5659_GPIO_CTRL_5:
  781. case RT5659_GPIO_STA:
  782. case RT5659_SINE_GEN_CTRL_1:
  783. case RT5659_SINE_GEN_CTRL_2:
  784. case RT5659_SINE_GEN_CTRL_3:
  785. case RT5659_HP_AMP_DET_CTRL_1:
  786. case RT5659_HP_AMP_DET_CTRL_2:
  787. case RT5659_SV_ZCD_1:
  788. case RT5659_SV_ZCD_2:
  789. case RT5659_IL_CMD_1:
  790. case RT5659_IL_CMD_2:
  791. case RT5659_IL_CMD_3:
  792. case RT5659_IL_CMD_4:
  793. case RT5659_4BTN_IL_CMD_1:
  794. case RT5659_4BTN_IL_CMD_2:
  795. case RT5659_4BTN_IL_CMD_3:
  796. case RT5659_PSV_IL_CMD_1:
  797. case RT5659_PSV_IL_CMD_2:
  798. case RT5659_ADC_STO1_HP_CTRL_1:
  799. case RT5659_ADC_STO1_HP_CTRL_2:
  800. case RT5659_ADC_MONO_HP_CTRL_1:
  801. case RT5659_ADC_MONO_HP_CTRL_2:
  802. case RT5659_AJD1_CTRL:
  803. case RT5659_AJD2_AJD3_CTRL:
  804. case RT5659_JD1_THD:
  805. case RT5659_JD2_THD:
  806. case RT5659_JD3_THD:
  807. case RT5659_JD_CTRL_1:
  808. case RT5659_JD_CTRL_2:
  809. case RT5659_JD_CTRL_3:
  810. case RT5659_JD_CTRL_4:
  811. case RT5659_DIG_MISC:
  812. case RT5659_DUMMY_2:
  813. case RT5659_DUMMY_3:
  814. case RT5659_VENDOR_ID:
  815. case RT5659_VENDOR_ID_1:
  816. case RT5659_DEVICE_ID:
  817. case RT5659_DAC_ADC_DIG_VOL:
  818. case RT5659_BIAS_CUR_CTRL_1:
  819. case RT5659_BIAS_CUR_CTRL_2:
  820. case RT5659_BIAS_CUR_CTRL_3:
  821. case RT5659_BIAS_CUR_CTRL_4:
  822. case RT5659_BIAS_CUR_CTRL_5:
  823. case RT5659_BIAS_CUR_CTRL_6:
  824. case RT5659_BIAS_CUR_CTRL_7:
  825. case RT5659_BIAS_CUR_CTRL_8:
  826. case RT5659_BIAS_CUR_CTRL_9:
  827. case RT5659_BIAS_CUR_CTRL_10:
  828. case RT5659_MEMORY_TEST:
  829. case RT5659_VREF_REC_OP_FB_CAP_CTRL:
  830. case RT5659_CLASSD_0:
  831. case RT5659_CLASSD_1:
  832. case RT5659_CLASSD_2:
  833. case RT5659_CLASSD_3:
  834. case RT5659_CLASSD_4:
  835. case RT5659_CLASSD_5:
  836. case RT5659_CLASSD_6:
  837. case RT5659_CLASSD_7:
  838. case RT5659_CLASSD_8:
  839. case RT5659_CLASSD_9:
  840. case RT5659_CLASSD_10:
  841. case RT5659_CHARGE_PUMP_1:
  842. case RT5659_CHARGE_PUMP_2:
  843. case RT5659_DIG_IN_CTRL_1:
  844. case RT5659_DIG_IN_CTRL_2:
  845. case RT5659_PAD_DRIVING_CTRL:
  846. case RT5659_SOFT_RAMP_DEPOP:
  847. case RT5659_PLL:
  848. case RT5659_CHOP_DAC:
  849. case RT5659_CHOP_ADC:
  850. case RT5659_CALIB_ADC_CTRL:
  851. case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
  852. case RT5659_VOL_TEST:
  853. case RT5659_TEST_MODE_CTRL_1:
  854. case RT5659_TEST_MODE_CTRL_2:
  855. case RT5659_TEST_MODE_CTRL_3:
  856. case RT5659_TEST_MODE_CTRL_4:
  857. case RT5659_BASSBACK_CTRL:
  858. case RT5659_MP3_PLUS_CTRL_1:
  859. case RT5659_MP3_PLUS_CTRL_2:
  860. case RT5659_MP3_HPF_A1:
  861. case RT5659_MP3_HPF_A2:
  862. case RT5659_MP3_HPF_H0:
  863. case RT5659_MP3_LPF_H0:
  864. case RT5659_3D_SPK_CTRL:
  865. case RT5659_3D_SPK_COEF_1:
  866. case RT5659_3D_SPK_COEF_2:
  867. case RT5659_3D_SPK_COEF_3:
  868. case RT5659_3D_SPK_COEF_4:
  869. case RT5659_3D_SPK_COEF_5:
  870. case RT5659_3D_SPK_COEF_6:
  871. case RT5659_3D_SPK_COEF_7:
  872. case RT5659_STO_NG2_CTRL_1:
  873. case RT5659_STO_NG2_CTRL_2:
  874. case RT5659_STO_NG2_CTRL_3:
  875. case RT5659_STO_NG2_CTRL_4:
  876. case RT5659_STO_NG2_CTRL_5:
  877. case RT5659_STO_NG2_CTRL_6:
  878. case RT5659_STO_NG2_CTRL_7:
  879. case RT5659_STO_NG2_CTRL_8:
  880. case RT5659_MONO_NG2_CTRL_1:
  881. case RT5659_MONO_NG2_CTRL_2:
  882. case RT5659_MONO_NG2_CTRL_3:
  883. case RT5659_MONO_NG2_CTRL_4:
  884. case RT5659_MONO_NG2_CTRL_5:
  885. case RT5659_MONO_NG2_CTRL_6:
  886. case RT5659_MID_HP_AMP_DET:
  887. case RT5659_LOW_HP_AMP_DET:
  888. case RT5659_LDO_CTRL:
  889. case RT5659_HP_DECROSS_CTRL_1:
  890. case RT5659_HP_DECROSS_CTRL_2:
  891. case RT5659_HP_DECROSS_CTRL_3:
  892. case RT5659_HP_DECROSS_CTRL_4:
  893. case RT5659_HP_IMP_SENS_CTRL_1:
  894. case RT5659_HP_IMP_SENS_CTRL_2:
  895. case RT5659_HP_IMP_SENS_CTRL_3:
  896. case RT5659_HP_IMP_SENS_CTRL_4:
  897. case RT5659_HP_IMP_SENS_MAP_1:
  898. case RT5659_HP_IMP_SENS_MAP_2:
  899. case RT5659_HP_IMP_SENS_MAP_3:
  900. case RT5659_HP_IMP_SENS_MAP_4:
  901. case RT5659_HP_IMP_SENS_MAP_5:
  902. case RT5659_HP_IMP_SENS_MAP_6:
  903. case RT5659_HP_IMP_SENS_MAP_7:
  904. case RT5659_HP_IMP_SENS_MAP_8:
  905. case RT5659_HP_LOGIC_CTRL_1:
  906. case RT5659_HP_LOGIC_CTRL_2:
  907. case RT5659_HP_CALIB_CTRL_1:
  908. case RT5659_HP_CALIB_CTRL_2:
  909. case RT5659_HP_CALIB_CTRL_3:
  910. case RT5659_HP_CALIB_CTRL_4:
  911. case RT5659_HP_CALIB_CTRL_5:
  912. case RT5659_HP_CALIB_CTRL_6:
  913. case RT5659_HP_CALIB_CTRL_7:
  914. case RT5659_HP_CALIB_CTRL_9:
  915. case RT5659_HP_CALIB_CTRL_10:
  916. case RT5659_HP_CALIB_CTRL_11:
  917. case RT5659_HP_CALIB_STA_1:
  918. case RT5659_HP_CALIB_STA_2:
  919. case RT5659_HP_CALIB_STA_3:
  920. case RT5659_HP_CALIB_STA_4:
  921. case RT5659_HP_CALIB_STA_5:
  922. case RT5659_HP_CALIB_STA_6:
  923. case RT5659_HP_CALIB_STA_7:
  924. case RT5659_HP_CALIB_STA_8:
  925. case RT5659_HP_CALIB_STA_9:
  926. case RT5659_MONO_AMP_CALIB_CTRL_1:
  927. case RT5659_MONO_AMP_CALIB_CTRL_2:
  928. case RT5659_MONO_AMP_CALIB_CTRL_3:
  929. case RT5659_MONO_AMP_CALIB_CTRL_4:
  930. case RT5659_MONO_AMP_CALIB_CTRL_5:
  931. case RT5659_MONO_AMP_CALIB_STA_1:
  932. case RT5659_MONO_AMP_CALIB_STA_2:
  933. case RT5659_MONO_AMP_CALIB_STA_3:
  934. case RT5659_MONO_AMP_CALIB_STA_4:
  935. case RT5659_SPK_PWR_LMT_CTRL_1:
  936. case RT5659_SPK_PWR_LMT_CTRL_2:
  937. case RT5659_SPK_PWR_LMT_CTRL_3:
  938. case RT5659_SPK_PWR_LMT_STA_1:
  939. case RT5659_SPK_PWR_LMT_STA_2:
  940. case RT5659_SPK_PWR_LMT_STA_3:
  941. case RT5659_SPK_PWR_LMT_STA_4:
  942. case RT5659_SPK_PWR_LMT_STA_5:
  943. case RT5659_SPK_PWR_LMT_STA_6:
  944. case RT5659_FLEX_SPK_BST_CTRL_1:
  945. case RT5659_FLEX_SPK_BST_CTRL_2:
  946. case RT5659_FLEX_SPK_BST_CTRL_3:
  947. case RT5659_FLEX_SPK_BST_CTRL_4:
  948. case RT5659_SPK_EX_LMT_CTRL_1:
  949. case RT5659_SPK_EX_LMT_CTRL_2:
  950. case RT5659_SPK_EX_LMT_CTRL_3:
  951. case RT5659_SPK_EX_LMT_CTRL_4:
  952. case RT5659_SPK_EX_LMT_CTRL_5:
  953. case RT5659_SPK_EX_LMT_CTRL_6:
  954. case RT5659_SPK_EX_LMT_CTRL_7:
  955. case RT5659_ADJ_HPF_CTRL_1:
  956. case RT5659_ADJ_HPF_CTRL_2:
  957. case RT5659_SPK_DC_CAILB_CTRL_1:
  958. case RT5659_SPK_DC_CAILB_CTRL_2:
  959. case RT5659_SPK_DC_CAILB_CTRL_3:
  960. case RT5659_SPK_DC_CAILB_CTRL_4:
  961. case RT5659_SPK_DC_CAILB_CTRL_5:
  962. case RT5659_SPK_DC_CAILB_STA_1:
  963. case RT5659_SPK_DC_CAILB_STA_2:
  964. case RT5659_SPK_DC_CAILB_STA_3:
  965. case RT5659_SPK_DC_CAILB_STA_4:
  966. case RT5659_SPK_DC_CAILB_STA_5:
  967. case RT5659_SPK_DC_CAILB_STA_6:
  968. case RT5659_SPK_DC_CAILB_STA_7:
  969. case RT5659_SPK_DC_CAILB_STA_8:
  970. case RT5659_SPK_DC_CAILB_STA_9:
  971. case RT5659_SPK_DC_CAILB_STA_10:
  972. case RT5659_SPK_VDD_STA_1:
  973. case RT5659_SPK_VDD_STA_2:
  974. case RT5659_SPK_DC_DET_CTRL_1:
  975. case RT5659_SPK_DC_DET_CTRL_2:
  976. case RT5659_SPK_DC_DET_CTRL_3:
  977. case RT5659_PURE_DC_DET_CTRL_1:
  978. case RT5659_PURE_DC_DET_CTRL_2:
  979. case RT5659_DUMMY_4:
  980. case RT5659_DUMMY_5:
  981. case RT5659_DUMMY_6:
  982. case RT5659_DRC1_CTRL_1:
  983. case RT5659_DRC1_CTRL_2:
  984. case RT5659_DRC1_CTRL_3:
  985. case RT5659_DRC1_CTRL_4:
  986. case RT5659_DRC1_CTRL_5:
  987. case RT5659_DRC1_CTRL_6:
  988. case RT5659_DRC1_HARD_LMT_CTRL_1:
  989. case RT5659_DRC1_HARD_LMT_CTRL_2:
  990. case RT5659_DRC2_CTRL_1:
  991. case RT5659_DRC2_CTRL_2:
  992. case RT5659_DRC2_CTRL_3:
  993. case RT5659_DRC2_CTRL_4:
  994. case RT5659_DRC2_CTRL_5:
  995. case RT5659_DRC2_CTRL_6:
  996. case RT5659_DRC2_HARD_LMT_CTRL_1:
  997. case RT5659_DRC2_HARD_LMT_CTRL_2:
  998. case RT5659_DRC1_PRIV_1:
  999. case RT5659_DRC1_PRIV_2:
  1000. case RT5659_DRC1_PRIV_3:
  1001. case RT5659_DRC1_PRIV_4:
  1002. case RT5659_DRC1_PRIV_5:
  1003. case RT5659_DRC1_PRIV_6:
  1004. case RT5659_DRC1_PRIV_7:
  1005. case RT5659_DRC2_PRIV_1:
  1006. case RT5659_DRC2_PRIV_2:
  1007. case RT5659_DRC2_PRIV_3:
  1008. case RT5659_DRC2_PRIV_4:
  1009. case RT5659_DRC2_PRIV_5:
  1010. case RT5659_DRC2_PRIV_6:
  1011. case RT5659_DRC2_PRIV_7:
  1012. case RT5659_MULTI_DRC_CTRL:
  1013. case RT5659_CROSS_OVER_1:
  1014. case RT5659_CROSS_OVER_2:
  1015. case RT5659_CROSS_OVER_3:
  1016. case RT5659_CROSS_OVER_4:
  1017. case RT5659_CROSS_OVER_5:
  1018. case RT5659_CROSS_OVER_6:
  1019. case RT5659_CROSS_OVER_7:
  1020. case RT5659_CROSS_OVER_8:
  1021. case RT5659_CROSS_OVER_9:
  1022. case RT5659_CROSS_OVER_10:
  1023. case RT5659_ALC_PGA_CTRL_1:
  1024. case RT5659_ALC_PGA_CTRL_2:
  1025. case RT5659_ALC_PGA_CTRL_3:
  1026. case RT5659_ALC_PGA_CTRL_4:
  1027. case RT5659_ALC_PGA_CTRL_5:
  1028. case RT5659_ALC_PGA_CTRL_6:
  1029. case RT5659_ALC_PGA_CTRL_7:
  1030. case RT5659_ALC_PGA_CTRL_8:
  1031. case RT5659_ALC_PGA_STA_1:
  1032. case RT5659_ALC_PGA_STA_2:
  1033. case RT5659_ALC_PGA_STA_3:
  1034. case RT5659_DAC_L_EQ_PRE_VOL:
  1035. case RT5659_DAC_R_EQ_PRE_VOL:
  1036. case RT5659_DAC_L_EQ_POST_VOL:
  1037. case RT5659_DAC_R_EQ_POST_VOL:
  1038. case RT5659_DAC_L_EQ_LPF1_A1:
  1039. case RT5659_DAC_L_EQ_LPF1_H0:
  1040. case RT5659_DAC_R_EQ_LPF1_A1:
  1041. case RT5659_DAC_R_EQ_LPF1_H0:
  1042. case RT5659_DAC_L_EQ_BPF2_A1:
  1043. case RT5659_DAC_L_EQ_BPF2_A2:
  1044. case RT5659_DAC_L_EQ_BPF2_H0:
  1045. case RT5659_DAC_R_EQ_BPF2_A1:
  1046. case RT5659_DAC_R_EQ_BPF2_A2:
  1047. case RT5659_DAC_R_EQ_BPF2_H0:
  1048. case RT5659_DAC_L_EQ_BPF3_A1:
  1049. case RT5659_DAC_L_EQ_BPF3_A2:
  1050. case RT5659_DAC_L_EQ_BPF3_H0:
  1051. case RT5659_DAC_R_EQ_BPF3_A1:
  1052. case RT5659_DAC_R_EQ_BPF3_A2:
  1053. case RT5659_DAC_R_EQ_BPF3_H0:
  1054. case RT5659_DAC_L_EQ_BPF4_A1:
  1055. case RT5659_DAC_L_EQ_BPF4_A2:
  1056. case RT5659_DAC_L_EQ_BPF4_H0:
  1057. case RT5659_DAC_R_EQ_BPF4_A1:
  1058. case RT5659_DAC_R_EQ_BPF4_A2:
  1059. case RT5659_DAC_R_EQ_BPF4_H0:
  1060. case RT5659_DAC_L_EQ_HPF1_A1:
  1061. case RT5659_DAC_L_EQ_HPF1_H0:
  1062. case RT5659_DAC_R_EQ_HPF1_A1:
  1063. case RT5659_DAC_R_EQ_HPF1_H0:
  1064. case RT5659_DAC_L_EQ_HPF2_A1:
  1065. case RT5659_DAC_L_EQ_HPF2_A2:
  1066. case RT5659_DAC_L_EQ_HPF2_H0:
  1067. case RT5659_DAC_R_EQ_HPF2_A1:
  1068. case RT5659_DAC_R_EQ_HPF2_A2:
  1069. case RT5659_DAC_R_EQ_HPF2_H0:
  1070. case RT5659_DAC_L_BI_EQ_BPF1_H0_1:
  1071. case RT5659_DAC_L_BI_EQ_BPF1_H0_2:
  1072. case RT5659_DAC_L_BI_EQ_BPF1_B1_1:
  1073. case RT5659_DAC_L_BI_EQ_BPF1_B1_2:
  1074. case RT5659_DAC_L_BI_EQ_BPF1_B2_1:
  1075. case RT5659_DAC_L_BI_EQ_BPF1_B2_2:
  1076. case RT5659_DAC_L_BI_EQ_BPF1_A1_1:
  1077. case RT5659_DAC_L_BI_EQ_BPF1_A1_2:
  1078. case RT5659_DAC_L_BI_EQ_BPF1_A2_1:
  1079. case RT5659_DAC_L_BI_EQ_BPF1_A2_2:
  1080. case RT5659_DAC_R_BI_EQ_BPF1_H0_1:
  1081. case RT5659_DAC_R_BI_EQ_BPF1_H0_2:
  1082. case RT5659_DAC_R_BI_EQ_BPF1_B1_1:
  1083. case RT5659_DAC_R_BI_EQ_BPF1_B1_2:
  1084. case RT5659_DAC_R_BI_EQ_BPF1_B2_1:
  1085. case RT5659_DAC_R_BI_EQ_BPF1_B2_2:
  1086. case RT5659_DAC_R_BI_EQ_BPF1_A1_1:
  1087. case RT5659_DAC_R_BI_EQ_BPF1_A1_2:
  1088. case RT5659_DAC_R_BI_EQ_BPF1_A2_1:
  1089. case RT5659_DAC_R_BI_EQ_BPF1_A2_2:
  1090. case RT5659_ADC_L_EQ_LPF1_A1:
  1091. case RT5659_ADC_R_EQ_LPF1_A1:
  1092. case RT5659_ADC_L_EQ_LPF1_H0:
  1093. case RT5659_ADC_R_EQ_LPF1_H0:
  1094. case RT5659_ADC_L_EQ_BPF1_A1:
  1095. case RT5659_ADC_R_EQ_BPF1_A1:
  1096. case RT5659_ADC_L_EQ_BPF1_A2:
  1097. case RT5659_ADC_R_EQ_BPF1_A2:
  1098. case RT5659_ADC_L_EQ_BPF1_H0:
  1099. case RT5659_ADC_R_EQ_BPF1_H0:
  1100. case RT5659_ADC_L_EQ_BPF2_A1:
  1101. case RT5659_ADC_R_EQ_BPF2_A1:
  1102. case RT5659_ADC_L_EQ_BPF2_A2:
  1103. case RT5659_ADC_R_EQ_BPF2_A2:
  1104. case RT5659_ADC_L_EQ_BPF2_H0:
  1105. case RT5659_ADC_R_EQ_BPF2_H0:
  1106. case RT5659_ADC_L_EQ_BPF3_A1:
  1107. case RT5659_ADC_R_EQ_BPF3_A1:
  1108. case RT5659_ADC_L_EQ_BPF3_A2:
  1109. case RT5659_ADC_R_EQ_BPF3_A2:
  1110. case RT5659_ADC_L_EQ_BPF3_H0:
  1111. case RT5659_ADC_R_EQ_BPF3_H0:
  1112. case RT5659_ADC_L_EQ_BPF4_A1:
  1113. case RT5659_ADC_R_EQ_BPF4_A1:
  1114. case RT5659_ADC_L_EQ_BPF4_A2:
  1115. case RT5659_ADC_R_EQ_BPF4_A2:
  1116. case RT5659_ADC_L_EQ_BPF4_H0:
  1117. case RT5659_ADC_R_EQ_BPF4_H0:
  1118. case RT5659_ADC_L_EQ_HPF1_A1:
  1119. case RT5659_ADC_R_EQ_HPF1_A1:
  1120. case RT5659_ADC_L_EQ_HPF1_H0:
  1121. case RT5659_ADC_R_EQ_HPF1_H0:
  1122. case RT5659_ADC_L_EQ_PRE_VOL:
  1123. case RT5659_ADC_R_EQ_PRE_VOL:
  1124. case RT5659_ADC_L_EQ_POST_VOL:
  1125. case RT5659_ADC_R_EQ_POST_VOL:
  1126. return true;
  1127. default:
  1128. return false;
  1129. }
  1130. }
  1131. static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2325, 75, 0);
  1132. static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
  1133. static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
  1134. static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
  1135. static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
  1136. static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
  1137. static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
  1138. /* Interface data select */
  1139. static const char * const rt5659_data_select[] = {
  1140. "L/R", "R/L", "L/L", "R/R"
  1141. };
  1142. static SOC_ENUM_SINGLE_DECL(rt5659_if1_01_adc_enum,
  1143. RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT01_SFT, rt5659_data_select);
  1144. static SOC_ENUM_SINGLE_DECL(rt5659_if1_23_adc_enum,
  1145. RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT23_SFT, rt5659_data_select);
  1146. static SOC_ENUM_SINGLE_DECL(rt5659_if1_45_adc_enum,
  1147. RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT45_SFT, rt5659_data_select);
  1148. static SOC_ENUM_SINGLE_DECL(rt5659_if1_67_adc_enum,
  1149. RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT67_SFT, rt5659_data_select);
  1150. static SOC_ENUM_SINGLE_DECL(rt5659_if2_dac_enum,
  1151. RT5659_DIG_INF23_DATA, RT5659_IF2_DAC_SEL_SFT, rt5659_data_select);
  1152. static SOC_ENUM_SINGLE_DECL(rt5659_if2_adc_enum,
  1153. RT5659_DIG_INF23_DATA, RT5659_IF2_ADC_SEL_SFT, rt5659_data_select);
  1154. static SOC_ENUM_SINGLE_DECL(rt5659_if3_dac_enum,
  1155. RT5659_DIG_INF23_DATA, RT5659_IF3_DAC_SEL_SFT, rt5659_data_select);
  1156. static SOC_ENUM_SINGLE_DECL(rt5659_if3_adc_enum,
  1157. RT5659_DIG_INF23_DATA, RT5659_IF3_ADC_SEL_SFT, rt5659_data_select);
  1158. static const struct snd_kcontrol_new rt5659_if1_01_adc_swap_mux =
  1159. SOC_DAPM_ENUM("IF1 01 ADC Swap Source", rt5659_if1_01_adc_enum);
  1160. static const struct snd_kcontrol_new rt5659_if1_23_adc_swap_mux =
  1161. SOC_DAPM_ENUM("IF1 23 ADC1 Swap Source", rt5659_if1_23_adc_enum);
  1162. static const struct snd_kcontrol_new rt5659_if1_45_adc_swap_mux =
  1163. SOC_DAPM_ENUM("IF1 45 ADC1 Swap Source", rt5659_if1_45_adc_enum);
  1164. static const struct snd_kcontrol_new rt5659_if1_67_adc_swap_mux =
  1165. SOC_DAPM_ENUM("IF1 67 ADC1 Swap Source", rt5659_if1_67_adc_enum);
  1166. static const struct snd_kcontrol_new rt5659_if2_dac_swap_mux =
  1167. SOC_DAPM_ENUM("IF2 DAC Swap Source", rt5659_if2_dac_enum);
  1168. static const struct snd_kcontrol_new rt5659_if2_adc_swap_mux =
  1169. SOC_DAPM_ENUM("IF2 ADC Swap Source", rt5659_if2_adc_enum);
  1170. static const struct snd_kcontrol_new rt5659_if3_dac_swap_mux =
  1171. SOC_DAPM_ENUM("IF3 DAC Swap Source", rt5659_if3_dac_enum);
  1172. static const struct snd_kcontrol_new rt5659_if3_adc_swap_mux =
  1173. SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5659_if3_adc_enum);
  1174. static int rt5659_hp_vol_put(struct snd_kcontrol *kcontrol,
  1175. struct snd_ctl_elem_value *ucontrol)
  1176. {
  1177. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  1178. int ret = snd_soc_put_volsw(kcontrol, ucontrol);
  1179. if (snd_soc_component_read(component, RT5659_STO_NG2_CTRL_1) & RT5659_NG2_EN) {
  1180. snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
  1181. RT5659_NG2_EN_MASK, RT5659_NG2_DIS);
  1182. snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
  1183. RT5659_NG2_EN_MASK, RT5659_NG2_EN);
  1184. }
  1185. return ret;
  1186. }
  1187. static void rt5659_enable_push_button_irq(struct snd_soc_component *component,
  1188. bool enable)
  1189. {
  1190. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  1191. if (enable) {
  1192. snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, 0x000b);
  1193. /* MICBIAS1 and Mic Det Power for button detect*/
  1194. snd_soc_dapm_force_enable_pin(dapm, "MICBIAS1");
  1195. snd_soc_dapm_force_enable_pin(dapm,
  1196. "Mic Det Power");
  1197. snd_soc_dapm_sync(dapm);
  1198. snd_soc_component_update_bits(component, RT5659_PWR_ANLG_2,
  1199. RT5659_PWR_MB1, RT5659_PWR_MB1);
  1200. snd_soc_component_update_bits(component, RT5659_PWR_VOL,
  1201. RT5659_PWR_MIC_DET, RT5659_PWR_MIC_DET);
  1202. snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
  1203. RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
  1204. snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
  1205. RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
  1206. } else {
  1207. snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
  1208. RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_DIS);
  1209. snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
  1210. RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_DIS);
  1211. /* MICBIAS1 and Mic Det Power for button detect*/
  1212. snd_soc_dapm_disable_pin(dapm, "MICBIAS1");
  1213. snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
  1214. snd_soc_dapm_sync(dapm);
  1215. }
  1216. }
  1217. /**
  1218. * rt5659_headset_detect - Detect headset.
  1219. * @component: SoC audio component device.
  1220. * @jack_insert: Jack insert or not.
  1221. *
  1222. * Detect whether is headset or not when jack inserted.
  1223. *
  1224. * Returns detect status.
  1225. */
  1226. static int rt5659_headset_detect(struct snd_soc_component *component, int jack_insert)
  1227. {
  1228. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  1229. int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30};
  1230. int reg_63;
  1231. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  1232. if (jack_insert) {
  1233. snd_soc_dapm_force_enable_pin(dapm,
  1234. "Mic Det Power");
  1235. snd_soc_dapm_sync(dapm);
  1236. reg_63 = snd_soc_component_read(component, RT5659_PWR_ANLG_1);
  1237. snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
  1238. RT5659_PWR_VREF2 | RT5659_PWR_MB,
  1239. RT5659_PWR_VREF2 | RT5659_PWR_MB);
  1240. msleep(20);
  1241. snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
  1242. RT5659_PWR_FV2, RT5659_PWR_FV2);
  1243. snd_soc_component_write(component, RT5659_EJD_CTRL_2, 0x4160);
  1244. snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
  1245. 0x20, 0x0);
  1246. msleep(20);
  1247. snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
  1248. 0x20, 0x20);
  1249. while (i < 5) {
  1250. msleep(sleep_time[i]);
  1251. val = snd_soc_component_read(component, RT5659_EJD_CTRL_2) & 0x0003;
  1252. i++;
  1253. if (val == 0x1 || val == 0x2 || val == 0x3)
  1254. break;
  1255. }
  1256. switch (val) {
  1257. case 1:
  1258. rt5659->jack_type = SND_JACK_HEADSET;
  1259. rt5659_enable_push_button_irq(component, true);
  1260. break;
  1261. default:
  1262. snd_soc_component_write(component, RT5659_PWR_ANLG_1, reg_63);
  1263. rt5659->jack_type = SND_JACK_HEADPHONE;
  1264. snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
  1265. snd_soc_dapm_sync(dapm);
  1266. break;
  1267. }
  1268. } else {
  1269. snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
  1270. snd_soc_dapm_sync(dapm);
  1271. if (rt5659->jack_type == SND_JACK_HEADSET)
  1272. rt5659_enable_push_button_irq(component, false);
  1273. rt5659->jack_type = 0;
  1274. }
  1275. dev_dbg(component->dev, "jack_type = %d\n", rt5659->jack_type);
  1276. return rt5659->jack_type;
  1277. }
  1278. static int rt5659_button_detect(struct snd_soc_component *component)
  1279. {
  1280. int btn_type, val;
  1281. val = snd_soc_component_read(component, RT5659_4BTN_IL_CMD_1);
  1282. btn_type = val & 0xfff0;
  1283. snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, val);
  1284. return btn_type;
  1285. }
  1286. static irqreturn_t rt5659_irq(int irq, void *data)
  1287. {
  1288. struct rt5659_priv *rt5659 = data;
  1289. queue_delayed_work(system_power_efficient_wq,
  1290. &rt5659->jack_detect_work, msecs_to_jiffies(250));
  1291. return IRQ_HANDLED;
  1292. }
  1293. int rt5659_set_jack_detect(struct snd_soc_component *component,
  1294. struct snd_soc_jack *hs_jack)
  1295. {
  1296. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  1297. rt5659->hs_jack = hs_jack;
  1298. rt5659_irq(0, rt5659);
  1299. return 0;
  1300. }
  1301. EXPORT_SYMBOL_GPL(rt5659_set_jack_detect);
  1302. static void rt5659_jack_detect_work(struct work_struct *work)
  1303. {
  1304. struct rt5659_priv *rt5659 =
  1305. container_of(work, struct rt5659_priv, jack_detect_work.work);
  1306. int val, btn_type, report = 0;
  1307. if (!rt5659->component)
  1308. return;
  1309. val = snd_soc_component_read(rt5659->component, RT5659_INT_ST_1) & 0x0080;
  1310. if (!val) {
  1311. /* jack in */
  1312. if (rt5659->jack_type == 0) {
  1313. /* jack was out, report jack type */
  1314. report = rt5659_headset_detect(rt5659->component, 1);
  1315. } else {
  1316. /* jack is already in, report button event */
  1317. report = SND_JACK_HEADSET;
  1318. btn_type = rt5659_button_detect(rt5659->component);
  1319. /**
  1320. * rt5659 can report three kinds of button behavior,
  1321. * one click, double click and hold. However,
  1322. * currently we will report button pressed/released
  1323. * event. So all the three button behaviors are
  1324. * treated as button pressed.
  1325. */
  1326. switch (btn_type) {
  1327. case 0x8000:
  1328. case 0x4000:
  1329. case 0x2000:
  1330. report |= SND_JACK_BTN_0;
  1331. break;
  1332. case 0x1000:
  1333. case 0x0800:
  1334. case 0x0400:
  1335. report |= SND_JACK_BTN_1;
  1336. break;
  1337. case 0x0200:
  1338. case 0x0100:
  1339. case 0x0080:
  1340. report |= SND_JACK_BTN_2;
  1341. break;
  1342. case 0x0040:
  1343. case 0x0020:
  1344. case 0x0010:
  1345. report |= SND_JACK_BTN_3;
  1346. break;
  1347. case 0x0000: /* unpressed */
  1348. break;
  1349. default:
  1350. btn_type = 0;
  1351. dev_err(rt5659->component->dev,
  1352. "Unexpected button code 0x%04x\n",
  1353. btn_type);
  1354. break;
  1355. }
  1356. /* button release or spurious interrput*/
  1357. if (btn_type == 0)
  1358. report = rt5659->jack_type;
  1359. }
  1360. } else {
  1361. /* jack out */
  1362. report = rt5659_headset_detect(rt5659->component, 0);
  1363. }
  1364. snd_soc_jack_report(rt5659->hs_jack, report, SND_JACK_HEADSET |
  1365. SND_JACK_BTN_0 | SND_JACK_BTN_1 |
  1366. SND_JACK_BTN_2 | SND_JACK_BTN_3);
  1367. }
  1368. static void rt5659_jack_detect_intel_hd_header(struct work_struct *work)
  1369. {
  1370. struct rt5659_priv *rt5659 =
  1371. container_of(work, struct rt5659_priv, jack_detect_work.work);
  1372. unsigned int value;
  1373. bool hp_flag, mic_flag;
  1374. if (!rt5659->hs_jack)
  1375. return;
  1376. /* headphone jack */
  1377. regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
  1378. hp_flag = (!(value & 0x8)) ? true : false;
  1379. if (hp_flag != rt5659->hda_hp_plugged) {
  1380. rt5659->hda_hp_plugged = hp_flag;
  1381. if (hp_flag) {
  1382. regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
  1383. 0x10, 0x0);
  1384. rt5659->jack_type |= SND_JACK_HEADPHONE;
  1385. } else {
  1386. regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
  1387. 0x10, 0x10);
  1388. rt5659->jack_type = rt5659->jack_type &
  1389. (~SND_JACK_HEADPHONE);
  1390. }
  1391. snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
  1392. SND_JACK_HEADPHONE);
  1393. }
  1394. /* mic jack */
  1395. regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
  1396. regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
  1397. mic_flag = (value & 0x2000) ? true : false;
  1398. if (mic_flag != rt5659->hda_mic_plugged) {
  1399. rt5659->hda_mic_plugged = mic_flag;
  1400. if (mic_flag) {
  1401. regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
  1402. 0x2, 0x2);
  1403. rt5659->jack_type |= SND_JACK_MICROPHONE;
  1404. } else {
  1405. regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
  1406. 0x2, 0x0);
  1407. rt5659->jack_type = rt5659->jack_type
  1408. & (~SND_JACK_MICROPHONE);
  1409. }
  1410. snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
  1411. SND_JACK_MICROPHONE);
  1412. }
  1413. }
  1414. static const struct snd_kcontrol_new rt5659_snd_controls[] = {
  1415. /* Speaker Output Volume */
  1416. SOC_DOUBLE_TLV("Speaker Playback Volume", RT5659_SPO_VOL,
  1417. RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
  1418. /* Headphone Output Volume */
  1419. SOC_DOUBLE_R_EXT_TLV("Headphone Playback Volume", RT5659_HPL_GAIN,
  1420. RT5659_HPR_GAIN, RT5659_G_HP_SFT, 31, 1, snd_soc_get_volsw,
  1421. rt5659_hp_vol_put, hp_vol_tlv),
  1422. /* Mono Output Volume */
  1423. SOC_SINGLE_TLV("Mono Playback Volume", RT5659_MONO_OUT,
  1424. RT5659_L_VOL_SFT, 39, 1, out_vol_tlv),
  1425. /* Output Volume */
  1426. SOC_DOUBLE_TLV("OUT Playback Volume", RT5659_LOUT,
  1427. RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
  1428. /* DAC Digital Volume */
  1429. SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5659_DAC1_DIG_VOL,
  1430. RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
  1431. SOC_DOUBLE("DAC1 Playback Switch", RT5659_AD_DA_MIXER,
  1432. RT5659_M_DAC1_L_SFT, RT5659_M_DAC1_R_SFT, 1, 1),
  1433. SOC_DOUBLE_TLV("DAC2 Playback Volume", RT5659_DAC2_DIG_VOL,
  1434. RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
  1435. SOC_DOUBLE("DAC2 Playback Switch", RT5659_DAC_CTRL,
  1436. RT5659_M_DAC2_L_VOL_SFT, RT5659_M_DAC2_R_VOL_SFT, 1, 1),
  1437. /* IN1/IN2/IN3/IN4 Volume */
  1438. SOC_SINGLE_TLV("IN1 Boost Volume", RT5659_IN1_IN2,
  1439. RT5659_BST1_SFT, 69, 0, in_bst_tlv),
  1440. SOC_SINGLE_TLV("IN2 Boost Volume", RT5659_IN1_IN2,
  1441. RT5659_BST2_SFT, 69, 0, in_bst_tlv),
  1442. SOC_SINGLE_TLV("IN3 Boost Volume", RT5659_IN3_IN4,
  1443. RT5659_BST3_SFT, 69, 0, in_bst_tlv),
  1444. SOC_SINGLE_TLV("IN4 Boost Volume", RT5659_IN3_IN4,
  1445. RT5659_BST4_SFT, 69, 0, in_bst_tlv),
  1446. /* INL/INR Volume Control */
  1447. SOC_DOUBLE_TLV("IN Capture Volume", RT5659_INL1_INR1_VOL,
  1448. RT5659_INL_VOL_SFT, RT5659_INR_VOL_SFT, 31, 1, in_vol_tlv),
  1449. /* ADC Digital Volume Control */
  1450. SOC_DOUBLE("STO1 ADC Capture Switch", RT5659_STO1_ADC_DIG_VOL,
  1451. RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
  1452. SOC_DOUBLE_TLV("STO1 ADC Capture Volume", RT5659_STO1_ADC_DIG_VOL,
  1453. RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
  1454. SOC_DOUBLE("Mono ADC Capture Switch", RT5659_MONO_ADC_DIG_VOL,
  1455. RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
  1456. SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5659_MONO_ADC_DIG_VOL,
  1457. RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
  1458. SOC_DOUBLE("STO2 ADC Capture Switch", RT5659_STO2_ADC_DIG_VOL,
  1459. RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
  1460. SOC_DOUBLE_TLV("STO2 ADC Capture Volume", RT5659_STO2_ADC_DIG_VOL,
  1461. RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
  1462. /* ADC Boost Volume Control */
  1463. SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5659_STO1_BOOST,
  1464. RT5659_STO1_ADC_L_BST_SFT, RT5659_STO1_ADC_R_BST_SFT,
  1465. 3, 0, adc_bst_tlv),
  1466. SOC_DOUBLE_TLV("Mono ADC Boost Gain Volume", RT5659_MONO_BOOST,
  1467. RT5659_MONO_ADC_L_BST_SFT, RT5659_MONO_ADC_R_BST_SFT,
  1468. 3, 0, adc_bst_tlv),
  1469. SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5659_STO2_BOOST,
  1470. RT5659_STO2_ADC_L_BST_SFT, RT5659_STO2_ADC_R_BST_SFT,
  1471. 3, 0, adc_bst_tlv),
  1472. SOC_SINGLE("DAC IF1 DAC1 L Data Switch", RT5659_TDM_CTRL_4, 12, 7, 0),
  1473. SOC_SINGLE("DAC IF1 DAC1 R Data Switch", RT5659_TDM_CTRL_4, 8, 7, 0),
  1474. SOC_SINGLE("DAC IF1 DAC2 L Data Switch", RT5659_TDM_CTRL_4, 4, 7, 0),
  1475. SOC_SINGLE("DAC IF1 DAC2 R Data Switch", RT5659_TDM_CTRL_4, 0, 7, 0),
  1476. };
  1477. /**
  1478. * set_dmic_clk - Set parameter of dmic.
  1479. *
  1480. * @w: DAPM widget.
  1481. * @kcontrol: The kcontrol of this widget.
  1482. * @event: Event id.
  1483. *
  1484. * Choose dmic clock between 1MHz and 3MHz.
  1485. * It is better for clock to approximate 3MHz.
  1486. */
  1487. static int set_dmic_clk(struct snd_soc_dapm_widget *w,
  1488. struct snd_kcontrol *kcontrol, int event)
  1489. {
  1490. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  1491. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  1492. int pd, idx;
  1493. pd = rl6231_get_pre_div(rt5659->regmap,
  1494. RT5659_ADDA_CLK_1, RT5659_I2S_PD1_SFT);
  1495. idx = rl6231_calc_dmic_clk(rt5659->sysclk / pd);
  1496. if (idx < 0)
  1497. dev_err(component->dev, "Failed to set DMIC clock\n");
  1498. else {
  1499. snd_soc_component_update_bits(component, RT5659_DMIC_CTRL_1,
  1500. RT5659_DMIC_CLK_MASK, idx << RT5659_DMIC_CLK_SFT);
  1501. }
  1502. return idx;
  1503. }
  1504. static int set_adc1_clk(struct snd_soc_dapm_widget *w,
  1505. struct snd_kcontrol *kcontrol, int event)
  1506. {
  1507. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  1508. switch (event) {
  1509. case SND_SOC_DAPM_POST_PMU:
  1510. snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
  1511. RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK,
  1512. RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK);
  1513. break;
  1514. case SND_SOC_DAPM_PRE_PMD:
  1515. snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
  1516. RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, 0);
  1517. break;
  1518. default:
  1519. return 0;
  1520. }
  1521. return 0;
  1522. }
  1523. static int set_adc2_clk(struct snd_soc_dapm_widget *w,
  1524. struct snd_kcontrol *kcontrol, int event)
  1525. {
  1526. struct snd_soc_component *component =
  1527. snd_soc_dapm_to_component(w->dapm);
  1528. switch (event) {
  1529. case SND_SOC_DAPM_POST_PMU:
  1530. snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
  1531. RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK,
  1532. RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK);
  1533. break;
  1534. case SND_SOC_DAPM_PRE_PMD:
  1535. snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
  1536. RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, 0);
  1537. break;
  1538. default:
  1539. return 0;
  1540. }
  1541. return 0;
  1542. }
  1543. static int rt5659_charge_pump_event(struct snd_soc_dapm_widget *w,
  1544. struct snd_kcontrol *kcontrol, int event)
  1545. {
  1546. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  1547. switch (event) {
  1548. case SND_SOC_DAPM_PRE_PMU:
  1549. /* Depop */
  1550. snd_soc_component_write(component, RT5659_DEPOP_1, 0x0009);
  1551. break;
  1552. case SND_SOC_DAPM_POST_PMD:
  1553. snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
  1554. break;
  1555. default:
  1556. return 0;
  1557. }
  1558. return 0;
  1559. }
  1560. static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *w,
  1561. struct snd_soc_dapm_widget *sink)
  1562. {
  1563. unsigned int val;
  1564. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  1565. val = snd_soc_component_read(component, RT5659_GLB_CLK);
  1566. val &= RT5659_SCLK_SRC_MASK;
  1567. if (val == RT5659_SCLK_SRC_PLL1)
  1568. return 1;
  1569. else
  1570. return 0;
  1571. }
  1572. static int is_using_asrc(struct snd_soc_dapm_widget *w,
  1573. struct snd_soc_dapm_widget *sink)
  1574. {
  1575. unsigned int reg, shift, val;
  1576. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  1577. switch (w->shift) {
  1578. case RT5659_ADC_MONO_R_ASRC_SFT:
  1579. reg = RT5659_ASRC_3;
  1580. shift = RT5659_AD_MONO_R_T_SFT;
  1581. break;
  1582. case RT5659_ADC_MONO_L_ASRC_SFT:
  1583. reg = RT5659_ASRC_3;
  1584. shift = RT5659_AD_MONO_L_T_SFT;
  1585. break;
  1586. case RT5659_ADC_STO1_ASRC_SFT:
  1587. reg = RT5659_ASRC_2;
  1588. shift = RT5659_AD_STO1_T_SFT;
  1589. break;
  1590. case RT5659_DAC_MONO_R_ASRC_SFT:
  1591. reg = RT5659_ASRC_2;
  1592. shift = RT5659_DA_MONO_R_T_SFT;
  1593. break;
  1594. case RT5659_DAC_MONO_L_ASRC_SFT:
  1595. reg = RT5659_ASRC_2;
  1596. shift = RT5659_DA_MONO_L_T_SFT;
  1597. break;
  1598. case RT5659_DAC_STO_ASRC_SFT:
  1599. reg = RT5659_ASRC_2;
  1600. shift = RT5659_DA_STO_T_SFT;
  1601. break;
  1602. default:
  1603. return 0;
  1604. }
  1605. val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
  1606. switch (val) {
  1607. case 1:
  1608. case 2:
  1609. case 3:
  1610. /* I2S_Pre_Div1 should be 1 in asrc mode */
  1611. snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
  1612. RT5659_I2S_PD1_MASK, RT5659_I2S_PD1_2);
  1613. return 1;
  1614. default:
  1615. return 0;
  1616. }
  1617. }
  1618. /* Digital Mixer */
  1619. static const struct snd_kcontrol_new rt5659_sto1_adc_l_mix[] = {
  1620. SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
  1621. RT5659_M_STO1_ADC_L1_SFT, 1, 1),
  1622. SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
  1623. RT5659_M_STO1_ADC_L2_SFT, 1, 1),
  1624. };
  1625. static const struct snd_kcontrol_new rt5659_sto1_adc_r_mix[] = {
  1626. SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
  1627. RT5659_M_STO1_ADC_R1_SFT, 1, 1),
  1628. SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
  1629. RT5659_M_STO1_ADC_R2_SFT, 1, 1),
  1630. };
  1631. static const struct snd_kcontrol_new rt5659_mono_adc_l_mix[] = {
  1632. SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
  1633. RT5659_M_MONO_ADC_L1_SFT, 1, 1),
  1634. SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
  1635. RT5659_M_MONO_ADC_L2_SFT, 1, 1),
  1636. };
  1637. static const struct snd_kcontrol_new rt5659_mono_adc_r_mix[] = {
  1638. SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
  1639. RT5659_M_MONO_ADC_R1_SFT, 1, 1),
  1640. SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
  1641. RT5659_M_MONO_ADC_R2_SFT, 1, 1),
  1642. };
  1643. static const struct snd_kcontrol_new rt5659_dac_l_mix[] = {
  1644. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
  1645. RT5659_M_ADCMIX_L_SFT, 1, 1),
  1646. SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
  1647. RT5659_M_DAC1_L_SFT, 1, 1),
  1648. };
  1649. static const struct snd_kcontrol_new rt5659_dac_r_mix[] = {
  1650. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
  1651. RT5659_M_ADCMIX_R_SFT, 1, 1),
  1652. SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
  1653. RT5659_M_DAC1_R_SFT, 1, 1),
  1654. };
  1655. static const struct snd_kcontrol_new rt5659_sto_dac_l_mix[] = {
  1656. SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
  1657. RT5659_M_DAC_L1_STO_L_SFT, 1, 1),
  1658. SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
  1659. RT5659_M_DAC_R1_STO_L_SFT, 1, 1),
  1660. SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
  1661. RT5659_M_DAC_L2_STO_L_SFT, 1, 1),
  1662. SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
  1663. RT5659_M_DAC_R2_STO_L_SFT, 1, 1),
  1664. };
  1665. static const struct snd_kcontrol_new rt5659_sto_dac_r_mix[] = {
  1666. SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
  1667. RT5659_M_DAC_L1_STO_R_SFT, 1, 1),
  1668. SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
  1669. RT5659_M_DAC_R1_STO_R_SFT, 1, 1),
  1670. SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
  1671. RT5659_M_DAC_L2_STO_R_SFT, 1, 1),
  1672. SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
  1673. RT5659_M_DAC_R2_STO_R_SFT, 1, 1),
  1674. };
  1675. static const struct snd_kcontrol_new rt5659_mono_dac_l_mix[] = {
  1676. SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
  1677. RT5659_M_DAC_L1_MONO_L_SFT, 1, 1),
  1678. SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
  1679. RT5659_M_DAC_R1_MONO_L_SFT, 1, 1),
  1680. SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
  1681. RT5659_M_DAC_L2_MONO_L_SFT, 1, 1),
  1682. SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
  1683. RT5659_M_DAC_R2_MONO_L_SFT, 1, 1),
  1684. };
  1685. static const struct snd_kcontrol_new rt5659_mono_dac_r_mix[] = {
  1686. SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
  1687. RT5659_M_DAC_L1_MONO_R_SFT, 1, 1),
  1688. SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
  1689. RT5659_M_DAC_R1_MONO_R_SFT, 1, 1),
  1690. SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
  1691. RT5659_M_DAC_L2_MONO_R_SFT, 1, 1),
  1692. SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
  1693. RT5659_M_DAC_R2_MONO_R_SFT, 1, 1),
  1694. };
  1695. /* Analog Input Mixer */
  1696. static const struct snd_kcontrol_new rt5659_rec1_l_mix[] = {
  1697. SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC1_L2_MIXER,
  1698. RT5659_M_SPKVOLL_RM1_L_SFT, 1, 1),
  1699. SOC_DAPM_SINGLE("INL Switch", RT5659_REC1_L2_MIXER,
  1700. RT5659_M_INL_RM1_L_SFT, 1, 1),
  1701. SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_L2_MIXER,
  1702. RT5659_M_BST4_RM1_L_SFT, 1, 1),
  1703. SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_L2_MIXER,
  1704. RT5659_M_BST3_RM1_L_SFT, 1, 1),
  1705. SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_L2_MIXER,
  1706. RT5659_M_BST2_RM1_L_SFT, 1, 1),
  1707. SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_L2_MIXER,
  1708. RT5659_M_BST1_RM1_L_SFT, 1, 1),
  1709. };
  1710. static const struct snd_kcontrol_new rt5659_rec1_r_mix[] = {
  1711. SOC_DAPM_SINGLE("HPOVOLR Switch", RT5659_REC1_L2_MIXER,
  1712. RT5659_M_HPOVOLR_RM1_R_SFT, 1, 1),
  1713. SOC_DAPM_SINGLE("INR Switch", RT5659_REC1_R2_MIXER,
  1714. RT5659_M_INR_RM1_R_SFT, 1, 1),
  1715. SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_R2_MIXER,
  1716. RT5659_M_BST4_RM1_R_SFT, 1, 1),
  1717. SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_R2_MIXER,
  1718. RT5659_M_BST3_RM1_R_SFT, 1, 1),
  1719. SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_R2_MIXER,
  1720. RT5659_M_BST2_RM1_R_SFT, 1, 1),
  1721. SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_R2_MIXER,
  1722. RT5659_M_BST1_RM1_R_SFT, 1, 1),
  1723. };
  1724. static const struct snd_kcontrol_new rt5659_rec2_l_mix[] = {
  1725. SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC2_L2_MIXER,
  1726. RT5659_M_SPKVOL_RM2_L_SFT, 1, 1),
  1727. SOC_DAPM_SINGLE("OUTVOLL Switch", RT5659_REC2_L2_MIXER,
  1728. RT5659_M_OUTVOLL_RM2_L_SFT, 1, 1),
  1729. SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_L2_MIXER,
  1730. RT5659_M_BST4_RM2_L_SFT, 1, 1),
  1731. SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_L2_MIXER,
  1732. RT5659_M_BST3_RM2_L_SFT, 1, 1),
  1733. SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_L2_MIXER,
  1734. RT5659_M_BST2_RM2_L_SFT, 1, 1),
  1735. SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_L2_MIXER,
  1736. RT5659_M_BST1_RM2_L_SFT, 1, 1),
  1737. };
  1738. static const struct snd_kcontrol_new rt5659_rec2_r_mix[] = {
  1739. SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_REC2_R2_MIXER,
  1740. RT5659_M_MONOVOL_RM2_R_SFT, 1, 1),
  1741. SOC_DAPM_SINGLE("OUTVOLR Switch", RT5659_REC2_R2_MIXER,
  1742. RT5659_M_OUTVOLR_RM2_R_SFT, 1, 1),
  1743. SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_R2_MIXER,
  1744. RT5659_M_BST4_RM2_R_SFT, 1, 1),
  1745. SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_R2_MIXER,
  1746. RT5659_M_BST3_RM2_R_SFT, 1, 1),
  1747. SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_R2_MIXER,
  1748. RT5659_M_BST2_RM2_R_SFT, 1, 1),
  1749. SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_R2_MIXER,
  1750. RT5659_M_BST1_RM2_R_SFT, 1, 1),
  1751. };
  1752. static const struct snd_kcontrol_new rt5659_spk_l_mix[] = {
  1753. SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPK_L_MIXER,
  1754. RT5659_M_DAC_L2_SM_L_SFT, 1, 1),
  1755. SOC_DAPM_SINGLE("BST1 Switch", RT5659_SPK_L_MIXER,
  1756. RT5659_M_BST1_SM_L_SFT, 1, 1),
  1757. SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_L_MIXER,
  1758. RT5659_M_IN_L_SM_L_SFT, 1, 1),
  1759. SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_L_MIXER,
  1760. RT5659_M_IN_R_SM_L_SFT, 1, 1),
  1761. SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_L_MIXER,
  1762. RT5659_M_BST3_SM_L_SFT, 1, 1),
  1763. };
  1764. static const struct snd_kcontrol_new rt5659_spk_r_mix[] = {
  1765. SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPK_R_MIXER,
  1766. RT5659_M_DAC_R2_SM_R_SFT, 1, 1),
  1767. SOC_DAPM_SINGLE("BST4 Switch", RT5659_SPK_R_MIXER,
  1768. RT5659_M_BST4_SM_R_SFT, 1, 1),
  1769. SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_R_MIXER,
  1770. RT5659_M_IN_L_SM_R_SFT, 1, 1),
  1771. SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_R_MIXER,
  1772. RT5659_M_IN_R_SM_R_SFT, 1, 1),
  1773. SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_R_MIXER,
  1774. RT5659_M_BST3_SM_R_SFT, 1, 1),
  1775. };
  1776. static const struct snd_kcontrol_new rt5659_monovol_mix[] = {
  1777. SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
  1778. RT5659_M_DAC_L2_MM_SFT, 1, 1),
  1779. SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONOMIX_IN_GAIN,
  1780. RT5659_M_DAC_R2_MM_SFT, 1, 1),
  1781. SOC_DAPM_SINGLE("BST1 Switch", RT5659_MONOMIX_IN_GAIN,
  1782. RT5659_M_BST1_MM_SFT, 1, 1),
  1783. SOC_DAPM_SINGLE("BST2 Switch", RT5659_MONOMIX_IN_GAIN,
  1784. RT5659_M_BST2_MM_SFT, 1, 1),
  1785. SOC_DAPM_SINGLE("BST3 Switch", RT5659_MONOMIX_IN_GAIN,
  1786. RT5659_M_BST3_MM_SFT, 1, 1),
  1787. };
  1788. static const struct snd_kcontrol_new rt5659_out_l_mix[] = {
  1789. SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_OUT_L_MIXER,
  1790. RT5659_M_DAC_L2_OM_L_SFT, 1, 1),
  1791. SOC_DAPM_SINGLE("INL Switch", RT5659_OUT_L_MIXER,
  1792. RT5659_M_IN_L_OM_L_SFT, 1, 1),
  1793. SOC_DAPM_SINGLE("BST1 Switch", RT5659_OUT_L_MIXER,
  1794. RT5659_M_BST1_OM_L_SFT, 1, 1),
  1795. SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_L_MIXER,
  1796. RT5659_M_BST2_OM_L_SFT, 1, 1),
  1797. SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_L_MIXER,
  1798. RT5659_M_BST3_OM_L_SFT, 1, 1),
  1799. };
  1800. static const struct snd_kcontrol_new rt5659_out_r_mix[] = {
  1801. SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_OUT_R_MIXER,
  1802. RT5659_M_DAC_R2_OM_R_SFT, 1, 1),
  1803. SOC_DAPM_SINGLE("INR Switch", RT5659_OUT_R_MIXER,
  1804. RT5659_M_IN_R_OM_R_SFT, 1, 1),
  1805. SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_R_MIXER,
  1806. RT5659_M_BST2_OM_R_SFT, 1, 1),
  1807. SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_R_MIXER,
  1808. RT5659_M_BST3_OM_R_SFT, 1, 1),
  1809. SOC_DAPM_SINGLE("BST4 Switch", RT5659_OUT_R_MIXER,
  1810. RT5659_M_BST4_OM_R_SFT, 1, 1),
  1811. };
  1812. static const struct snd_kcontrol_new rt5659_spo_l_mix[] = {
  1813. SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPO_AMP_GAIN,
  1814. RT5659_M_DAC_L2_SPKOMIX_SFT, 1, 0),
  1815. SOC_DAPM_SINGLE("SPKVOL L Switch", RT5659_SPO_AMP_GAIN,
  1816. RT5659_M_SPKVOLL_SPKOMIX_SFT, 1, 0),
  1817. };
  1818. static const struct snd_kcontrol_new rt5659_spo_r_mix[] = {
  1819. SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPO_AMP_GAIN,
  1820. RT5659_M_DAC_R2_SPKOMIX_SFT, 1, 0),
  1821. SOC_DAPM_SINGLE("SPKVOL R Switch", RT5659_SPO_AMP_GAIN,
  1822. RT5659_M_SPKVOLR_SPKOMIX_SFT, 1, 0),
  1823. };
  1824. static const struct snd_kcontrol_new rt5659_mono_mix[] = {
  1825. SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
  1826. RT5659_M_DAC_L2_MA_SFT, 1, 1),
  1827. SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_MONOMIX_IN_GAIN,
  1828. RT5659_M_MONOVOL_MA_SFT, 1, 1),
  1829. };
  1830. static const struct snd_kcontrol_new rt5659_lout_l_mix[] = {
  1831. SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_LOUT_MIXER,
  1832. RT5659_M_DAC_L2_LM_SFT, 1, 1),
  1833. SOC_DAPM_SINGLE("OUTVOL L Switch", RT5659_LOUT_MIXER,
  1834. RT5659_M_OV_L_LM_SFT, 1, 1),
  1835. };
  1836. static const struct snd_kcontrol_new rt5659_lout_r_mix[] = {
  1837. SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_LOUT_MIXER,
  1838. RT5659_M_DAC_R2_LM_SFT, 1, 1),
  1839. SOC_DAPM_SINGLE("OUTVOL R Switch", RT5659_LOUT_MIXER,
  1840. RT5659_M_OV_R_LM_SFT, 1, 1),
  1841. };
  1842. /*DAC L2, DAC R2*/
  1843. /*MX-1B [6:4], MX-1B [2:0]*/
  1844. static const char * const rt5659_dac2_src[] = {
  1845. "IF1 DAC2", "IF2 DAC", "IF3 DAC", "Mono ADC MIX"
  1846. };
  1847. static SOC_ENUM_SINGLE_DECL(
  1848. rt5659_dac_l2_enum, RT5659_DAC_CTRL,
  1849. RT5659_DAC_L2_SEL_SFT, rt5659_dac2_src);
  1850. static const struct snd_kcontrol_new rt5659_dac_l2_mux =
  1851. SOC_DAPM_ENUM("DAC L2 Source", rt5659_dac_l2_enum);
  1852. static SOC_ENUM_SINGLE_DECL(
  1853. rt5659_dac_r2_enum, RT5659_DAC_CTRL,
  1854. RT5659_DAC_R2_SEL_SFT, rt5659_dac2_src);
  1855. static const struct snd_kcontrol_new rt5659_dac_r2_mux =
  1856. SOC_DAPM_ENUM("DAC R2 Source", rt5659_dac_r2_enum);
  1857. /* STO1 ADC1 Source */
  1858. /* MX-26 [13] */
  1859. static const char * const rt5659_sto1_adc1_src[] = {
  1860. "DAC MIX", "ADC"
  1861. };
  1862. static SOC_ENUM_SINGLE_DECL(
  1863. rt5659_sto1_adc1_enum, RT5659_STO1_ADC_MIXER,
  1864. RT5659_STO1_ADC1_SRC_SFT, rt5659_sto1_adc1_src);
  1865. static const struct snd_kcontrol_new rt5659_sto1_adc1_mux =
  1866. SOC_DAPM_ENUM("Stereo1 ADC1 Source", rt5659_sto1_adc1_enum);
  1867. /* STO1 ADC Source */
  1868. /* MX-26 [12] */
  1869. static const char * const rt5659_sto1_adc_src[] = {
  1870. "ADC1", "ADC2"
  1871. };
  1872. static SOC_ENUM_SINGLE_DECL(
  1873. rt5659_sto1_adc_enum, RT5659_STO1_ADC_MIXER,
  1874. RT5659_STO1_ADC_SRC_SFT, rt5659_sto1_adc_src);
  1875. static const struct snd_kcontrol_new rt5659_sto1_adc_mux =
  1876. SOC_DAPM_ENUM("Stereo1 ADC Source", rt5659_sto1_adc_enum);
  1877. /* STO1 ADC2 Source */
  1878. /* MX-26 [11] */
  1879. static const char * const rt5659_sto1_adc2_src[] = {
  1880. "DAC MIX", "DMIC"
  1881. };
  1882. static SOC_ENUM_SINGLE_DECL(
  1883. rt5659_sto1_adc2_enum, RT5659_STO1_ADC_MIXER,
  1884. RT5659_STO1_ADC2_SRC_SFT, rt5659_sto1_adc2_src);
  1885. static const struct snd_kcontrol_new rt5659_sto1_adc2_mux =
  1886. SOC_DAPM_ENUM("Stereo1 ADC2 Source", rt5659_sto1_adc2_enum);
  1887. /* STO1 DMIC Source */
  1888. /* MX-26 [8] */
  1889. static const char * const rt5659_sto1_dmic_src[] = {
  1890. "DMIC1", "DMIC2"
  1891. };
  1892. static SOC_ENUM_SINGLE_DECL(
  1893. rt5659_sto1_dmic_enum, RT5659_STO1_ADC_MIXER,
  1894. RT5659_STO1_DMIC_SRC_SFT, rt5659_sto1_dmic_src);
  1895. static const struct snd_kcontrol_new rt5659_sto1_dmic_mux =
  1896. SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5659_sto1_dmic_enum);
  1897. /* MONO ADC L2 Source */
  1898. /* MX-27 [12] */
  1899. static const char * const rt5659_mono_adc_l2_src[] = {
  1900. "Mono DAC MIXL", "DMIC"
  1901. };
  1902. static SOC_ENUM_SINGLE_DECL(
  1903. rt5659_mono_adc_l2_enum, RT5659_MONO_ADC_MIXER,
  1904. RT5659_MONO_ADC_L2_SRC_SFT, rt5659_mono_adc_l2_src);
  1905. static const struct snd_kcontrol_new rt5659_mono_adc_l2_mux =
  1906. SOC_DAPM_ENUM("Mono ADC L2 Source", rt5659_mono_adc_l2_enum);
  1907. /* MONO ADC L1 Source */
  1908. /* MX-27 [11] */
  1909. static const char * const rt5659_mono_adc_l1_src[] = {
  1910. "Mono DAC MIXL", "ADC"
  1911. };
  1912. static SOC_ENUM_SINGLE_DECL(
  1913. rt5659_mono_adc_l1_enum, RT5659_MONO_ADC_MIXER,
  1914. RT5659_MONO_ADC_L1_SRC_SFT, rt5659_mono_adc_l1_src);
  1915. static const struct snd_kcontrol_new rt5659_mono_adc_l1_mux =
  1916. SOC_DAPM_ENUM("Mono ADC L1 Source", rt5659_mono_adc_l1_enum);
  1917. /* MONO ADC L Source, MONO ADC R Source*/
  1918. /* MX-27 [10:9], MX-27 [2:1] */
  1919. static const char * const rt5659_mono_adc_src[] = {
  1920. "ADC1 L", "ADC1 R", "ADC2 L", "ADC2 R"
  1921. };
  1922. static SOC_ENUM_SINGLE_DECL(
  1923. rt5659_mono_adc_l_enum, RT5659_MONO_ADC_MIXER,
  1924. RT5659_MONO_ADC_L_SRC_SFT, rt5659_mono_adc_src);
  1925. static const struct snd_kcontrol_new rt5659_mono_adc_l_mux =
  1926. SOC_DAPM_ENUM("Mono ADC L Source", rt5659_mono_adc_l_enum);
  1927. static SOC_ENUM_SINGLE_DECL(
  1928. rt5659_mono_adcr_enum, RT5659_MONO_ADC_MIXER,
  1929. RT5659_MONO_ADC_R_SRC_SFT, rt5659_mono_adc_src);
  1930. static const struct snd_kcontrol_new rt5659_mono_adc_r_mux =
  1931. SOC_DAPM_ENUM("Mono ADC R Source", rt5659_mono_adcr_enum);
  1932. /* MONO DMIC L Source */
  1933. /* MX-27 [8] */
  1934. static const char * const rt5659_mono_dmic_l_src[] = {
  1935. "DMIC1 L", "DMIC2 L"
  1936. };
  1937. static SOC_ENUM_SINGLE_DECL(
  1938. rt5659_mono_dmic_l_enum, RT5659_MONO_ADC_MIXER,
  1939. RT5659_MONO_DMIC_L_SRC_SFT, rt5659_mono_dmic_l_src);
  1940. static const struct snd_kcontrol_new rt5659_mono_dmic_l_mux =
  1941. SOC_DAPM_ENUM("Mono DMIC L Source", rt5659_mono_dmic_l_enum);
  1942. /* MONO ADC R2 Source */
  1943. /* MX-27 [4] */
  1944. static const char * const rt5659_mono_adc_r2_src[] = {
  1945. "Mono DAC MIXR", "DMIC"
  1946. };
  1947. static SOC_ENUM_SINGLE_DECL(
  1948. rt5659_mono_adc_r2_enum, RT5659_MONO_ADC_MIXER,
  1949. RT5659_MONO_ADC_R2_SRC_SFT, rt5659_mono_adc_r2_src);
  1950. static const struct snd_kcontrol_new rt5659_mono_adc_r2_mux =
  1951. SOC_DAPM_ENUM("Mono ADC R2 Source", rt5659_mono_adc_r2_enum);
  1952. /* MONO ADC R1 Source */
  1953. /* MX-27 [3] */
  1954. static const char * const rt5659_mono_adc_r1_src[] = {
  1955. "Mono DAC MIXR", "ADC"
  1956. };
  1957. static SOC_ENUM_SINGLE_DECL(
  1958. rt5659_mono_adc_r1_enum, RT5659_MONO_ADC_MIXER,
  1959. RT5659_MONO_ADC_R1_SRC_SFT, rt5659_mono_adc_r1_src);
  1960. static const struct snd_kcontrol_new rt5659_mono_adc_r1_mux =
  1961. SOC_DAPM_ENUM("Mono ADC R1 Source", rt5659_mono_adc_r1_enum);
  1962. /* MONO DMIC R Source */
  1963. /* MX-27 [0] */
  1964. static const char * const rt5659_mono_dmic_r_src[] = {
  1965. "DMIC1 R", "DMIC2 R"
  1966. };
  1967. static SOC_ENUM_SINGLE_DECL(
  1968. rt5659_mono_dmic_r_enum, RT5659_MONO_ADC_MIXER,
  1969. RT5659_MONO_DMIC_R_SRC_SFT, rt5659_mono_dmic_r_src);
  1970. static const struct snd_kcontrol_new rt5659_mono_dmic_r_mux =
  1971. SOC_DAPM_ENUM("Mono DMIC R Source", rt5659_mono_dmic_r_enum);
  1972. /* DAC R1 Source, DAC L1 Source*/
  1973. /* MX-29 [11:10], MX-29 [9:8]*/
  1974. static const char * const rt5659_dac1_src[] = {
  1975. "IF1 DAC1", "IF2 DAC", "IF3 DAC"
  1976. };
  1977. static SOC_ENUM_SINGLE_DECL(
  1978. rt5659_dac_r1_enum, RT5659_AD_DA_MIXER,
  1979. RT5659_DAC1_R_SEL_SFT, rt5659_dac1_src);
  1980. static const struct snd_kcontrol_new rt5659_dac_r1_mux =
  1981. SOC_DAPM_ENUM("DAC R1 Source", rt5659_dac_r1_enum);
  1982. static SOC_ENUM_SINGLE_DECL(
  1983. rt5659_dac_l1_enum, RT5659_AD_DA_MIXER,
  1984. RT5659_DAC1_L_SEL_SFT, rt5659_dac1_src);
  1985. static const struct snd_kcontrol_new rt5659_dac_l1_mux =
  1986. SOC_DAPM_ENUM("DAC L1 Source", rt5659_dac_l1_enum);
  1987. /* DAC Digital Mixer L Source, DAC Digital Mixer R Source*/
  1988. /* MX-2C [6], MX-2C [4]*/
  1989. static const char * const rt5659_dig_dac_mix_src[] = {
  1990. "Stereo DAC Mixer", "Mono DAC Mixer"
  1991. };
  1992. static SOC_ENUM_SINGLE_DECL(
  1993. rt5659_dig_dac_mixl_enum, RT5659_DIG_MIXER,
  1994. RT5659_DAC_MIX_L_SFT, rt5659_dig_dac_mix_src);
  1995. static const struct snd_kcontrol_new rt5659_dig_dac_mixl_mux =
  1996. SOC_DAPM_ENUM("DAC Digital Mixer L Source", rt5659_dig_dac_mixl_enum);
  1997. static SOC_ENUM_SINGLE_DECL(
  1998. rt5659_dig_dac_mixr_enum, RT5659_DIG_MIXER,
  1999. RT5659_DAC_MIX_R_SFT, rt5659_dig_dac_mix_src);
  2000. static const struct snd_kcontrol_new rt5659_dig_dac_mixr_mux =
  2001. SOC_DAPM_ENUM("DAC Digital Mixer R Source", rt5659_dig_dac_mixr_enum);
  2002. /* Analog DAC L1 Source, Analog DAC R1 Source*/
  2003. /* MX-2D [3], MX-2D [2]*/
  2004. static const char * const rt5659_alg_dac1_src[] = {
  2005. "DAC", "Stereo DAC Mixer"
  2006. };
  2007. static SOC_ENUM_SINGLE_DECL(
  2008. rt5659_alg_dac_l1_enum, RT5659_A_DAC_MUX,
  2009. RT5659_A_DACL1_SFT, rt5659_alg_dac1_src);
  2010. static const struct snd_kcontrol_new rt5659_alg_dac_l1_mux =
  2011. SOC_DAPM_ENUM("Analog DACL1 Source", rt5659_alg_dac_l1_enum);
  2012. static SOC_ENUM_SINGLE_DECL(
  2013. rt5659_alg_dac_r1_enum, RT5659_A_DAC_MUX,
  2014. RT5659_A_DACR1_SFT, rt5659_alg_dac1_src);
  2015. static const struct snd_kcontrol_new rt5659_alg_dac_r1_mux =
  2016. SOC_DAPM_ENUM("Analog DACR1 Source", rt5659_alg_dac_r1_enum);
  2017. /* Analog DAC LR Source, Analog DAC R2 Source*/
  2018. /* MX-2D [1], MX-2D [0]*/
  2019. static const char * const rt5659_alg_dac2_src[] = {
  2020. "Stereo DAC Mixer", "Mono DAC Mixer"
  2021. };
  2022. static SOC_ENUM_SINGLE_DECL(
  2023. rt5659_alg_dac_l2_enum, RT5659_A_DAC_MUX,
  2024. RT5659_A_DACL2_SFT, rt5659_alg_dac2_src);
  2025. static const struct snd_kcontrol_new rt5659_alg_dac_l2_mux =
  2026. SOC_DAPM_ENUM("Analog DAC L2 Source", rt5659_alg_dac_l2_enum);
  2027. static SOC_ENUM_SINGLE_DECL(
  2028. rt5659_alg_dac_r2_enum, RT5659_A_DAC_MUX,
  2029. RT5659_A_DACR2_SFT, rt5659_alg_dac2_src);
  2030. static const struct snd_kcontrol_new rt5659_alg_dac_r2_mux =
  2031. SOC_DAPM_ENUM("Analog DAC R2 Source", rt5659_alg_dac_r2_enum);
  2032. /* Interface2 ADC Data Input*/
  2033. /* MX-2F [13:12] */
  2034. static const char * const rt5659_if2_adc_in_src[] = {
  2035. "IF_ADC1", "IF_ADC2", "DAC_REF", "IF_ADC3"
  2036. };
  2037. static SOC_ENUM_SINGLE_DECL(
  2038. rt5659_if2_adc_in_enum, RT5659_DIG_INF23_DATA,
  2039. RT5659_IF2_ADC_IN_SFT, rt5659_if2_adc_in_src);
  2040. static const struct snd_kcontrol_new rt5659_if2_adc_in_mux =
  2041. SOC_DAPM_ENUM("IF2 ADC IN Source", rt5659_if2_adc_in_enum);
  2042. /* Interface3 ADC Data Input*/
  2043. /* MX-2F [1:0] */
  2044. static const char * const rt5659_if3_adc_in_src[] = {
  2045. "IF_ADC1", "IF_ADC2", "DAC_REF", "Stereo2_ADC_L/R"
  2046. };
  2047. static SOC_ENUM_SINGLE_DECL(
  2048. rt5659_if3_adc_in_enum, RT5659_DIG_INF23_DATA,
  2049. RT5659_IF3_ADC_IN_SFT, rt5659_if3_adc_in_src);
  2050. static const struct snd_kcontrol_new rt5659_if3_adc_in_mux =
  2051. SOC_DAPM_ENUM("IF3 ADC IN Source", rt5659_if3_adc_in_enum);
  2052. /* PDM 1 L/R*/
  2053. /* MX-31 [15] [13] */
  2054. static const char * const rt5659_pdm_src[] = {
  2055. "Mono DAC", "Stereo DAC"
  2056. };
  2057. static SOC_ENUM_SINGLE_DECL(
  2058. rt5659_pdm_l_enum, RT5659_PDM_OUT_CTRL,
  2059. RT5659_PDM1_L_SFT, rt5659_pdm_src);
  2060. static const struct snd_kcontrol_new rt5659_pdm_l_mux =
  2061. SOC_DAPM_ENUM("PDM L Source", rt5659_pdm_l_enum);
  2062. static SOC_ENUM_SINGLE_DECL(
  2063. rt5659_pdm_r_enum, RT5659_PDM_OUT_CTRL,
  2064. RT5659_PDM1_R_SFT, rt5659_pdm_src);
  2065. static const struct snd_kcontrol_new rt5659_pdm_r_mux =
  2066. SOC_DAPM_ENUM("PDM R Source", rt5659_pdm_r_enum);
  2067. /* SPDIF Output source*/
  2068. /* MX-36 [1:0] */
  2069. static const char * const rt5659_spdif_src[] = {
  2070. "IF1_DAC1", "IF1_DAC2", "IF2_DAC", "IF3_DAC"
  2071. };
  2072. static SOC_ENUM_SINGLE_DECL(
  2073. rt5659_spdif_enum, RT5659_SPDIF_CTRL,
  2074. RT5659_SPDIF_SEL_SFT, rt5659_spdif_src);
  2075. static const struct snd_kcontrol_new rt5659_spdif_mux =
  2076. SOC_DAPM_ENUM("SPDIF Source", rt5659_spdif_enum);
  2077. /* I2S1 TDM ADCDAT Source */
  2078. /* MX-78[4:0] */
  2079. static const char * const rt5659_rx_adc_data_src[] = {
  2080. "AD1:AD2:DAC:NUL", "AD1:AD2:NUL:DAC", "AD1:DAC:AD2:NUL",
  2081. "AD1:DAC:NUL:AD2", "AD1:NUL:DAC:AD2", "AD1:NUL:AD2:DAC",
  2082. "AD2:AD1:DAC:NUL", "AD2:AD1:NUL:DAC", "AD2:DAC:AD1:NUL",
  2083. "AD2:DAC:NUL:AD1", "AD2:NUL:DAC:AD1", "AD1:NUL:AD1:DAC",
  2084. "DAC:AD1:AD2:NUL", "DAC:AD1:NUL:AD2", "DAC:AD2:AD1:NUL",
  2085. "DAC:AD2:NUL:AD1", "DAC:NUL:DAC:AD2", "DAC:NUL:AD2:DAC",
  2086. "NUL:AD1:AD2:DAC", "NUL:AD1:DAC:AD2", "NUL:AD2:AD1:DAC",
  2087. "NUL:AD2:DAC:AD1", "NUL:DAC:DAC:AD2", "NUL:DAC:AD2:DAC"
  2088. };
  2089. static SOC_ENUM_SINGLE_DECL(
  2090. rt5659_rx_adc_data_enum, RT5659_TDM_CTRL_2,
  2091. RT5659_ADCDAT_SRC_SFT, rt5659_rx_adc_data_src);
  2092. static const struct snd_kcontrol_new rt5659_rx_adc_dac_mux =
  2093. SOC_DAPM_ENUM("TDM ADCDAT Source", rt5659_rx_adc_data_enum);
  2094. /* Out Volume Switch */
  2095. static const struct snd_kcontrol_new spkvol_l_switch =
  2096. SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_L_SFT, 1, 1);
  2097. static const struct snd_kcontrol_new spkvol_r_switch =
  2098. SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_R_SFT, 1, 1);
  2099. static const struct snd_kcontrol_new monovol_switch =
  2100. SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_VOL_L_SFT, 1, 1);
  2101. static const struct snd_kcontrol_new outvol_l_switch =
  2102. SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_L_SFT, 1, 1);
  2103. static const struct snd_kcontrol_new outvol_r_switch =
  2104. SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_R_SFT, 1, 1);
  2105. /* Out Switch */
  2106. static const struct snd_kcontrol_new spo_switch =
  2107. SOC_DAPM_SINGLE("Switch", RT5659_CLASSD_2, RT5659_M_RF_DIG_SFT, 1, 1);
  2108. static const struct snd_kcontrol_new mono_switch =
  2109. SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_L_MUTE_SFT, 1, 1);
  2110. static const struct snd_kcontrol_new hpo_l_switch =
  2111. SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_L_MUTE_SFT, 1, 1);
  2112. static const struct snd_kcontrol_new hpo_r_switch =
  2113. SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_R_MUTE_SFT, 1, 1);
  2114. static const struct snd_kcontrol_new lout_l_switch =
  2115. SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_L_MUTE_SFT, 1, 1);
  2116. static const struct snd_kcontrol_new lout_r_switch =
  2117. SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_R_MUTE_SFT, 1, 1);
  2118. static const struct snd_kcontrol_new pdm_l_switch =
  2119. SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_L_SFT, 1,
  2120. 1);
  2121. static const struct snd_kcontrol_new pdm_r_switch =
  2122. SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_R_SFT, 1,
  2123. 1);
  2124. static int rt5659_spk_event(struct snd_soc_dapm_widget *w,
  2125. struct snd_kcontrol *kcontrol, int event)
  2126. {
  2127. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  2128. switch (event) {
  2129. case SND_SOC_DAPM_PRE_PMU:
  2130. snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
  2131. RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_EN);
  2132. snd_soc_component_update_bits(component, RT5659_CLASSD_2,
  2133. RT5659_M_RI_DIG, RT5659_M_RI_DIG);
  2134. snd_soc_component_write(component, RT5659_CLASSD_1, 0x0803);
  2135. snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
  2136. break;
  2137. case SND_SOC_DAPM_POST_PMD:
  2138. snd_soc_component_write(component, RT5659_CLASSD_1, 0x0011);
  2139. snd_soc_component_update_bits(component, RT5659_CLASSD_2,
  2140. RT5659_M_RI_DIG, 0x0);
  2141. snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
  2142. snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
  2143. RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_DIS);
  2144. break;
  2145. default:
  2146. return 0;
  2147. }
  2148. return 0;
  2149. }
  2150. static int rt5659_mono_event(struct snd_soc_dapm_widget *w,
  2151. struct snd_kcontrol *kcontrol, int event)
  2152. {
  2153. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  2154. switch (event) {
  2155. case SND_SOC_DAPM_PRE_PMU:
  2156. snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
  2157. break;
  2158. case SND_SOC_DAPM_POST_PMD:
  2159. snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
  2160. break;
  2161. default:
  2162. return 0;
  2163. }
  2164. return 0;
  2165. }
  2166. static int rt5659_hp_event(struct snd_soc_dapm_widget *w,
  2167. struct snd_kcontrol *kcontrol, int event)
  2168. {
  2169. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  2170. switch (event) {
  2171. case SND_SOC_DAPM_POST_PMU:
  2172. snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0e1e);
  2173. snd_soc_component_update_bits(component, RT5659_DEPOP_1, 0x0010, 0x0010);
  2174. break;
  2175. case SND_SOC_DAPM_PRE_PMD:
  2176. snd_soc_component_write(component, RT5659_DEPOP_1, 0x0000);
  2177. break;
  2178. default:
  2179. return 0;
  2180. }
  2181. return 0;
  2182. }
  2183. static int set_dmic_power(struct snd_soc_dapm_widget *w,
  2184. struct snd_kcontrol *kcontrol, int event)
  2185. {
  2186. switch (event) {
  2187. case SND_SOC_DAPM_POST_PMU:
  2188. /*Add delay to avoid pop noise*/
  2189. msleep(450);
  2190. break;
  2191. default:
  2192. return 0;
  2193. }
  2194. return 0;
  2195. }
  2196. static const struct snd_soc_dapm_widget rt5659_particular_dapm_widgets[] = {
  2197. SND_SOC_DAPM_SUPPLY("LDO2", RT5659_PWR_ANLG_3, RT5659_PWR_LDO2_BIT, 0,
  2198. NULL, 0),
  2199. SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5659_PWR_ANLG_2, RT5659_PWR_MB1_BIT,
  2200. 0, NULL, 0),
  2201. SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5659_PWR_VOL,
  2202. RT5659_PWR_MIC_DET_BIT, 0, NULL, 0),
  2203. };
  2204. static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = {
  2205. SND_SOC_DAPM_SUPPLY("PLL", RT5659_PWR_ANLG_3, RT5659_PWR_PLL_BIT, 0,
  2206. NULL, 0),
  2207. SND_SOC_DAPM_SUPPLY("Mono Vref", RT5659_PWR_ANLG_1,
  2208. RT5659_PWR_VREF3_BIT, 0, NULL, 0),
  2209. /* ASRC */
  2210. SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5659_ASRC_1,
  2211. RT5659_I2S1_ASRC_SFT, 0, NULL, 0),
  2212. SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5659_ASRC_1,
  2213. RT5659_I2S2_ASRC_SFT, 0, NULL, 0),
  2214. SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5659_ASRC_1,
  2215. RT5659_I2S3_ASRC_SFT, 0, NULL, 0),
  2216. SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5659_ASRC_1,
  2217. RT5659_DAC_STO_ASRC_SFT, 0, NULL, 0),
  2218. SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5659_ASRC_1,
  2219. RT5659_DAC_MONO_L_ASRC_SFT, 0, NULL, 0),
  2220. SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5659_ASRC_1,
  2221. RT5659_DAC_MONO_R_ASRC_SFT, 0, NULL, 0),
  2222. SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5659_ASRC_1,
  2223. RT5659_ADC_STO1_ASRC_SFT, 0, NULL, 0),
  2224. SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5659_ASRC_1,
  2225. RT5659_ADC_MONO_L_ASRC_SFT, 0, NULL, 0),
  2226. SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5659_ASRC_1,
  2227. RT5659_ADC_MONO_R_ASRC_SFT, 0, NULL, 0),
  2228. /* Input Side */
  2229. SND_SOC_DAPM_SUPPLY("MICBIAS2", RT5659_PWR_ANLG_2, RT5659_PWR_MB2_BIT,
  2230. 0, NULL, 0),
  2231. SND_SOC_DAPM_SUPPLY("MICBIAS3", RT5659_PWR_ANLG_2, RT5659_PWR_MB3_BIT,
  2232. 0, NULL, 0),
  2233. /* Input Lines */
  2234. SND_SOC_DAPM_INPUT("DMIC L1"),
  2235. SND_SOC_DAPM_INPUT("DMIC R1"),
  2236. SND_SOC_DAPM_INPUT("DMIC L2"),
  2237. SND_SOC_DAPM_INPUT("DMIC R2"),
  2238. SND_SOC_DAPM_INPUT("IN1P"),
  2239. SND_SOC_DAPM_INPUT("IN1N"),
  2240. SND_SOC_DAPM_INPUT("IN2P"),
  2241. SND_SOC_DAPM_INPUT("IN2N"),
  2242. SND_SOC_DAPM_INPUT("IN3P"),
  2243. SND_SOC_DAPM_INPUT("IN3N"),
  2244. SND_SOC_DAPM_INPUT("IN4P"),
  2245. SND_SOC_DAPM_INPUT("IN4N"),
  2246. SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  2247. SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  2248. SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
  2249. set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
  2250. SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5659_DMIC_CTRL_1,
  2251. RT5659_DMIC_1_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
  2252. SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5659_DMIC_CTRL_1,
  2253. RT5659_DMIC_2_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
  2254. /* Boost */
  2255. SND_SOC_DAPM_PGA("BST1", RT5659_PWR_ANLG_2,
  2256. RT5659_PWR_BST1_P_BIT, 0, NULL, 0),
  2257. SND_SOC_DAPM_PGA("BST2", RT5659_PWR_ANLG_2,
  2258. RT5659_PWR_BST2_P_BIT, 0, NULL, 0),
  2259. SND_SOC_DAPM_PGA("BST3", RT5659_PWR_ANLG_2,
  2260. RT5659_PWR_BST3_P_BIT, 0, NULL, 0),
  2261. SND_SOC_DAPM_PGA("BST4", RT5659_PWR_ANLG_2,
  2262. RT5659_PWR_BST4_P_BIT, 0, NULL, 0),
  2263. SND_SOC_DAPM_SUPPLY("BST1 Power", RT5659_PWR_ANLG_2,
  2264. RT5659_PWR_BST1_BIT, 0, NULL, 0),
  2265. SND_SOC_DAPM_SUPPLY("BST2 Power", RT5659_PWR_ANLG_2,
  2266. RT5659_PWR_BST2_BIT, 0, NULL, 0),
  2267. SND_SOC_DAPM_SUPPLY("BST3 Power", RT5659_PWR_ANLG_2,
  2268. RT5659_PWR_BST3_BIT, 0, NULL, 0),
  2269. SND_SOC_DAPM_SUPPLY("BST4 Power", RT5659_PWR_ANLG_2,
  2270. RT5659_PWR_BST4_BIT, 0, NULL, 0),
  2271. /* Input Volume */
  2272. SND_SOC_DAPM_PGA("INL VOL", RT5659_PWR_VOL, RT5659_PWR_IN_L_BIT,
  2273. 0, NULL, 0),
  2274. SND_SOC_DAPM_PGA("INR VOL", RT5659_PWR_VOL, RT5659_PWR_IN_R_BIT,
  2275. 0, NULL, 0),
  2276. /* REC Mixer */
  2277. SND_SOC_DAPM_MIXER("RECMIX1L", RT5659_PWR_MIXER, RT5659_PWR_RM1_L_BIT,
  2278. 0, rt5659_rec1_l_mix, ARRAY_SIZE(rt5659_rec1_l_mix)),
  2279. SND_SOC_DAPM_MIXER("RECMIX1R", RT5659_PWR_MIXER, RT5659_PWR_RM1_R_BIT,
  2280. 0, rt5659_rec1_r_mix, ARRAY_SIZE(rt5659_rec1_r_mix)),
  2281. SND_SOC_DAPM_MIXER("RECMIX2L", RT5659_PWR_MIXER, RT5659_PWR_RM2_L_BIT,
  2282. 0, rt5659_rec2_l_mix, ARRAY_SIZE(rt5659_rec2_l_mix)),
  2283. SND_SOC_DAPM_MIXER("RECMIX2R", RT5659_PWR_MIXER, RT5659_PWR_RM2_R_BIT,
  2284. 0, rt5659_rec2_r_mix, ARRAY_SIZE(rt5659_rec2_r_mix)),
  2285. /* ADCs */
  2286. SND_SOC_DAPM_ADC("ADC1 L", NULL, SND_SOC_NOPM, 0, 0),
  2287. SND_SOC_DAPM_ADC("ADC1 R", NULL, SND_SOC_NOPM, 0, 0),
  2288. SND_SOC_DAPM_ADC("ADC2 L", NULL, SND_SOC_NOPM, 0, 0),
  2289. SND_SOC_DAPM_ADC("ADC2 R", NULL, SND_SOC_NOPM, 0, 0),
  2290. SND_SOC_DAPM_SUPPLY("ADC1 L Power", RT5659_PWR_DIG_1,
  2291. RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
  2292. SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
  2293. RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
  2294. SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1,
  2295. RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
  2296. SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1,
  2297. RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
  2298. SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc1_clk,
  2299. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  2300. SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk,
  2301. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  2302. /* ADC Mux */
  2303. SND_SOC_DAPM_MUX("Stereo1 DMIC L Mux", SND_SOC_NOPM, 0, 0,
  2304. &rt5659_sto1_dmic_mux),
  2305. SND_SOC_DAPM_MUX("Stereo1 DMIC R Mux", SND_SOC_NOPM, 0, 0,
  2306. &rt5659_sto1_dmic_mux),
  2307. SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  2308. &rt5659_sto1_adc1_mux),
  2309. SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  2310. &rt5659_sto1_adc1_mux),
  2311. SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  2312. &rt5659_sto1_adc2_mux),
  2313. SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  2314. &rt5659_sto1_adc2_mux),
  2315. SND_SOC_DAPM_MUX("Stereo1 ADC L Mux", SND_SOC_NOPM, 0, 0,
  2316. &rt5659_sto1_adc_mux),
  2317. SND_SOC_DAPM_MUX("Stereo1 ADC R Mux", SND_SOC_NOPM, 0, 0,
  2318. &rt5659_sto1_adc_mux),
  2319. SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  2320. &rt5659_mono_adc_l2_mux),
  2321. SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  2322. &rt5659_mono_adc_r2_mux),
  2323. SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  2324. &rt5659_mono_adc_l1_mux),
  2325. SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  2326. &rt5659_mono_adc_r1_mux),
  2327. SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
  2328. &rt5659_mono_dmic_l_mux),
  2329. SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
  2330. &rt5659_mono_dmic_r_mux),
  2331. SND_SOC_DAPM_MUX("Mono ADC L Mux", SND_SOC_NOPM, 0, 0,
  2332. &rt5659_mono_adc_l_mux),
  2333. SND_SOC_DAPM_MUX("Mono ADC R Mux", SND_SOC_NOPM, 0, 0,
  2334. &rt5659_mono_adc_r_mux),
  2335. /* ADC Mixer */
  2336. SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5659_PWR_DIG_2,
  2337. RT5659_PWR_ADC_S1F_BIT, 0, NULL, 0),
  2338. SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5659_PWR_DIG_2,
  2339. RT5659_PWR_ADC_S2F_BIT, 0, NULL, 0),
  2340. SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM,
  2341. 0, 0, rt5659_sto1_adc_l_mix,
  2342. ARRAY_SIZE(rt5659_sto1_adc_l_mix)),
  2343. SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM,
  2344. 0, 0, rt5659_sto1_adc_r_mix,
  2345. ARRAY_SIZE(rt5659_sto1_adc_r_mix)),
  2346. SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5659_PWR_DIG_2,
  2347. RT5659_PWR_ADC_MF_L_BIT, 0, NULL, 0),
  2348. SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5659_MONO_ADC_DIG_VOL,
  2349. RT5659_L_MUTE_SFT, 1, rt5659_mono_adc_l_mix,
  2350. ARRAY_SIZE(rt5659_mono_adc_l_mix)),
  2351. SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5659_PWR_DIG_2,
  2352. RT5659_PWR_ADC_MF_R_BIT, 0, NULL, 0),
  2353. SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5659_MONO_ADC_DIG_VOL,
  2354. RT5659_R_MUTE_SFT, 1, rt5659_mono_adc_r_mix,
  2355. ARRAY_SIZE(rt5659_mono_adc_r_mix)),
  2356. /* ADC PGA */
  2357. SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  2358. SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  2359. SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  2360. SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  2361. SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  2362. SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  2363. SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
  2364. SND_SOC_DAPM_PGA("Stereo2 ADC LR", SND_SOC_NOPM, 0, 0, NULL, 0),
  2365. SND_SOC_DAPM_PGA("Stereo1 ADC Volume L", RT5659_STO1_ADC_DIG_VOL,
  2366. RT5659_L_MUTE_SFT, 1, NULL, 0),
  2367. SND_SOC_DAPM_PGA("Stereo1 ADC Volume R", RT5659_STO1_ADC_DIG_VOL,
  2368. RT5659_R_MUTE_SFT, 1, NULL, 0),
  2369. /* Digital Interface */
  2370. SND_SOC_DAPM_SUPPLY("I2S1", RT5659_PWR_DIG_1, RT5659_PWR_I2S1_BIT,
  2371. 0, NULL, 0),
  2372. SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  2373. SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  2374. SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  2375. SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  2376. SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  2377. SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  2378. SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  2379. SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  2380. SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  2381. SND_SOC_DAPM_SUPPLY("I2S2", RT5659_PWR_DIG_1, RT5659_PWR_I2S2_BIT, 0,
  2382. NULL, 0),
  2383. SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  2384. SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  2385. SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  2386. SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  2387. SND_SOC_DAPM_PGA("IF2 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  2388. SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  2389. SND_SOC_DAPM_SUPPLY("I2S3", RT5659_PWR_DIG_1, RT5659_PWR_I2S3_BIT, 0,
  2390. NULL, 0),
  2391. SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  2392. SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  2393. SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  2394. SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  2395. SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  2396. SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  2397. /* Digital Interface Select */
  2398. SND_SOC_DAPM_PGA("TDM AD1:AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  2399. SND_SOC_DAPM_PGA("TDM AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  2400. SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
  2401. &rt5659_rx_adc_dac_mux),
  2402. SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
  2403. &rt5659_if2_adc_in_mux),
  2404. SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
  2405. &rt5659_if3_adc_in_mux),
  2406. SND_SOC_DAPM_MUX("IF1 01 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
  2407. &rt5659_if1_01_adc_swap_mux),
  2408. SND_SOC_DAPM_MUX("IF1 23 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
  2409. &rt5659_if1_23_adc_swap_mux),
  2410. SND_SOC_DAPM_MUX("IF1 45 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
  2411. &rt5659_if1_45_adc_swap_mux),
  2412. SND_SOC_DAPM_MUX("IF1 67 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
  2413. &rt5659_if1_67_adc_swap_mux),
  2414. SND_SOC_DAPM_MUX("IF2 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
  2415. &rt5659_if2_dac_swap_mux),
  2416. SND_SOC_DAPM_MUX("IF2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
  2417. &rt5659_if2_adc_swap_mux),
  2418. SND_SOC_DAPM_MUX("IF3 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
  2419. &rt5659_if3_dac_swap_mux),
  2420. SND_SOC_DAPM_MUX("IF3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
  2421. &rt5659_if3_adc_swap_mux),
  2422. /* Audio Interface */
  2423. SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
  2424. SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
  2425. SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
  2426. SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
  2427. SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
  2428. SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
  2429. /* Output Side */
  2430. /* DAC mixer before sound effect */
  2431. SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
  2432. rt5659_dac_l_mix, ARRAY_SIZE(rt5659_dac_l_mix)),
  2433. SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
  2434. rt5659_dac_r_mix, ARRAY_SIZE(rt5659_dac_r_mix)),
  2435. /* DAC channel Mux */
  2436. SND_SOC_DAPM_MUX("DAC L1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l1_mux),
  2437. SND_SOC_DAPM_MUX("DAC R1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r1_mux),
  2438. SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l2_mux),
  2439. SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r2_mux),
  2440. SND_SOC_DAPM_MUX("DAC L1 Source", SND_SOC_NOPM, 0, 0,
  2441. &rt5659_alg_dac_l1_mux),
  2442. SND_SOC_DAPM_MUX("DAC R1 Source", SND_SOC_NOPM, 0, 0,
  2443. &rt5659_alg_dac_r1_mux),
  2444. SND_SOC_DAPM_MUX("DAC L2 Source", SND_SOC_NOPM, 0, 0,
  2445. &rt5659_alg_dac_l2_mux),
  2446. SND_SOC_DAPM_MUX("DAC R2 Source", SND_SOC_NOPM, 0, 0,
  2447. &rt5659_alg_dac_r2_mux),
  2448. /* DAC Mixer */
  2449. SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5659_PWR_DIG_2,
  2450. RT5659_PWR_DAC_S1F_BIT, 0, NULL, 0),
  2451. SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5659_PWR_DIG_2,
  2452. RT5659_PWR_DAC_MF_L_BIT, 0, NULL, 0),
  2453. SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5659_PWR_DIG_2,
  2454. RT5659_PWR_DAC_MF_R_BIT, 0, NULL, 0),
  2455. SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
  2456. rt5659_sto_dac_l_mix, ARRAY_SIZE(rt5659_sto_dac_l_mix)),
  2457. SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
  2458. rt5659_sto_dac_r_mix, ARRAY_SIZE(rt5659_sto_dac_r_mix)),
  2459. SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
  2460. rt5659_mono_dac_l_mix, ARRAY_SIZE(rt5659_mono_dac_l_mix)),
  2461. SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
  2462. rt5659_mono_dac_r_mix, ARRAY_SIZE(rt5659_mono_dac_r_mix)),
  2463. SND_SOC_DAPM_MUX("DAC MIXL", SND_SOC_NOPM, 0, 0,
  2464. &rt5659_dig_dac_mixl_mux),
  2465. SND_SOC_DAPM_MUX("DAC MIXR", SND_SOC_NOPM, 0, 0,
  2466. &rt5659_dig_dac_mixr_mux),
  2467. /* DACs */
  2468. SND_SOC_DAPM_SUPPLY_S("DAC L1 Power", 1, RT5659_PWR_DIG_1,
  2469. RT5659_PWR_DAC_L1_BIT, 0, NULL, 0),
  2470. SND_SOC_DAPM_SUPPLY_S("DAC R1 Power", 1, RT5659_PWR_DIG_1,
  2471. RT5659_PWR_DAC_R1_BIT, 0, NULL, 0),
  2472. SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
  2473. SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
  2474. SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5659_PWR_DIG_1,
  2475. RT5659_PWR_DAC_L2_BIT, 0, NULL, 0),
  2476. SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5659_PWR_DIG_1,
  2477. RT5659_PWR_DAC_R2_BIT, 0, NULL, 0),
  2478. SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0, 0),
  2479. SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0, 0),
  2480. SND_SOC_DAPM_PGA("DAC_REF", SND_SOC_NOPM, 0, 0, NULL, 0),
  2481. /* OUT Mixer */
  2482. SND_SOC_DAPM_MIXER("SPK MIXL", RT5659_PWR_MIXER, RT5659_PWR_SM_L_BIT,
  2483. 0, rt5659_spk_l_mix, ARRAY_SIZE(rt5659_spk_l_mix)),
  2484. SND_SOC_DAPM_MIXER("SPK MIXR", RT5659_PWR_MIXER, RT5659_PWR_SM_R_BIT,
  2485. 0, rt5659_spk_r_mix, ARRAY_SIZE(rt5659_spk_r_mix)),
  2486. SND_SOC_DAPM_MIXER("MONOVOL MIX", RT5659_PWR_MIXER, RT5659_PWR_MM_BIT,
  2487. 0, rt5659_monovol_mix, ARRAY_SIZE(rt5659_monovol_mix)),
  2488. SND_SOC_DAPM_MIXER("OUT MIXL", RT5659_PWR_MIXER, RT5659_PWR_OM_L_BIT,
  2489. 0, rt5659_out_l_mix, ARRAY_SIZE(rt5659_out_l_mix)),
  2490. SND_SOC_DAPM_MIXER("OUT MIXR", RT5659_PWR_MIXER, RT5659_PWR_OM_R_BIT,
  2491. 0, rt5659_out_r_mix, ARRAY_SIZE(rt5659_out_r_mix)),
  2492. /* Output Volume */
  2493. SND_SOC_DAPM_SWITCH("SPKVOL L", RT5659_PWR_VOL, RT5659_PWR_SV_L_BIT, 0,
  2494. &spkvol_l_switch),
  2495. SND_SOC_DAPM_SWITCH("SPKVOL R", RT5659_PWR_VOL, RT5659_PWR_SV_R_BIT, 0,
  2496. &spkvol_r_switch),
  2497. SND_SOC_DAPM_SWITCH("MONOVOL", RT5659_PWR_VOL, RT5659_PWR_MV_BIT, 0,
  2498. &monovol_switch),
  2499. SND_SOC_DAPM_SWITCH("OUTVOL L", RT5659_PWR_VOL, RT5659_PWR_OV_L_BIT, 0,
  2500. &outvol_l_switch),
  2501. SND_SOC_DAPM_SWITCH("OUTVOL R", RT5659_PWR_VOL, RT5659_PWR_OV_R_BIT, 0,
  2502. &outvol_r_switch),
  2503. /* SPO/MONO/HPO/LOUT */
  2504. SND_SOC_DAPM_MIXER("SPO L MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_l_mix,
  2505. ARRAY_SIZE(rt5659_spo_l_mix)),
  2506. SND_SOC_DAPM_MIXER("SPO R MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_r_mix,
  2507. ARRAY_SIZE(rt5659_spo_r_mix)),
  2508. SND_SOC_DAPM_MIXER("Mono MIX", SND_SOC_NOPM, 0, 0, rt5659_mono_mix,
  2509. ARRAY_SIZE(rt5659_mono_mix)),
  2510. SND_SOC_DAPM_MIXER("LOUT L MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_l_mix,
  2511. ARRAY_SIZE(rt5659_lout_l_mix)),
  2512. SND_SOC_DAPM_MIXER("LOUT R MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_r_mix,
  2513. ARRAY_SIZE(rt5659_lout_r_mix)),
  2514. SND_SOC_DAPM_PGA_S("SPK Amp", 1, RT5659_PWR_DIG_1, RT5659_PWR_CLS_D_BIT,
  2515. 0, rt5659_spk_event, SND_SOC_DAPM_POST_PMD |
  2516. SND_SOC_DAPM_PRE_PMU),
  2517. SND_SOC_DAPM_PGA_S("Mono Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_MA_BIT,
  2518. 0, rt5659_mono_event, SND_SOC_DAPM_POST_PMD |
  2519. SND_SOC_DAPM_PRE_PMU),
  2520. SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5659_hp_event,
  2521. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  2522. SND_SOC_DAPM_PGA_S("LOUT Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_LM_BIT,
  2523. 0, NULL, 0),
  2524. SND_SOC_DAPM_SUPPLY("Charge Pump", SND_SOC_NOPM, 0, 0,
  2525. rt5659_charge_pump_event, SND_SOC_DAPM_PRE_PMU |
  2526. SND_SOC_DAPM_POST_PMD),
  2527. SND_SOC_DAPM_SWITCH("SPO Playback", SND_SOC_NOPM, 0, 0, &spo_switch),
  2528. SND_SOC_DAPM_SWITCH("Mono Playback", SND_SOC_NOPM, 0, 0,
  2529. &mono_switch),
  2530. SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
  2531. &hpo_l_switch),
  2532. SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
  2533. &hpo_r_switch),
  2534. SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
  2535. &lout_l_switch),
  2536. SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
  2537. &lout_r_switch),
  2538. SND_SOC_DAPM_SWITCH("PDM L Playback", SND_SOC_NOPM, 0, 0,
  2539. &pdm_l_switch),
  2540. SND_SOC_DAPM_SWITCH("PDM R Playback", SND_SOC_NOPM, 0, 0,
  2541. &pdm_r_switch),
  2542. /* PDM */
  2543. SND_SOC_DAPM_SUPPLY("PDM Power", RT5659_PWR_DIG_2,
  2544. RT5659_PWR_PDM1_BIT, 0, NULL, 0),
  2545. SND_SOC_DAPM_MUX("PDM L Mux", RT5659_PDM_OUT_CTRL,
  2546. RT5659_M_PDM1_L_SFT, 1, &rt5659_pdm_l_mux),
  2547. SND_SOC_DAPM_MUX("PDM R Mux", RT5659_PDM_OUT_CTRL,
  2548. RT5659_M_PDM1_R_SFT, 1, &rt5659_pdm_r_mux),
  2549. /* SPDIF */
  2550. SND_SOC_DAPM_MUX("SPDIF Mux", SND_SOC_NOPM, 0, 0, &rt5659_spdif_mux),
  2551. SND_SOC_DAPM_SUPPLY("SYS CLK DET", RT5659_CLK_DET, 3, 0, NULL, 0),
  2552. SND_SOC_DAPM_SUPPLY("CLKDET", RT5659_CLK_DET, 0, 0, NULL, 0),
  2553. /* Output Lines */
  2554. SND_SOC_DAPM_OUTPUT("HPOL"),
  2555. SND_SOC_DAPM_OUTPUT("HPOR"),
  2556. SND_SOC_DAPM_OUTPUT("SPOL"),
  2557. SND_SOC_DAPM_OUTPUT("SPOR"),
  2558. SND_SOC_DAPM_OUTPUT("LOUTL"),
  2559. SND_SOC_DAPM_OUTPUT("LOUTR"),
  2560. SND_SOC_DAPM_OUTPUT("MONOOUT"),
  2561. SND_SOC_DAPM_OUTPUT("PDML"),
  2562. SND_SOC_DAPM_OUTPUT("PDMR"),
  2563. SND_SOC_DAPM_OUTPUT("SPDIF"),
  2564. };
  2565. static const struct snd_soc_dapm_route rt5659_dapm_routes[] = {
  2566. /*PLL*/
  2567. { "ADC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
  2568. { "ADC Stereo2 Filter", NULL, "PLL", is_sys_clk_from_pll },
  2569. { "ADC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
  2570. { "ADC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
  2571. { "DAC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
  2572. { "DAC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
  2573. { "DAC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
  2574. /*ASRC*/
  2575. { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
  2576. { "ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc },
  2577. { "ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc },
  2578. { "DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc },
  2579. { "DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc },
  2580. { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
  2581. { "SYS CLK DET", NULL, "CLKDET" },
  2582. { "I2S1", NULL, "I2S1 ASRC" },
  2583. { "I2S2", NULL, "I2S2 ASRC" },
  2584. { "I2S3", NULL, "I2S3 ASRC" },
  2585. { "DMIC1", NULL, "DMIC L1" },
  2586. { "DMIC1", NULL, "DMIC R1" },
  2587. { "DMIC2", NULL, "DMIC L2" },
  2588. { "DMIC2", NULL, "DMIC R2" },
  2589. { "BST1", NULL, "IN1P" },
  2590. { "BST1", NULL, "IN1N" },
  2591. { "BST1", NULL, "BST1 Power" },
  2592. { "BST2", NULL, "IN2P" },
  2593. { "BST2", NULL, "IN2N" },
  2594. { "BST2", NULL, "BST2 Power" },
  2595. { "BST3", NULL, "IN3P" },
  2596. { "BST3", NULL, "IN3N" },
  2597. { "BST3", NULL, "BST3 Power" },
  2598. { "BST4", NULL, "IN4P" },
  2599. { "BST4", NULL, "IN4N" },
  2600. { "BST4", NULL, "BST4 Power" },
  2601. { "INL VOL", NULL, "IN2P" },
  2602. { "INR VOL", NULL, "IN2N" },
  2603. { "RECMIX1L", "SPKVOLL Switch", "SPKVOL L" },
  2604. { "RECMIX1L", "INL Switch", "INL VOL" },
  2605. { "RECMIX1L", "BST4 Switch", "BST4" },
  2606. { "RECMIX1L", "BST3 Switch", "BST3" },
  2607. { "RECMIX1L", "BST2 Switch", "BST2" },
  2608. { "RECMIX1L", "BST1 Switch", "BST1" },
  2609. { "RECMIX1R", "HPOVOLR Switch", "HPO R Playback" },
  2610. { "RECMIX1R", "INR Switch", "INR VOL" },
  2611. { "RECMIX1R", "BST4 Switch", "BST4" },
  2612. { "RECMIX1R", "BST3 Switch", "BST3" },
  2613. { "RECMIX1R", "BST2 Switch", "BST2" },
  2614. { "RECMIX1R", "BST1 Switch", "BST1" },
  2615. { "RECMIX2L", "SPKVOLL Switch", "SPKVOL L" },
  2616. { "RECMIX2L", "OUTVOLL Switch", "OUTVOL L" },
  2617. { "RECMIX2L", "BST4 Switch", "BST4" },
  2618. { "RECMIX2L", "BST3 Switch", "BST3" },
  2619. { "RECMIX2L", "BST2 Switch", "BST2" },
  2620. { "RECMIX2L", "BST1 Switch", "BST1" },
  2621. { "RECMIX2R", "MONOVOL Switch", "MONOVOL" },
  2622. { "RECMIX2R", "OUTVOLR Switch", "OUTVOL R" },
  2623. { "RECMIX2R", "BST4 Switch", "BST4" },
  2624. { "RECMIX2R", "BST3 Switch", "BST3" },
  2625. { "RECMIX2R", "BST2 Switch", "BST2" },
  2626. { "RECMIX2R", "BST1 Switch", "BST1" },
  2627. { "ADC1 L", NULL, "RECMIX1L" },
  2628. { "ADC1 L", NULL, "ADC1 L Power" },
  2629. { "ADC1 L", NULL, "ADC1 clock" },
  2630. { "ADC1 R", NULL, "RECMIX1R" },
  2631. { "ADC1 R", NULL, "ADC1 R Power" },
  2632. { "ADC1 R", NULL, "ADC1 clock" },
  2633. { "ADC2 L", NULL, "RECMIX2L" },
  2634. { "ADC2 L", NULL, "ADC2 L Power" },
  2635. { "ADC2 L", NULL, "ADC2 clock" },
  2636. { "ADC2 R", NULL, "RECMIX2R" },
  2637. { "ADC2 R", NULL, "ADC2 R Power" },
  2638. { "ADC2 R", NULL, "ADC2 clock" },
  2639. { "DMIC L1", NULL, "DMIC CLK" },
  2640. { "DMIC L1", NULL, "DMIC1 Power" },
  2641. { "DMIC R1", NULL, "DMIC CLK" },
  2642. { "DMIC R1", NULL, "DMIC1 Power" },
  2643. { "DMIC L2", NULL, "DMIC CLK" },
  2644. { "DMIC L2", NULL, "DMIC2 Power" },
  2645. { "DMIC R2", NULL, "DMIC CLK" },
  2646. { "DMIC R2", NULL, "DMIC2 Power" },
  2647. { "Stereo1 DMIC L Mux", "DMIC1", "DMIC L1" },
  2648. { "Stereo1 DMIC L Mux", "DMIC2", "DMIC L2" },
  2649. { "Stereo1 DMIC R Mux", "DMIC1", "DMIC R1" },
  2650. { "Stereo1 DMIC R Mux", "DMIC2", "DMIC R2" },
  2651. { "Mono DMIC L Mux", "DMIC1 L", "DMIC L1" },
  2652. { "Mono DMIC L Mux", "DMIC2 L", "DMIC L2" },
  2653. { "Mono DMIC R Mux", "DMIC1 R", "DMIC R1" },
  2654. { "Mono DMIC R Mux", "DMIC2 R", "DMIC R2" },
  2655. { "Stereo1 ADC L Mux", "ADC1", "ADC1 L" },
  2656. { "Stereo1 ADC L Mux", "ADC2", "ADC2 L" },
  2657. { "Stereo1 ADC R Mux", "ADC1", "ADC1 R" },
  2658. { "Stereo1 ADC R Mux", "ADC2", "ADC2 R" },
  2659. { "Stereo1 ADC L1 Mux", "ADC", "Stereo1 ADC L Mux" },
  2660. { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
  2661. { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC L Mux" },
  2662. { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
  2663. { "Stereo1 ADC R1 Mux", "ADC", "Stereo1 ADC R Mux" },
  2664. { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
  2665. { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC R Mux" },
  2666. { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
  2667. { "Mono ADC L Mux", "ADC1 L", "ADC1 L" },
  2668. { "Mono ADC L Mux", "ADC1 R", "ADC1 R" },
  2669. { "Mono ADC L Mux", "ADC2 L", "ADC2 L" },
  2670. { "Mono ADC L Mux", "ADC2 R", "ADC2 R" },
  2671. { "Mono ADC R Mux", "ADC1 L", "ADC1 L" },
  2672. { "Mono ADC R Mux", "ADC1 R", "ADC1 R" },
  2673. { "Mono ADC R Mux", "ADC2 L", "ADC2 L" },
  2674. { "Mono ADC R Mux", "ADC2 R", "ADC2 R" },
  2675. { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
  2676. { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
  2677. { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
  2678. { "Mono ADC L1 Mux", "ADC", "Mono ADC L Mux" },
  2679. { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
  2680. { "Mono ADC R1 Mux", "ADC", "Mono ADC R Mux" },
  2681. { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
  2682. { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
  2683. { "Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
  2684. { "Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
  2685. { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
  2686. { "Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
  2687. { "Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
  2688. { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
  2689. { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
  2690. { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
  2691. { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
  2692. { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
  2693. { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
  2694. { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
  2695. { "Stereo1 ADC Volume L", NULL, "Stereo1 ADC MIXL" },
  2696. { "Stereo1 ADC Volume R", NULL, "Stereo1 ADC MIXR" },
  2697. { "IF_ADC1", NULL, "Stereo1 ADC Volume L" },
  2698. { "IF_ADC1", NULL, "Stereo1 ADC Volume R" },
  2699. { "IF_ADC2", NULL, "Mono ADC MIXL" },
  2700. { "IF_ADC2", NULL, "Mono ADC MIXR" },
  2701. { "TDM AD1:AD2:DAC", NULL, "IF_ADC1" },
  2702. { "TDM AD1:AD2:DAC", NULL, "IF_ADC2" },
  2703. { "TDM AD1:AD2:DAC", NULL, "DAC_REF" },
  2704. { "TDM AD2:DAC", NULL, "IF_ADC2" },
  2705. { "TDM AD2:DAC", NULL, "DAC_REF" },
  2706. { "TDM Data Mux", "AD1:AD2:DAC:NUL", "TDM AD1:AD2:DAC" },
  2707. { "TDM Data Mux", "AD1:AD2:NUL:DAC", "TDM AD1:AD2:DAC" },
  2708. { "TDM Data Mux", "AD1:DAC:AD2:NUL", "TDM AD1:AD2:DAC" },
  2709. { "TDM Data Mux", "AD1:DAC:NUL:AD2", "TDM AD1:AD2:DAC" },
  2710. { "TDM Data Mux", "AD1:NUL:DAC:AD2", "TDM AD1:AD2:DAC" },
  2711. { "TDM Data Mux", "AD1:NUL:AD2:DAC", "TDM AD1:AD2:DAC" },
  2712. { "TDM Data Mux", "AD2:AD1:DAC:NUL", "TDM AD1:AD2:DAC" },
  2713. { "TDM Data Mux", "AD2:AD1:NUL:DAC", "TDM AD1:AD2:DAC" },
  2714. { "TDM Data Mux", "AD2:DAC:AD1:NUL", "TDM AD1:AD2:DAC" },
  2715. { "TDM Data Mux", "AD2:DAC:NUL:AD1", "TDM AD1:AD2:DAC" },
  2716. { "TDM Data Mux", "AD2:NUL:DAC:AD1", "TDM AD1:AD2:DAC" },
  2717. { "TDM Data Mux", "AD1:NUL:AD1:DAC", "TDM AD1:AD2:DAC" },
  2718. { "TDM Data Mux", "DAC:AD1:AD2:NUL", "TDM AD1:AD2:DAC" },
  2719. { "TDM Data Mux", "DAC:AD1:NUL:AD2", "TDM AD1:AD2:DAC" },
  2720. { "TDM Data Mux", "DAC:AD2:AD1:NUL", "TDM AD1:AD2:DAC" },
  2721. { "TDM Data Mux", "DAC:AD2:NUL:AD1", "TDM AD1:AD2:DAC" },
  2722. { "TDM Data Mux", "DAC:NUL:DAC:AD2", "TDM AD2:DAC" },
  2723. { "TDM Data Mux", "DAC:NUL:AD2:DAC", "TDM AD2:DAC" },
  2724. { "TDM Data Mux", "NUL:AD1:AD2:DAC", "TDM AD1:AD2:DAC" },
  2725. { "TDM Data Mux", "NUL:AD1:DAC:AD2", "TDM AD1:AD2:DAC" },
  2726. { "TDM Data Mux", "NUL:AD2:AD1:DAC", "TDM AD1:AD2:DAC" },
  2727. { "TDM Data Mux", "NUL:AD2:DAC:AD1", "TDM AD1:AD2:DAC" },
  2728. { "TDM Data Mux", "NUL:DAC:DAC:AD2", "TDM AD2:DAC" },
  2729. { "TDM Data Mux", "NUL:DAC:AD2:DAC", "TDM AD2:DAC" },
  2730. { "IF1 01 ADC Swap Mux", "L/R", "TDM Data Mux" },
  2731. { "IF1 01 ADC Swap Mux", "R/L", "TDM Data Mux" },
  2732. { "IF1 01 ADC Swap Mux", "L/L", "TDM Data Mux" },
  2733. { "IF1 01 ADC Swap Mux", "R/R", "TDM Data Mux" },
  2734. { "IF1 23 ADC Swap Mux", "L/R", "TDM Data Mux" },
  2735. { "IF1 23 ADC Swap Mux", "R/L", "TDM Data Mux" },
  2736. { "IF1 23 ADC Swap Mux", "L/L", "TDM Data Mux" },
  2737. { "IF1 23 ADC Swap Mux", "R/R", "TDM Data Mux" },
  2738. { "IF1 45 ADC Swap Mux", "L/R", "TDM Data Mux" },
  2739. { "IF1 45 ADC Swap Mux", "R/L", "TDM Data Mux" },
  2740. { "IF1 45 ADC Swap Mux", "L/L", "TDM Data Mux" },
  2741. { "IF1 45 ADC Swap Mux", "R/R", "TDM Data Mux" },
  2742. { "IF1 67 ADC Swap Mux", "L/R", "TDM Data Mux" },
  2743. { "IF1 67 ADC Swap Mux", "R/L", "TDM Data Mux" },
  2744. { "IF1 67 ADC Swap Mux", "L/L", "TDM Data Mux" },
  2745. { "IF1 67 ADC Swap Mux", "R/R", "TDM Data Mux" },
  2746. { "IF1 ADC", NULL, "IF1 01 ADC Swap Mux" },
  2747. { "IF1 ADC", NULL, "IF1 23 ADC Swap Mux" },
  2748. { "IF1 ADC", NULL, "IF1 45 ADC Swap Mux" },
  2749. { "IF1 ADC", NULL, "IF1 67 ADC Swap Mux" },
  2750. { "IF1 ADC", NULL, "I2S1" },
  2751. { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
  2752. { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
  2753. { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
  2754. { "IF2 ADC Mux", "DAC_REF", "DAC_REF" },
  2755. { "IF2 ADC", NULL, "IF2 ADC Mux"},
  2756. { "IF2 ADC", NULL, "I2S2" },
  2757. { "IF3 ADC Mux", "IF_ADC1", "IF_ADC1" },
  2758. { "IF3 ADC Mux", "IF_ADC2", "IF_ADC2" },
  2759. { "IF3 ADC Mux", "Stereo2_ADC_L/R", "Stereo2 ADC LR" },
  2760. { "IF3 ADC Mux", "DAC_REF", "DAC_REF" },
  2761. { "IF3 ADC", NULL, "IF3 ADC Mux"},
  2762. { "IF3 ADC", NULL, "I2S3" },
  2763. { "AIF1TX", NULL, "IF1 ADC" },
  2764. { "IF2 ADC Swap Mux", "L/R", "IF2 ADC" },
  2765. { "IF2 ADC Swap Mux", "R/L", "IF2 ADC" },
  2766. { "IF2 ADC Swap Mux", "L/L", "IF2 ADC" },
  2767. { "IF2 ADC Swap Mux", "R/R", "IF2 ADC" },
  2768. { "AIF2TX", NULL, "IF2 ADC Swap Mux" },
  2769. { "IF3 ADC Swap Mux", "L/R", "IF3 ADC" },
  2770. { "IF3 ADC Swap Mux", "R/L", "IF3 ADC" },
  2771. { "IF3 ADC Swap Mux", "L/L", "IF3 ADC" },
  2772. { "IF3 ADC Swap Mux", "R/R", "IF3 ADC" },
  2773. { "AIF3TX", NULL, "IF3 ADC Swap Mux" },
  2774. { "IF1 DAC1", NULL, "AIF1RX" },
  2775. { "IF1 DAC2", NULL, "AIF1RX" },
  2776. { "IF2 DAC Swap Mux", "L/R", "AIF2RX" },
  2777. { "IF2 DAC Swap Mux", "R/L", "AIF2RX" },
  2778. { "IF2 DAC Swap Mux", "L/L", "AIF2RX" },
  2779. { "IF2 DAC Swap Mux", "R/R", "AIF2RX" },
  2780. { "IF2 DAC", NULL, "IF2 DAC Swap Mux" },
  2781. { "IF3 DAC Swap Mux", "L/R", "AIF3RX" },
  2782. { "IF3 DAC Swap Mux", "R/L", "AIF3RX" },
  2783. { "IF3 DAC Swap Mux", "L/L", "AIF3RX" },
  2784. { "IF3 DAC Swap Mux", "R/R", "AIF3RX" },
  2785. { "IF3 DAC", NULL, "IF3 DAC Swap Mux" },
  2786. { "IF1 DAC1", NULL, "I2S1" },
  2787. { "IF1 DAC2", NULL, "I2S1" },
  2788. { "IF2 DAC", NULL, "I2S2" },
  2789. { "IF3 DAC", NULL, "I2S3" },
  2790. { "IF1 DAC2 L", NULL, "IF1 DAC2" },
  2791. { "IF1 DAC2 R", NULL, "IF1 DAC2" },
  2792. { "IF1 DAC1 L", NULL, "IF1 DAC1" },
  2793. { "IF1 DAC1 R", NULL, "IF1 DAC1" },
  2794. { "IF2 DAC L", NULL, "IF2 DAC" },
  2795. { "IF2 DAC R", NULL, "IF2 DAC" },
  2796. { "IF3 DAC L", NULL, "IF3 DAC" },
  2797. { "IF3 DAC R", NULL, "IF3 DAC" },
  2798. { "DAC L1 Mux", "IF1 DAC1", "IF1 DAC1 L" },
  2799. { "DAC L1 Mux", "IF2 DAC", "IF2 DAC L" },
  2800. { "DAC L1 Mux", "IF3 DAC", "IF3 DAC L" },
  2801. { "DAC L1 Mux", NULL, "DAC Stereo1 Filter" },
  2802. { "DAC R1 Mux", "IF1 DAC1", "IF1 DAC1 R" },
  2803. { "DAC R1 Mux", "IF2 DAC", "IF2 DAC R" },
  2804. { "DAC R1 Mux", "IF3 DAC", "IF3 DAC R" },
  2805. { "DAC R1 Mux", NULL, "DAC Stereo1 Filter" },
  2806. { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC Volume L" },
  2807. { "DAC1 MIXL", "DAC1 Switch", "DAC L1 Mux" },
  2808. { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC Volume R" },
  2809. { "DAC1 MIXR", "DAC1 Switch", "DAC R1 Mux" },
  2810. { "DAC_REF", NULL, "DAC1 MIXL" },
  2811. { "DAC_REF", NULL, "DAC1 MIXR" },
  2812. { "DAC L2 Mux", "IF1 DAC2", "IF1 DAC2 L" },
  2813. { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
  2814. { "DAC L2 Mux", "IF3 DAC", "IF3 DAC L" },
  2815. { "DAC L2 Mux", "Mono ADC MIX", "Mono ADC MIXL" },
  2816. { "DAC L2 Mux", NULL, "DAC Mono Left Filter" },
  2817. { "DAC R2 Mux", "IF1 DAC2", "IF1 DAC2 R" },
  2818. { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
  2819. { "DAC R2 Mux", "IF3 DAC", "IF3 DAC R" },
  2820. { "DAC R2 Mux", "Mono ADC MIX", "Mono ADC MIXR" },
  2821. { "DAC R2 Mux", NULL, "DAC Mono Right Filter" },
  2822. { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
  2823. { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
  2824. { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
  2825. { "Stereo DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
  2826. { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
  2827. { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
  2828. { "Stereo DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
  2829. { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
  2830. { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
  2831. { "Mono DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
  2832. { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
  2833. { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
  2834. { "Mono DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
  2835. { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
  2836. { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
  2837. { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
  2838. { "DAC MIXL", "Stereo DAC Mixer", "Stereo DAC MIXL" },
  2839. { "DAC MIXL", "Mono DAC Mixer", "Mono DAC MIXL" },
  2840. { "DAC MIXR", "Stereo DAC Mixer", "Stereo DAC MIXR" },
  2841. { "DAC MIXR", "Mono DAC Mixer", "Mono DAC MIXR" },
  2842. { "DAC L1 Source", NULL, "DAC L1 Power" },
  2843. { "DAC L1 Source", "DAC", "DAC1 MIXL" },
  2844. { "DAC L1 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
  2845. { "DAC R1 Source", NULL, "DAC R1 Power" },
  2846. { "DAC R1 Source", "DAC", "DAC1 MIXR" },
  2847. { "DAC R1 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
  2848. { "DAC L2 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
  2849. { "DAC L2 Source", "Mono DAC Mixer", "Mono DAC MIXL" },
  2850. { "DAC L2 Source", NULL, "DAC L2 Power" },
  2851. { "DAC R2 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
  2852. { "DAC R2 Source", "Mono DAC Mixer", "Mono DAC MIXR" },
  2853. { "DAC R2 Source", NULL, "DAC R2 Power" },
  2854. { "DAC L1", NULL, "DAC L1 Source" },
  2855. { "DAC R1", NULL, "DAC R1 Source" },
  2856. { "DAC L2", NULL, "DAC L2 Source" },
  2857. { "DAC R2", NULL, "DAC R2 Source" },
  2858. { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
  2859. { "SPK MIXL", "BST1 Switch", "BST1" },
  2860. { "SPK MIXL", "INL Switch", "INL VOL" },
  2861. { "SPK MIXL", "INR Switch", "INR VOL" },
  2862. { "SPK MIXL", "BST3 Switch", "BST3" },
  2863. { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
  2864. { "SPK MIXR", "BST4 Switch", "BST4" },
  2865. { "SPK MIXR", "INL Switch", "INL VOL" },
  2866. { "SPK MIXR", "INR Switch", "INR VOL" },
  2867. { "SPK MIXR", "BST3 Switch", "BST3" },
  2868. { "MONOVOL MIX", "DAC L2 Switch", "DAC L2" },
  2869. { "MONOVOL MIX", "DAC R2 Switch", "DAC R2" },
  2870. { "MONOVOL MIX", "BST1 Switch", "BST1" },
  2871. { "MONOVOL MIX", "BST2 Switch", "BST2" },
  2872. { "MONOVOL MIX", "BST3 Switch", "BST3" },
  2873. { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
  2874. { "OUT MIXL", "INL Switch", "INL VOL" },
  2875. { "OUT MIXL", "BST1 Switch", "BST1" },
  2876. { "OUT MIXL", "BST2 Switch", "BST2" },
  2877. { "OUT MIXL", "BST3 Switch", "BST3" },
  2878. { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
  2879. { "OUT MIXR", "INR Switch", "INR VOL" },
  2880. { "OUT MIXR", "BST2 Switch", "BST2" },
  2881. { "OUT MIXR", "BST3 Switch", "BST3" },
  2882. { "OUT MIXR", "BST4 Switch", "BST4" },
  2883. { "SPKVOL L", "Switch", "SPK MIXL" },
  2884. { "SPKVOL R", "Switch", "SPK MIXR" },
  2885. { "SPO L MIX", "DAC L2 Switch", "DAC L2" },
  2886. { "SPO L MIX", "SPKVOL L Switch", "SPKVOL L" },
  2887. { "SPO R MIX", "DAC R2 Switch", "DAC R2" },
  2888. { "SPO R MIX", "SPKVOL R Switch", "SPKVOL R" },
  2889. { "SPK Amp", NULL, "SPO L MIX" },
  2890. { "SPK Amp", NULL, "SPO R MIX" },
  2891. { "SPK Amp", NULL, "SYS CLK DET" },
  2892. { "SPO Playback", "Switch", "SPK Amp" },
  2893. { "SPOL", NULL, "SPO Playback" },
  2894. { "SPOR", NULL, "SPO Playback" },
  2895. { "MONOVOL", "Switch", "MONOVOL MIX" },
  2896. { "Mono MIX", "DAC L2 Switch", "DAC L2" },
  2897. { "Mono MIX", "MONOVOL Switch", "MONOVOL" },
  2898. { "Mono Amp", NULL, "Mono MIX" },
  2899. { "Mono Amp", NULL, "Mono Vref" },
  2900. { "Mono Amp", NULL, "SYS CLK DET" },
  2901. { "Mono Playback", "Switch", "Mono Amp" },
  2902. { "MONOOUT", NULL, "Mono Playback" },
  2903. { "HP Amp", NULL, "DAC L1" },
  2904. { "HP Amp", NULL, "DAC R1" },
  2905. { "HP Amp", NULL, "Charge Pump" },
  2906. { "HP Amp", NULL, "SYS CLK DET" },
  2907. { "HPO L Playback", "Switch", "HP Amp"},
  2908. { "HPO R Playback", "Switch", "HP Amp"},
  2909. { "HPOL", NULL, "HPO L Playback" },
  2910. { "HPOR", NULL, "HPO R Playback" },
  2911. { "OUTVOL L", "Switch", "OUT MIXL" },
  2912. { "OUTVOL R", "Switch", "OUT MIXR" },
  2913. { "LOUT L MIX", "DAC L2 Switch", "DAC L2" },
  2914. { "LOUT L MIX", "OUTVOL L Switch", "OUTVOL L" },
  2915. { "LOUT R MIX", "DAC R2 Switch", "DAC R2" },
  2916. { "LOUT R MIX", "OUTVOL R Switch", "OUTVOL R" },
  2917. { "LOUT Amp", NULL, "LOUT L MIX" },
  2918. { "LOUT Amp", NULL, "LOUT R MIX" },
  2919. { "LOUT Amp", NULL, "Charge Pump" },
  2920. { "LOUT Amp", NULL, "SYS CLK DET" },
  2921. { "LOUT L Playback", "Switch", "LOUT Amp" },
  2922. { "LOUT R Playback", "Switch", "LOUT Amp" },
  2923. { "LOUTL", NULL, "LOUT L Playback" },
  2924. { "LOUTR", NULL, "LOUT R Playback" },
  2925. { "PDM L Mux", "Mono DAC", "Mono DAC MIXL" },
  2926. { "PDM L Mux", "Stereo DAC", "Stereo DAC MIXL" },
  2927. { "PDM L Mux", NULL, "PDM Power" },
  2928. { "PDM R Mux", "Mono DAC", "Mono DAC MIXR" },
  2929. { "PDM R Mux", "Stereo DAC", "Stereo DAC MIXR" },
  2930. { "PDM R Mux", NULL, "PDM Power" },
  2931. { "PDM L Playback", "Switch", "PDM L Mux" },
  2932. { "PDM R Playback", "Switch", "PDM R Mux" },
  2933. { "PDML", NULL, "PDM L Playback" },
  2934. { "PDMR", NULL, "PDM R Playback" },
  2935. { "SPDIF Mux", "IF3_DAC", "IF3 DAC" },
  2936. { "SPDIF Mux", "IF2_DAC", "IF2 DAC" },
  2937. { "SPDIF Mux", "IF1_DAC2", "IF1 DAC2" },
  2938. { "SPDIF Mux", "IF1_DAC1", "IF1 DAC1" },
  2939. { "SPDIF", NULL, "SPDIF Mux" },
  2940. };
  2941. static int rt5659_hw_params(struct snd_pcm_substream *substream,
  2942. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  2943. {
  2944. struct snd_soc_component *component = dai->component;
  2945. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  2946. unsigned int val_len = 0, val_clk, mask_clk;
  2947. int pre_div, frame_size;
  2948. rt5659->lrck[dai->id] = params_rate(params);
  2949. pre_div = rl6231_get_clk_info(rt5659->sysclk, rt5659->lrck[dai->id]);
  2950. if (pre_div < 0) {
  2951. dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
  2952. rt5659->lrck[dai->id], dai->id);
  2953. return -EINVAL;
  2954. }
  2955. frame_size = snd_soc_params_to_frame_size(params);
  2956. if (frame_size < 0) {
  2957. dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
  2958. return -EINVAL;
  2959. }
  2960. dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
  2961. rt5659->lrck[dai->id], pre_div, dai->id);
  2962. switch (params_width(params)) {
  2963. case 16:
  2964. break;
  2965. case 20:
  2966. val_len |= RT5659_I2S_DL_20;
  2967. break;
  2968. case 24:
  2969. val_len |= RT5659_I2S_DL_24;
  2970. break;
  2971. case 8:
  2972. val_len |= RT5659_I2S_DL_8;
  2973. break;
  2974. default:
  2975. return -EINVAL;
  2976. }
  2977. switch (dai->id) {
  2978. case RT5659_AIF1:
  2979. mask_clk = RT5659_I2S_PD1_MASK;
  2980. val_clk = pre_div << RT5659_I2S_PD1_SFT;
  2981. snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
  2982. RT5659_I2S_DL_MASK, val_len);
  2983. break;
  2984. case RT5659_AIF2:
  2985. mask_clk = RT5659_I2S_PD2_MASK;
  2986. val_clk = pre_div << RT5659_I2S_PD2_SFT;
  2987. snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
  2988. RT5659_I2S_DL_MASK, val_len);
  2989. break;
  2990. case RT5659_AIF3:
  2991. mask_clk = RT5659_I2S_PD3_MASK;
  2992. val_clk = pre_div << RT5659_I2S_PD3_SFT;
  2993. snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
  2994. RT5659_I2S_DL_MASK, val_len);
  2995. break;
  2996. default:
  2997. dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
  2998. return -EINVAL;
  2999. }
  3000. snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1, mask_clk, val_clk);
  3001. switch (rt5659->lrck[dai->id]) {
  3002. case 192000:
  3003. snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
  3004. RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_32);
  3005. break;
  3006. case 96000:
  3007. snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
  3008. RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_64);
  3009. break;
  3010. default:
  3011. snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
  3012. RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_128);
  3013. break;
  3014. }
  3015. return 0;
  3016. }
  3017. static int rt5659_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  3018. {
  3019. struct snd_soc_component *component = dai->component;
  3020. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  3021. unsigned int reg_val = 0;
  3022. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  3023. case SND_SOC_DAIFMT_CBM_CFM:
  3024. rt5659->master[dai->id] = 1;
  3025. break;
  3026. case SND_SOC_DAIFMT_CBS_CFS:
  3027. reg_val |= RT5659_I2S_MS_S;
  3028. rt5659->master[dai->id] = 0;
  3029. break;
  3030. default:
  3031. return -EINVAL;
  3032. }
  3033. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  3034. case SND_SOC_DAIFMT_NB_NF:
  3035. break;
  3036. case SND_SOC_DAIFMT_IB_NF:
  3037. reg_val |= RT5659_I2S_BP_INV;
  3038. break;
  3039. default:
  3040. return -EINVAL;
  3041. }
  3042. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  3043. case SND_SOC_DAIFMT_I2S:
  3044. break;
  3045. case SND_SOC_DAIFMT_LEFT_J:
  3046. reg_val |= RT5659_I2S_DF_LEFT;
  3047. break;
  3048. case SND_SOC_DAIFMT_DSP_A:
  3049. reg_val |= RT5659_I2S_DF_PCM_A;
  3050. break;
  3051. case SND_SOC_DAIFMT_DSP_B:
  3052. reg_val |= RT5659_I2S_DF_PCM_B;
  3053. break;
  3054. default:
  3055. return -EINVAL;
  3056. }
  3057. switch (dai->id) {
  3058. case RT5659_AIF1:
  3059. snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
  3060. RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
  3061. RT5659_I2S_DF_MASK, reg_val);
  3062. break;
  3063. case RT5659_AIF2:
  3064. snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
  3065. RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
  3066. RT5659_I2S_DF_MASK, reg_val);
  3067. break;
  3068. case RT5659_AIF3:
  3069. snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
  3070. RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
  3071. RT5659_I2S_DF_MASK, reg_val);
  3072. break;
  3073. default:
  3074. dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
  3075. return -EINVAL;
  3076. }
  3077. return 0;
  3078. }
  3079. static int rt5659_set_component_sysclk(struct snd_soc_component *component, int clk_id,
  3080. int source, unsigned int freq, int dir)
  3081. {
  3082. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  3083. unsigned int reg_val = 0;
  3084. int ret;
  3085. if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
  3086. return 0;
  3087. switch (clk_id) {
  3088. case RT5659_SCLK_S_MCLK:
  3089. ret = clk_set_rate(rt5659->mclk, freq);
  3090. if (ret)
  3091. return ret;
  3092. reg_val |= RT5659_SCLK_SRC_MCLK;
  3093. break;
  3094. case RT5659_SCLK_S_PLL1:
  3095. reg_val |= RT5659_SCLK_SRC_PLL1;
  3096. break;
  3097. case RT5659_SCLK_S_RCCLK:
  3098. reg_val |= RT5659_SCLK_SRC_RCCLK;
  3099. break;
  3100. default:
  3101. dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
  3102. return -EINVAL;
  3103. }
  3104. snd_soc_component_update_bits(component, RT5659_GLB_CLK,
  3105. RT5659_SCLK_SRC_MASK, reg_val);
  3106. rt5659->sysclk = freq;
  3107. rt5659->sysclk_src = clk_id;
  3108. dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
  3109. freq, clk_id);
  3110. return 0;
  3111. }
  3112. static int rt5659_set_component_pll(struct snd_soc_component *component, int pll_id,
  3113. int source, unsigned int freq_in,
  3114. unsigned int freq_out)
  3115. {
  3116. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  3117. struct rl6231_pll_code pll_code;
  3118. int ret;
  3119. if (source == rt5659->pll_src && freq_in == rt5659->pll_in &&
  3120. freq_out == rt5659->pll_out)
  3121. return 0;
  3122. if (!freq_in || !freq_out) {
  3123. dev_dbg(component->dev, "PLL disabled\n");
  3124. rt5659->pll_in = 0;
  3125. rt5659->pll_out = 0;
  3126. snd_soc_component_update_bits(component, RT5659_GLB_CLK,
  3127. RT5659_SCLK_SRC_MASK, RT5659_SCLK_SRC_MCLK);
  3128. return 0;
  3129. }
  3130. switch (source) {
  3131. case RT5659_PLL1_S_MCLK:
  3132. snd_soc_component_update_bits(component, RT5659_GLB_CLK,
  3133. RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_MCLK);
  3134. break;
  3135. case RT5659_PLL1_S_BCLK1:
  3136. snd_soc_component_update_bits(component, RT5659_GLB_CLK,
  3137. RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK1);
  3138. break;
  3139. case RT5659_PLL1_S_BCLK2:
  3140. snd_soc_component_update_bits(component, RT5659_GLB_CLK,
  3141. RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK2);
  3142. break;
  3143. case RT5659_PLL1_S_BCLK3:
  3144. snd_soc_component_update_bits(component, RT5659_GLB_CLK,
  3145. RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK3);
  3146. break;
  3147. default:
  3148. dev_err(component->dev, "Unknown PLL source %d\n", source);
  3149. return -EINVAL;
  3150. }
  3151. ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
  3152. if (ret < 0) {
  3153. dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
  3154. return ret;
  3155. }
  3156. dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
  3157. pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
  3158. pll_code.n_code, pll_code.k_code);
  3159. snd_soc_component_write(component, RT5659_PLL_CTRL_1,
  3160. pll_code.n_code << RT5659_PLL_N_SFT | pll_code.k_code);
  3161. snd_soc_component_write(component, RT5659_PLL_CTRL_2,
  3162. (pll_code.m_bp ? 0 : pll_code.m_code) << RT5659_PLL_M_SFT |
  3163. pll_code.m_bp << RT5659_PLL_M_BP_SFT);
  3164. rt5659->pll_in = freq_in;
  3165. rt5659->pll_out = freq_out;
  3166. rt5659->pll_src = source;
  3167. return 0;
  3168. }
  3169. static int rt5659_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
  3170. unsigned int rx_mask, int slots, int slot_width)
  3171. {
  3172. struct snd_soc_component *component = dai->component;
  3173. unsigned int val = 0;
  3174. if (rx_mask || tx_mask)
  3175. val |= (1 << 15);
  3176. switch (slots) {
  3177. case 4:
  3178. val |= (1 << 10);
  3179. val |= (1 << 8);
  3180. break;
  3181. case 6:
  3182. val |= (2 << 10);
  3183. val |= (2 << 8);
  3184. break;
  3185. case 8:
  3186. val |= (3 << 10);
  3187. val |= (3 << 8);
  3188. break;
  3189. case 2:
  3190. break;
  3191. default:
  3192. return -EINVAL;
  3193. }
  3194. switch (slot_width) {
  3195. case 20:
  3196. val |= (1 << 6);
  3197. val |= (1 << 4);
  3198. break;
  3199. case 24:
  3200. val |= (2 << 6);
  3201. val |= (2 << 4);
  3202. break;
  3203. case 32:
  3204. val |= (3 << 6);
  3205. val |= (3 << 4);
  3206. break;
  3207. case 16:
  3208. break;
  3209. default:
  3210. return -EINVAL;
  3211. }
  3212. snd_soc_component_update_bits(component, RT5659_TDM_CTRL_1, 0x8ff0, val);
  3213. return 0;
  3214. }
  3215. static int rt5659_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
  3216. {
  3217. struct snd_soc_component *component = dai->component;
  3218. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  3219. dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
  3220. rt5659->bclk[dai->id] = ratio;
  3221. if (ratio == 64) {
  3222. switch (dai->id) {
  3223. case RT5659_AIF2:
  3224. snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
  3225. RT5659_I2S_BCLK_MS2_MASK,
  3226. RT5659_I2S_BCLK_MS2_64);
  3227. break;
  3228. case RT5659_AIF3:
  3229. snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
  3230. RT5659_I2S_BCLK_MS3_MASK,
  3231. RT5659_I2S_BCLK_MS3_64);
  3232. break;
  3233. }
  3234. }
  3235. return 0;
  3236. }
  3237. static int rt5659_set_bias_level(struct snd_soc_component *component,
  3238. enum snd_soc_bias_level level)
  3239. {
  3240. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  3241. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  3242. int ret;
  3243. switch (level) {
  3244. case SND_SOC_BIAS_PREPARE:
  3245. regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
  3246. RT5659_DIG_GATE_CTRL, RT5659_DIG_GATE_CTRL);
  3247. regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
  3248. RT5659_PWR_LDO, RT5659_PWR_LDO);
  3249. regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
  3250. RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2,
  3251. RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2);
  3252. msleep(20);
  3253. regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
  3254. RT5659_PWR_FV1 | RT5659_PWR_FV2,
  3255. RT5659_PWR_FV1 | RT5659_PWR_FV2);
  3256. break;
  3257. case SND_SOC_BIAS_STANDBY:
  3258. if (dapm->bias_level == SND_SOC_BIAS_OFF) {
  3259. ret = clk_prepare_enable(rt5659->mclk);
  3260. if (ret) {
  3261. dev_err(component->dev,
  3262. "failed to enable MCLK: %d\n", ret);
  3263. return ret;
  3264. }
  3265. }
  3266. break;
  3267. case SND_SOC_BIAS_OFF:
  3268. regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
  3269. RT5659_PWR_LDO, 0);
  3270. regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
  3271. RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2
  3272. | RT5659_PWR_FV1 | RT5659_PWR_FV2,
  3273. RT5659_PWR_MB | RT5659_PWR_VREF2);
  3274. regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
  3275. RT5659_DIG_GATE_CTRL, 0);
  3276. clk_disable_unprepare(rt5659->mclk);
  3277. break;
  3278. default:
  3279. break;
  3280. }
  3281. return 0;
  3282. }
  3283. static int rt5659_probe(struct snd_soc_component *component)
  3284. {
  3285. struct snd_soc_dapm_context *dapm =
  3286. snd_soc_component_get_dapm(component);
  3287. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  3288. rt5659->component = component;
  3289. switch (rt5659->pdata.jd_src) {
  3290. case RT5659_JD_HDA_HEADER:
  3291. break;
  3292. default:
  3293. snd_soc_dapm_new_controls(dapm,
  3294. rt5659_particular_dapm_widgets,
  3295. ARRAY_SIZE(rt5659_particular_dapm_widgets));
  3296. break;
  3297. }
  3298. return 0;
  3299. }
  3300. static void rt5659_remove(struct snd_soc_component *component)
  3301. {
  3302. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  3303. regmap_write(rt5659->regmap, RT5659_RESET, 0);
  3304. }
  3305. #ifdef CONFIG_PM
  3306. static int rt5659_suspend(struct snd_soc_component *component)
  3307. {
  3308. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  3309. regcache_cache_only(rt5659->regmap, true);
  3310. regcache_mark_dirty(rt5659->regmap);
  3311. return 0;
  3312. }
  3313. static int rt5659_resume(struct snd_soc_component *component)
  3314. {
  3315. struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
  3316. regcache_cache_only(rt5659->regmap, false);
  3317. regcache_sync(rt5659->regmap);
  3318. return 0;
  3319. }
  3320. #else
  3321. #define rt5659_suspend NULL
  3322. #define rt5659_resume NULL
  3323. #endif
  3324. #define RT5659_STEREO_RATES SNDRV_PCM_RATE_8000_192000
  3325. #define RT5659_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  3326. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
  3327. static const struct snd_soc_dai_ops rt5659_aif_dai_ops = {
  3328. .hw_params = rt5659_hw_params,
  3329. .set_fmt = rt5659_set_dai_fmt,
  3330. .set_tdm_slot = rt5659_set_tdm_slot,
  3331. .set_bclk_ratio = rt5659_set_bclk_ratio,
  3332. };
  3333. static struct snd_soc_dai_driver rt5659_dai[] = {
  3334. {
  3335. .name = "rt5659-aif1",
  3336. .id = RT5659_AIF1,
  3337. .playback = {
  3338. .stream_name = "AIF1 Playback",
  3339. .channels_min = 1,
  3340. .channels_max = 2,
  3341. .rates = RT5659_STEREO_RATES,
  3342. .formats = RT5659_FORMATS,
  3343. },
  3344. .capture = {
  3345. .stream_name = "AIF1 Capture",
  3346. .channels_min = 1,
  3347. .channels_max = 2,
  3348. .rates = RT5659_STEREO_RATES,
  3349. .formats = RT5659_FORMATS,
  3350. },
  3351. .ops = &rt5659_aif_dai_ops,
  3352. },
  3353. {
  3354. .name = "rt5659-aif2",
  3355. .id = RT5659_AIF2,
  3356. .playback = {
  3357. .stream_name = "AIF2 Playback",
  3358. .channels_min = 1,
  3359. .channels_max = 2,
  3360. .rates = RT5659_STEREO_RATES,
  3361. .formats = RT5659_FORMATS,
  3362. },
  3363. .capture = {
  3364. .stream_name = "AIF2 Capture",
  3365. .channels_min = 1,
  3366. .channels_max = 2,
  3367. .rates = RT5659_STEREO_RATES,
  3368. .formats = RT5659_FORMATS,
  3369. },
  3370. .ops = &rt5659_aif_dai_ops,
  3371. },
  3372. {
  3373. .name = "rt5659-aif3",
  3374. .id = RT5659_AIF3,
  3375. .playback = {
  3376. .stream_name = "AIF3 Playback",
  3377. .channels_min = 1,
  3378. .channels_max = 2,
  3379. .rates = RT5659_STEREO_RATES,
  3380. .formats = RT5659_FORMATS,
  3381. },
  3382. .capture = {
  3383. .stream_name = "AIF3 Capture",
  3384. .channels_min = 1,
  3385. .channels_max = 2,
  3386. .rates = RT5659_STEREO_RATES,
  3387. .formats = RT5659_FORMATS,
  3388. },
  3389. .ops = &rt5659_aif_dai_ops,
  3390. },
  3391. };
  3392. static const struct snd_soc_component_driver soc_component_dev_rt5659 = {
  3393. .probe = rt5659_probe,
  3394. .remove = rt5659_remove,
  3395. .suspend = rt5659_suspend,
  3396. .resume = rt5659_resume,
  3397. .set_bias_level = rt5659_set_bias_level,
  3398. .controls = rt5659_snd_controls,
  3399. .num_controls = ARRAY_SIZE(rt5659_snd_controls),
  3400. .dapm_widgets = rt5659_dapm_widgets,
  3401. .num_dapm_widgets = ARRAY_SIZE(rt5659_dapm_widgets),
  3402. .dapm_routes = rt5659_dapm_routes,
  3403. .num_dapm_routes = ARRAY_SIZE(rt5659_dapm_routes),
  3404. .set_sysclk = rt5659_set_component_sysclk,
  3405. .set_pll = rt5659_set_component_pll,
  3406. .use_pmdown_time = 1,
  3407. .endianness = 1,
  3408. .non_legacy_dai_naming = 1,
  3409. };
  3410. static const struct regmap_config rt5659_regmap = {
  3411. .reg_bits = 16,
  3412. .val_bits = 16,
  3413. .max_register = 0x0400,
  3414. .volatile_reg = rt5659_volatile_register,
  3415. .readable_reg = rt5659_readable_register,
  3416. .cache_type = REGCACHE_RBTREE,
  3417. .reg_defaults = rt5659_reg,
  3418. .num_reg_defaults = ARRAY_SIZE(rt5659_reg),
  3419. };
  3420. static const struct i2c_device_id rt5659_i2c_id[] = {
  3421. { "rt5658", 0 },
  3422. { "rt5659", 0 },
  3423. { }
  3424. };
  3425. MODULE_DEVICE_TABLE(i2c, rt5659_i2c_id);
  3426. static int rt5659_parse_dt(struct rt5659_priv *rt5659, struct device *dev)
  3427. {
  3428. rt5659->pdata.in1_diff = device_property_read_bool(dev,
  3429. "realtek,in1-differential");
  3430. rt5659->pdata.in3_diff = device_property_read_bool(dev,
  3431. "realtek,in3-differential");
  3432. rt5659->pdata.in4_diff = device_property_read_bool(dev,
  3433. "realtek,in4-differential");
  3434. device_property_read_u32(dev, "realtek,dmic1-data-pin",
  3435. &rt5659->pdata.dmic1_data_pin);
  3436. device_property_read_u32(dev, "realtek,dmic2-data-pin",
  3437. &rt5659->pdata.dmic2_data_pin);
  3438. device_property_read_u32(dev, "realtek,jd-src",
  3439. &rt5659->pdata.jd_src);
  3440. return 0;
  3441. }
  3442. static void rt5659_calibrate(struct rt5659_priv *rt5659)
  3443. {
  3444. int value, count;
  3445. /* Calibrate HPO Start */
  3446. /* Fine tune HP Performance */
  3447. regmap_write(rt5659->regmap, RT5659_BIAS_CUR_CTRL_8, 0xa502);
  3448. regmap_write(rt5659->regmap, RT5659_CHOP_DAC, 0x3030);
  3449. regmap_write(rt5659->regmap, RT5659_PRE_DIV_1, 0xef00);
  3450. regmap_write(rt5659->regmap, RT5659_PRE_DIV_2, 0xeffc);
  3451. regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0280);
  3452. regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0001);
  3453. regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x8000);
  3454. regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xaa7e);
  3455. msleep(60);
  3456. regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe7e);
  3457. msleep(50);
  3458. regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0004);
  3459. regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0400);
  3460. msleep(50);
  3461. regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0080);
  3462. usleep_range(10000, 10005);
  3463. regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0009);
  3464. msleep(50);
  3465. regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0f80);
  3466. msleep(50);
  3467. regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0e16);
  3468. msleep(50);
  3469. /* Enalbe K ADC Power And Clock */
  3470. regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0505);
  3471. msleep(50);
  3472. regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0184);
  3473. regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x3c05);
  3474. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c1);
  3475. /* K Headphone */
  3476. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
  3477. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x5100);
  3478. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0014);
  3479. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0xd100);
  3480. msleep(60);
  3481. /* Manual K ADC Offset */
  3482. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
  3483. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4900);
  3484. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0016);
  3485. regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
  3486. 0x8000, 0x8000);
  3487. count = 0;
  3488. while (true) {
  3489. regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
  3490. if (value & 0x8000)
  3491. usleep_range(10000, 10005);
  3492. else
  3493. break;
  3494. if (count > 30) {
  3495. dev_err(rt5659->component->dev,
  3496. "HP Calibration 1 Failure\n");
  3497. return;
  3498. }
  3499. count++;
  3500. }
  3501. /* Manual K Internal Path Offset */
  3502. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
  3503. regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x0000);
  3504. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4500);
  3505. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x001f);
  3506. regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
  3507. 0x8000, 0x8000);
  3508. count = 0;
  3509. while (true) {
  3510. regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
  3511. if (value & 0x8000)
  3512. usleep_range(10000, 10005);
  3513. else
  3514. break;
  3515. if (count > 85) {
  3516. dev_err(rt5659->component->dev,
  3517. "HP Calibration 2 Failure\n");
  3518. return;
  3519. }
  3520. count++;
  3521. }
  3522. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0000);
  3523. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
  3524. /* Calibrate HPO End */
  3525. /* Calibrate SPO Start */
  3526. regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
  3527. regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0260);
  3528. regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x3000);
  3529. regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0xc000);
  3530. regmap_write(rt5659->regmap, RT5659_A_DAC_MUX, 0x000c);
  3531. regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x8000);
  3532. regmap_write(rt5659->regmap, RT5659_SPO_VOL, 0x0808);
  3533. regmap_write(rt5659->regmap, RT5659_SPK_L_MIXER, 0x001e);
  3534. regmap_write(rt5659->regmap, RT5659_SPK_R_MIXER, 0x001e);
  3535. regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0803);
  3536. regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0554);
  3537. regmap_write(rt5659->regmap, RT5659_SPO_AMP_GAIN, 0x1103);
  3538. /* Enalbe K ADC Power And Clock */
  3539. regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0909);
  3540. regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x0001,
  3541. 0x0001);
  3542. /* Start Calibration */
  3543. regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
  3544. regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x0021);
  3545. regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, 0x3e80);
  3546. regmap_update_bits(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1,
  3547. 0x8000, 0x8000);
  3548. count = 0;
  3549. while (true) {
  3550. regmap_read(rt5659->regmap,
  3551. RT5659_SPK_DC_CAILB_CTRL_1, &value);
  3552. if (value & 0x8000)
  3553. usleep_range(10000, 10005);
  3554. else
  3555. break;
  3556. if (count > 10) {
  3557. dev_err(rt5659->component->dev,
  3558. "SPK Calibration Failure\n");
  3559. return;
  3560. }
  3561. count++;
  3562. }
  3563. /* Calibrate SPO End */
  3564. /* Calibrate MONO Start */
  3565. regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0000);
  3566. regmap_write(rt5659->regmap, RT5659_MONOMIX_IN_GAIN, 0x021f);
  3567. regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0x480a);
  3568. /* MONO NG2 GAIN 5dB */
  3569. regmap_write(rt5659->regmap, RT5659_MONO_GAIN, 0x0003);
  3570. regmap_write(rt5659->regmap, RT5659_MONO_NG2_CTRL_5, 0x0009);
  3571. /* Start Calibration */
  3572. regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x000f);
  3573. regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
  3574. regmap_update_bits(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
  3575. 0x8000, 0x8000);
  3576. count = 0;
  3577. while (true) {
  3578. regmap_read(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
  3579. &value);
  3580. if (value & 0x8000)
  3581. usleep_range(10000, 10005);
  3582. else
  3583. break;
  3584. if (count > 35) {
  3585. dev_err(rt5659->component->dev,
  3586. "Mono Calibration Failure\n");
  3587. return;
  3588. }
  3589. count++;
  3590. }
  3591. regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
  3592. /* Calibrate MONO End */
  3593. /* Power Off */
  3594. regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0808);
  3595. regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0000);
  3596. regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x2005);
  3597. regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
  3598. regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0000);
  3599. regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0011);
  3600. regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0150);
  3601. regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe3e);
  3602. regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0xc80a);
  3603. regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
  3604. regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x0000);
  3605. regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0x0000);
  3606. regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0000);
  3607. regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0000);
  3608. regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0x003e);
  3609. regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0060);
  3610. regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
  3611. regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x0000);
  3612. regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0080);
  3613. regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x8080);
  3614. regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
  3615. }
  3616. static void rt5659_intel_hd_header_probe_setup(struct rt5659_priv *rt5659)
  3617. {
  3618. int value;
  3619. regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
  3620. if (!(value & 0x8)) {
  3621. rt5659->hda_hp_plugged = true;
  3622. regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
  3623. 0x10, 0x0);
  3624. } else {
  3625. regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
  3626. 0x10, 0x10);
  3627. }
  3628. regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
  3629. RT5659_PWR_VREF2 | RT5659_PWR_MB,
  3630. RT5659_PWR_VREF2 | RT5659_PWR_MB);
  3631. msleep(20);
  3632. regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
  3633. RT5659_PWR_FV2, RT5659_PWR_FV2);
  3634. regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_3, RT5659_PWR_LDO2,
  3635. RT5659_PWR_LDO2);
  3636. regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_2, RT5659_PWR_MB1,
  3637. RT5659_PWR_MB1);
  3638. regmap_update_bits(rt5659->regmap, RT5659_PWR_VOL, RT5659_PWR_MIC_DET,
  3639. RT5659_PWR_MIC_DET);
  3640. msleep(20);
  3641. regmap_update_bits(rt5659->regmap, RT5659_4BTN_IL_CMD_2,
  3642. RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
  3643. regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
  3644. regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
  3645. regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
  3646. if (value & 0x2000) {
  3647. rt5659->hda_mic_plugged = true;
  3648. regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
  3649. 0x2, 0x2);
  3650. } else {
  3651. regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
  3652. 0x2, 0x0);
  3653. }
  3654. regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
  3655. RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
  3656. }
  3657. static int rt5659_i2c_probe(struct i2c_client *i2c,
  3658. const struct i2c_device_id *id)
  3659. {
  3660. struct rt5659_platform_data *pdata = dev_get_platdata(&i2c->dev);
  3661. struct rt5659_priv *rt5659;
  3662. int ret;
  3663. unsigned int val;
  3664. rt5659 = devm_kzalloc(&i2c->dev, sizeof(struct rt5659_priv),
  3665. GFP_KERNEL);
  3666. if (rt5659 == NULL)
  3667. return -ENOMEM;
  3668. i2c_set_clientdata(i2c, rt5659);
  3669. if (pdata)
  3670. rt5659->pdata = *pdata;
  3671. else
  3672. rt5659_parse_dt(rt5659, &i2c->dev);
  3673. rt5659->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, "ldo1-en",
  3674. GPIOD_OUT_HIGH);
  3675. if (IS_ERR(rt5659->gpiod_ldo1_en))
  3676. dev_warn(&i2c->dev, "Request ldo1-en GPIO failed\n");
  3677. rt5659->gpiod_reset = devm_gpiod_get_optional(&i2c->dev, "reset",
  3678. GPIOD_OUT_HIGH);
  3679. /* Sleep for 300 ms miniumum */
  3680. msleep(300);
  3681. rt5659->regmap = devm_regmap_init_i2c(i2c, &rt5659_regmap);
  3682. if (IS_ERR(rt5659->regmap)) {
  3683. ret = PTR_ERR(rt5659->regmap);
  3684. dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
  3685. ret);
  3686. return ret;
  3687. }
  3688. regmap_read(rt5659->regmap, RT5659_DEVICE_ID, &val);
  3689. if (val != DEVICE_ID) {
  3690. dev_err(&i2c->dev,
  3691. "Device with ID register %x is not rt5659\n", val);
  3692. return -ENODEV;
  3693. }
  3694. regmap_write(rt5659->regmap, RT5659_RESET, 0);
  3695. /* Check if MCLK provided */
  3696. rt5659->mclk = devm_clk_get(&i2c->dev, "mclk");
  3697. if (IS_ERR(rt5659->mclk)) {
  3698. if (PTR_ERR(rt5659->mclk) != -ENOENT)
  3699. return PTR_ERR(rt5659->mclk);
  3700. /* Otherwise mark the mclk pointer to NULL */
  3701. rt5659->mclk = NULL;
  3702. }
  3703. rt5659_calibrate(rt5659);
  3704. /* line in diff mode*/
  3705. if (rt5659->pdata.in1_diff)
  3706. regmap_update_bits(rt5659->regmap, RT5659_IN1_IN2,
  3707. RT5659_IN1_DF_MASK, RT5659_IN1_DF_MASK);
  3708. if (rt5659->pdata.in3_diff)
  3709. regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
  3710. RT5659_IN3_DF_MASK, RT5659_IN3_DF_MASK);
  3711. if (rt5659->pdata.in4_diff)
  3712. regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
  3713. RT5659_IN4_DF_MASK, RT5659_IN4_DF_MASK);
  3714. /* DMIC pin*/
  3715. if (rt5659->pdata.dmic1_data_pin != RT5659_DMIC1_NULL ||
  3716. rt5659->pdata.dmic2_data_pin != RT5659_DMIC2_NULL) {
  3717. regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
  3718. RT5659_GP2_PIN_MASK, RT5659_GP2_PIN_DMIC1_SCL);
  3719. switch (rt5659->pdata.dmic1_data_pin) {
  3720. case RT5659_DMIC1_DATA_IN2N:
  3721. regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
  3722. RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_IN2N);
  3723. break;
  3724. case RT5659_DMIC1_DATA_GPIO5:
  3725. regmap_update_bits(rt5659->regmap,
  3726. RT5659_GPIO_CTRL_3,
  3727. RT5659_I2S2_PIN_MASK,
  3728. RT5659_I2S2_PIN_GPIO);
  3729. regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
  3730. RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO5);
  3731. regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
  3732. RT5659_GP5_PIN_MASK, RT5659_GP5_PIN_DMIC1_SDA);
  3733. break;
  3734. case RT5659_DMIC1_DATA_GPIO9:
  3735. regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
  3736. RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO9);
  3737. regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
  3738. RT5659_GP9_PIN_MASK, RT5659_GP9_PIN_DMIC1_SDA);
  3739. break;
  3740. case RT5659_DMIC1_DATA_GPIO11:
  3741. regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
  3742. RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO11);
  3743. regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
  3744. RT5659_GP11_PIN_MASK,
  3745. RT5659_GP11_PIN_DMIC1_SDA);
  3746. break;
  3747. default:
  3748. dev_dbg(&i2c->dev, "no DMIC1\n");
  3749. break;
  3750. }
  3751. switch (rt5659->pdata.dmic2_data_pin) {
  3752. case RT5659_DMIC2_DATA_IN2P:
  3753. regmap_update_bits(rt5659->regmap,
  3754. RT5659_DMIC_CTRL_1,
  3755. RT5659_DMIC_2_DP_MASK,
  3756. RT5659_DMIC_2_DP_IN2P);
  3757. break;
  3758. case RT5659_DMIC2_DATA_GPIO6:
  3759. regmap_update_bits(rt5659->regmap,
  3760. RT5659_DMIC_CTRL_1,
  3761. RT5659_DMIC_2_DP_MASK,
  3762. RT5659_DMIC_2_DP_GPIO6);
  3763. regmap_update_bits(rt5659->regmap,
  3764. RT5659_GPIO_CTRL_1,
  3765. RT5659_GP6_PIN_MASK,
  3766. RT5659_GP6_PIN_DMIC2_SDA);
  3767. break;
  3768. case RT5659_DMIC2_DATA_GPIO10:
  3769. regmap_update_bits(rt5659->regmap,
  3770. RT5659_DMIC_CTRL_1,
  3771. RT5659_DMIC_2_DP_MASK,
  3772. RT5659_DMIC_2_DP_GPIO10);
  3773. regmap_update_bits(rt5659->regmap,
  3774. RT5659_GPIO_CTRL_1,
  3775. RT5659_GP10_PIN_MASK,
  3776. RT5659_GP10_PIN_DMIC2_SDA);
  3777. break;
  3778. case RT5659_DMIC2_DATA_GPIO12:
  3779. regmap_update_bits(rt5659->regmap,
  3780. RT5659_DMIC_CTRL_1,
  3781. RT5659_DMIC_2_DP_MASK,
  3782. RT5659_DMIC_2_DP_GPIO12);
  3783. regmap_update_bits(rt5659->regmap,
  3784. RT5659_GPIO_CTRL_1,
  3785. RT5659_GP12_PIN_MASK,
  3786. RT5659_GP12_PIN_DMIC2_SDA);
  3787. break;
  3788. default:
  3789. dev_dbg(&i2c->dev, "no DMIC2\n");
  3790. break;
  3791. }
  3792. } else {
  3793. regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
  3794. RT5659_GP2_PIN_MASK | RT5659_GP5_PIN_MASK |
  3795. RT5659_GP9_PIN_MASK | RT5659_GP11_PIN_MASK |
  3796. RT5659_GP6_PIN_MASK | RT5659_GP10_PIN_MASK |
  3797. RT5659_GP12_PIN_MASK,
  3798. RT5659_GP2_PIN_GPIO2 | RT5659_GP5_PIN_GPIO5 |
  3799. RT5659_GP9_PIN_GPIO9 | RT5659_GP11_PIN_GPIO11 |
  3800. RT5659_GP6_PIN_GPIO6 | RT5659_GP10_PIN_GPIO10 |
  3801. RT5659_GP12_PIN_GPIO12);
  3802. regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
  3803. RT5659_DMIC_1_DP_MASK | RT5659_DMIC_2_DP_MASK,
  3804. RT5659_DMIC_1_DP_IN2N | RT5659_DMIC_2_DP_IN2P);
  3805. }
  3806. switch (rt5659->pdata.jd_src) {
  3807. case RT5659_JD3:
  3808. regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0xa880);
  3809. regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x9000);
  3810. regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_1, 0xc800);
  3811. regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
  3812. RT5659_PWR_MB, RT5659_PWR_MB);
  3813. regmap_write(rt5659->regmap, RT5659_PWR_ANLG_2, 0x0001);
  3814. regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_2, 0x0040);
  3815. INIT_DELAYED_WORK(&rt5659->jack_detect_work,
  3816. rt5659_jack_detect_work);
  3817. break;
  3818. case RT5659_JD_HDA_HEADER:
  3819. regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_3, 0x8000);
  3820. regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x0900);
  3821. regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0x70c0);
  3822. regmap_write(rt5659->regmap, RT5659_JD_CTRL_1, 0x2000);
  3823. regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_1, 0x0040);
  3824. INIT_DELAYED_WORK(&rt5659->jack_detect_work,
  3825. rt5659_jack_detect_intel_hd_header);
  3826. rt5659_intel_hd_header_probe_setup(rt5659);
  3827. break;
  3828. default:
  3829. break;
  3830. }
  3831. if (i2c->irq) {
  3832. ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
  3833. rt5659_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
  3834. | IRQF_ONESHOT, "rt5659", rt5659);
  3835. if (ret)
  3836. dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
  3837. /* Enable IRQ output for GPIO1 pin any way */
  3838. regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
  3839. RT5659_GP1_PIN_MASK, RT5659_GP1_PIN_IRQ);
  3840. }
  3841. return devm_snd_soc_register_component(&i2c->dev,
  3842. &soc_component_dev_rt5659,
  3843. rt5659_dai, ARRAY_SIZE(rt5659_dai));
  3844. }
  3845. static void rt5659_i2c_shutdown(struct i2c_client *client)
  3846. {
  3847. struct rt5659_priv *rt5659 = i2c_get_clientdata(client);
  3848. regmap_write(rt5659->regmap, RT5659_RESET, 0);
  3849. }
  3850. #ifdef CONFIG_OF
  3851. static const struct of_device_id rt5659_of_match[] = {
  3852. { .compatible = "realtek,rt5658", },
  3853. { .compatible = "realtek,rt5659", },
  3854. { },
  3855. };
  3856. MODULE_DEVICE_TABLE(of, rt5659_of_match);
  3857. #endif
  3858. #ifdef CONFIG_ACPI
  3859. static const struct acpi_device_id rt5659_acpi_match[] = {
  3860. { "10EC5658", 0, },
  3861. { "10EC5659", 0, },
  3862. { },
  3863. };
  3864. MODULE_DEVICE_TABLE(acpi, rt5659_acpi_match);
  3865. #endif
  3866. static struct i2c_driver rt5659_i2c_driver = {
  3867. .driver = {
  3868. .name = "rt5659",
  3869. .of_match_table = of_match_ptr(rt5659_of_match),
  3870. .acpi_match_table = ACPI_PTR(rt5659_acpi_match),
  3871. },
  3872. .probe = rt5659_i2c_probe,
  3873. .shutdown = rt5659_i2c_shutdown,
  3874. .id_table = rt5659_i2c_id,
  3875. };
  3876. module_i2c_driver(rt5659_i2c_driver);
  3877. MODULE_DESCRIPTION("ASoC RT5659 driver");
  3878. MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
  3879. MODULE_LICENSE("GPL v2");