rt5631.h 27 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef __RTCODEC5631_H__
  3. #define __RTCODEC5631_H__
  4. #define RT5631_RESET 0x00
  5. #define RT5631_SPK_OUT_VOL 0x02
  6. #define RT5631_HP_OUT_VOL 0x04
  7. #define RT5631_MONO_AXO_1_2_VOL 0x06
  8. #define RT5631_AUX_IN_VOL 0x0A
  9. #define RT5631_STEREO_DAC_VOL_1 0x0C
  10. #define RT5631_MIC_CTRL_1 0x0E
  11. #define RT5631_STEREO_DAC_VOL_2 0x10
  12. #define RT5631_ADC_CTRL_1 0x12
  13. #define RT5631_ADC_REC_MIXER 0x14
  14. #define RT5631_ADC_CTRL_2 0x16
  15. #define RT5631_VDAC_DIG_VOL 0x18
  16. #define RT5631_OUTMIXER_L_CTRL 0x1A
  17. #define RT5631_OUTMIXER_R_CTRL 0x1C
  18. #define RT5631_AXO1MIXER_CTRL 0x1E
  19. #define RT5631_AXO2MIXER_CTRL 0x20
  20. #define RT5631_MIC_CTRL_2 0x22
  21. #define RT5631_DIG_MIC_CTRL 0x24
  22. #define RT5631_MONO_INPUT_VOL 0x26
  23. #define RT5631_SPK_MIXER_CTRL 0x28
  24. #define RT5631_SPK_MONO_OUT_CTRL 0x2A
  25. #define RT5631_SPK_MONO_HP_OUT_CTRL 0x2C
  26. #define RT5631_SDP_CTRL 0x34
  27. #define RT5631_MONO_SDP_CTRL 0x36
  28. #define RT5631_STEREO_AD_DA_CLK_CTRL 0x38
  29. #define RT5631_PWR_MANAG_ADD1 0x3A
  30. #define RT5631_PWR_MANAG_ADD2 0x3B
  31. #define RT5631_PWR_MANAG_ADD3 0x3C
  32. #define RT5631_PWR_MANAG_ADD4 0x3E
  33. #define RT5631_GEN_PUR_CTRL_REG 0x40
  34. #define RT5631_GLOBAL_CLK_CTRL 0x42
  35. #define RT5631_PLL_CTRL 0x44
  36. #define RT5631_INT_ST_IRQ_CTRL_1 0x48
  37. #define RT5631_INT_ST_IRQ_CTRL_2 0x4A
  38. #define RT5631_GPIO_CTRL 0x4C
  39. #define RT5631_MISC_CTRL 0x52
  40. #define RT5631_DEPOP_FUN_CTRL_1 0x54
  41. #define RT5631_DEPOP_FUN_CTRL_2 0x56
  42. #define RT5631_JACK_DET_CTRL 0x5A
  43. #define RT5631_SOFT_VOL_CTRL 0x5C
  44. #define RT5631_ALC_CTRL_1 0x64
  45. #define RT5631_ALC_CTRL_2 0x65
  46. #define RT5631_ALC_CTRL_3 0x66
  47. #define RT5631_PSEUDO_SPATL_CTRL 0x68
  48. #define RT5631_INDEX_ADD 0x6A
  49. #define RT5631_INDEX_DATA 0x6C
  50. #define RT5631_EQ_CTRL 0x6E
  51. #define RT5631_VENDOR_ID 0x7A
  52. #define RT5631_VENDOR_ID1 0x7C
  53. #define RT5631_VENDOR_ID2 0x7E
  54. /* Index of Codec Private Register definition */
  55. #define RT5631_EQ_BW_LOP 0x00
  56. #define RT5631_EQ_GAIN_LOP 0x01
  57. #define RT5631_EQ_FC_BP1 0x02
  58. #define RT5631_EQ_BW_BP1 0x03
  59. #define RT5631_EQ_GAIN_BP1 0x04
  60. #define RT5631_EQ_FC_BP2 0x05
  61. #define RT5631_EQ_BW_BP2 0x06
  62. #define RT5631_EQ_GAIN_BP2 0x07
  63. #define RT5631_EQ_FC_BP3 0x08
  64. #define RT5631_EQ_BW_BP3 0x09
  65. #define RT5631_EQ_GAIN_BP3 0x0a
  66. #define RT5631_EQ_BW_HIP 0x0b
  67. #define RT5631_EQ_GAIN_HIP 0x0c
  68. #define RT5631_EQ_HPF_A1 0x0d
  69. #define RT5631_EQ_HPF_A2 0x0e
  70. #define RT5631_EQ_HPF_GAIN 0x0f
  71. #define RT5631_EQ_PRE_VOL_CTRL 0x11
  72. #define RT5631_EQ_POST_VOL_CTRL 0x12
  73. #define RT5631_TEST_MODE_CTRL 0x39
  74. #define RT5631_CP_INTL_REG2 0x45
  75. #define RT5631_ADDA_MIXER_INTL_REG3 0x52
  76. #define RT5631_SPK_INTL_CTRL 0x56
  77. /* global definition */
  78. #define RT5631_L_MUTE (0x1 << 15)
  79. #define RT5631_L_MUTE_SHIFT 15
  80. #define RT5631_L_EN (0x1 << 14)
  81. #define RT5631_L_EN_SHIFT 14
  82. #define RT5631_R_MUTE (0x1 << 7)
  83. #define RT5631_R_MUTE_SHIFT 7
  84. #define RT5631_R_EN (0x1 << 6)
  85. #define RT5631_R_EN_SHIFT 6
  86. #define RT5631_VOL_MASK 0x1f
  87. #define RT5631_L_VOL_SHIFT 8
  88. #define RT5631_R_VOL_SHIFT 0
  89. /* Speaker Output Control(0x02) */
  90. #define RT5631_SPK_L_VOL_SEL_MASK (0x1 << 14)
  91. #define RT5631_SPK_L_VOL_SEL_VMID (0x0 << 14)
  92. #define RT5631_SPK_L_VOL_SEL_SPKMIX_L (0x1 << 14)
  93. #define RT5631_SPK_R_VOL_SEL_MASK (0x1 << 6)
  94. #define RT5631_SPK_R_VOL_SEL_VMID (0x0 << 6)
  95. #define RT5631_SPK_R_VOL_SEL_SPKMIX_R (0x1 << 6)
  96. /* Headphone Output Control(0x04) */
  97. #define RT5631_HP_L_VOL_SEL_MASK (0x1 << 14)
  98. #define RT5631_HP_L_VOL_SEL_VMID (0x0 << 14)
  99. #define RT5631_HP_L_VOL_SEL_OUTMIX_L (0x1 << 14)
  100. #define RT5631_HP_R_VOL_SEL_MASK (0x1 << 6)
  101. #define RT5631_HP_R_VOL_SEL_VMID (0x0 << 6)
  102. #define RT5631_HP_R_VOL_SEL_OUTMIX_R (0x1 << 6)
  103. /* Output Control for AUXOUT/MONO(0x06) */
  104. #define RT5631_AUXOUT_1_VOL_SEL_MASK (0x1 << 14)
  105. #define RT5631_AUXOUT_1_VOL_SEL_VMID (0x0 << 14)
  106. #define RT5631_AUXOUT_1_VOL_SEL_OUTMIX_L (0x1 << 14)
  107. #define RT5631_MUTE_MONO (0x1 << 13)
  108. #define RT5631_MUTE_MONO_SHIFT 13
  109. #define RT5631_AUXOUT_2_VOL_SEL_MASK (0x1 << 6)
  110. #define RT5631_AUXOUT_2_VOL_SEL_VMID (0x0 << 6)
  111. #define RT5631_AUXOUT_2_VOL_SEL_OUTMIX_R (0x1 << 6)
  112. /* Microphone Input Control 1(0x0E) */
  113. #define RT5631_MIC1_DIFF_INPUT_CTRL (0x1 << 15)
  114. #define RT5631_MIC1_DIFF_INPUT_SHIFT 15
  115. #define RT5631_MIC2_DIFF_INPUT_CTRL (0x1 << 7)
  116. #define RT5631_MIC2_DIFF_INPUT_SHIFT 7
  117. /* Stereo DAC Digital Volume2(0x10) */
  118. #define RT5631_DAC_VOL_MASK 0xff
  119. /* ADC Recording Mixer Control(0x14) */
  120. #define RT5631_M_OUTMIXER_L_TO_RECMIXER_L (0x1 << 15)
  121. #define RT5631_M_OUTMIXL_RECMIXL_BIT 15
  122. #define RT5631_M_MIC1_TO_RECMIXER_L (0x1 << 14)
  123. #define RT5631_M_MIC1_RECMIXL_BIT 14
  124. #define RT5631_M_AXIL_TO_RECMIXER_L (0x1 << 13)
  125. #define RT5631_M_AXIL_RECMIXL_BIT 13
  126. #define RT5631_M_MONO_IN_TO_RECMIXER_L (0x1 << 12)
  127. #define RT5631_M_MONO_IN_RECMIXL_BIT 12
  128. #define RT5631_M_OUTMIXER_R_TO_RECMIXER_R (0x1 << 7)
  129. #define RT5631_M_OUTMIXR_RECMIXR_BIT 7
  130. #define RT5631_M_MIC2_TO_RECMIXER_R (0x1 << 6)
  131. #define RT5631_M_MIC2_RECMIXR_BIT 6
  132. #define RT5631_M_AXIR_TO_RECMIXER_R (0x1 << 5)
  133. #define RT5631_M_AXIR_RECMIXR_BIT 5
  134. #define RT5631_M_MONO_IN_TO_RECMIXER_R (0x1 << 4)
  135. #define RT5631_M_MONO_IN_RECMIXR_BIT 4
  136. /* Left Output Mixer Control(0x1A) */
  137. #define RT5631_M_RECMIXER_L_TO_OUTMIXER_L (0x1 << 15)
  138. #define RT5631_M_RECMIXL_OUTMIXL_BIT 15
  139. #define RT5631_M_RECMIXER_R_TO_OUTMIXER_L (0x1 << 14)
  140. #define RT5631_M_RECMIXR_OUTMIXL_BIT 14
  141. #define RT5631_M_DAC_L_TO_OUTMIXER_L (0x1 << 13)
  142. #define RT5631_M_DACL_OUTMIXL_BIT 13
  143. #define RT5631_M_MIC1_TO_OUTMIXER_L (0x1 << 12)
  144. #define RT5631_M_MIC1_OUTMIXL_BIT 12
  145. #define RT5631_M_MIC2_TO_OUTMIXER_L (0x1 << 11)
  146. #define RT5631_M_MIC2_OUTMIXL_BIT 11
  147. #define RT5631_M_MONO_IN_P_TO_OUTMIXER_L (0x1 << 10)
  148. #define RT5631_M_MONO_INP_OUTMIXL_BIT 10
  149. #define RT5631_M_AXIL_TO_OUTMIXER_L (0x1 << 9)
  150. #define RT5631_M_AXIL_OUTMIXL_BIT 9
  151. #define RT5631_M_AXIR_TO_OUTMIXER_L (0x1 << 8)
  152. #define RT5631_M_AXIR_OUTMIXL_BIT 8
  153. #define RT5631_M_VDAC_TO_OUTMIXER_L (0x1 << 7)
  154. #define RT5631_M_VDAC_OUTMIXL_BIT 7
  155. /* Right Output Mixer Control(0x1C) */
  156. #define RT5631_M_RECMIXER_L_TO_OUTMIXER_R (0x1 << 15)
  157. #define RT5631_M_RECMIXL_OUTMIXR_BIT 15
  158. #define RT5631_M_RECMIXER_R_TO_OUTMIXER_R (0x1 << 14)
  159. #define RT5631_M_RECMIXR_OUTMIXR_BIT 14
  160. #define RT5631_M_DAC_R_TO_OUTMIXER_R (0x1 << 13)
  161. #define RT5631_M_DACR_OUTMIXR_BIT 13
  162. #define RT5631_M_MIC1_TO_OUTMIXER_R (0x1 << 12)
  163. #define RT5631_M_MIC1_OUTMIXR_BIT 12
  164. #define RT5631_M_MIC2_TO_OUTMIXER_R (0x1 << 11)
  165. #define RT5631_M_MIC2_OUTMIXR_BIT 11
  166. #define RT5631_M_MONO_IN_N_TO_OUTMIXER_R (0x1 << 10)
  167. #define RT5631_M_MONO_INN_OUTMIXR_BIT 10
  168. #define RT5631_M_AXIL_TO_OUTMIXER_R (0x1 << 9)
  169. #define RT5631_M_AXIL_OUTMIXR_BIT 9
  170. #define RT5631_M_AXIR_TO_OUTMIXER_R (0x1 << 8)
  171. #define RT5631_M_AXIR_OUTMIXR_BIT 8
  172. #define RT5631_M_VDAC_TO_OUTMIXER_R (0x1 << 7)
  173. #define RT5631_M_VDAC_OUTMIXR_BIT 7
  174. /* Lout Mixer Control(0x1E) */
  175. #define RT5631_M_MIC1_TO_AXO1MIXER (0x1 << 15)
  176. #define RT5631_M_MIC1_AXO1MIX_BIT 15
  177. #define RT5631_M_MIC2_TO_AXO1MIXER (0x1 << 11)
  178. #define RT5631_M_MIC2_AXO1MIX_BIT 11
  179. #define RT5631_M_OUTMIXER_L_TO_AXO1MIXER (0x1 << 7)
  180. #define RT5631_M_OUTMIXL_AXO1MIX_BIT 7
  181. #define RT5631_M_OUTMIXER_R_TO_AXO1MIXER (0x1 << 6)
  182. #define RT5631_M_OUTMIXR_AXO1MIX_BIT 6
  183. /* Rout Mixer Control(0x20) */
  184. #define RT5631_M_MIC1_TO_AXO2MIXER (0x1 << 15)
  185. #define RT5631_M_MIC1_AXO2MIX_BIT 15
  186. #define RT5631_M_MIC2_TO_AXO2MIXER (0x1 << 11)
  187. #define RT5631_M_MIC2_AXO2MIX_BIT 11
  188. #define RT5631_M_OUTMIXER_L_TO_AXO2MIXER (0x1 << 7)
  189. #define RT5631_M_OUTMIXL_AXO2MIX_BIT 7
  190. #define RT5631_M_OUTMIXER_R_TO_AXO2MIXER (0x1 << 6)
  191. #define RT5631_M_OUTMIXR_AXO2MIX_BIT 6
  192. /* Micphone Input Control 2(0x22) */
  193. #define RT5631_MIC_BIAS_90_PRECNET_AVDD 1
  194. #define RT5631_MIC_BIAS_75_PRECNET_AVDD 2
  195. #define RT5631_MIC1_BOOST_CTRL_MASK (0xf << 12)
  196. #define RT5631_MIC1_BOOST_CTRL_BYPASS (0x0 << 12)
  197. #define RT5631_MIC1_BOOST_CTRL_20DB (0x1 << 12)
  198. #define RT5631_MIC1_BOOST_CTRL_24DB (0x2 << 12)
  199. #define RT5631_MIC1_BOOST_CTRL_30DB (0x3 << 12)
  200. #define RT5631_MIC1_BOOST_CTRL_35DB (0x4 << 12)
  201. #define RT5631_MIC1_BOOST_CTRL_40DB (0x5 << 12)
  202. #define RT5631_MIC1_BOOST_CTRL_34DB (0x6 << 12)
  203. #define RT5631_MIC1_BOOST_CTRL_50DB (0x7 << 12)
  204. #define RT5631_MIC1_BOOST_CTRL_52DB (0x8 << 12)
  205. #define RT5631_MIC1_BOOST_SHIFT 12
  206. #define RT5631_MIC2_BOOST_CTRL_MASK (0xf << 8)
  207. #define RT5631_MIC2_BOOST_CTRL_BYPASS (0x0 << 8)
  208. #define RT5631_MIC2_BOOST_CTRL_20DB (0x1 << 8)
  209. #define RT5631_MIC2_BOOST_CTRL_24DB (0x2 << 8)
  210. #define RT5631_MIC2_BOOST_CTRL_30DB (0x3 << 8)
  211. #define RT5631_MIC2_BOOST_CTRL_35DB (0x4 << 8)
  212. #define RT5631_MIC2_BOOST_CTRL_40DB (0x5 << 8)
  213. #define RT5631_MIC2_BOOST_CTRL_34DB (0x6 << 8)
  214. #define RT5631_MIC2_BOOST_CTRL_50DB (0x7 << 8)
  215. #define RT5631_MIC2_BOOST_CTRL_52DB (0x8 << 8)
  216. #define RT5631_MIC2_BOOST_SHIFT 8
  217. #define RT5631_MICBIAS1_VOLT_CTRL_MASK (0x1 << 7)
  218. #define RT5631_MICBIAS1_VOLT_CTRL_90P (0x0 << 7)
  219. #define RT5631_MICBIAS1_VOLT_CTRL_75P (0x1 << 7)
  220. #define RT5631_MICBIAS1_S_C_DET_MASK (0x1 << 6)
  221. #define RT5631_MICBIAS1_S_C_DET_DIS (0x0 << 6)
  222. #define RT5631_MICBIAS1_S_C_DET_ENA (0x1 << 6)
  223. #define RT5631_MICBIAS1_SHORT_CURR_DET_MASK (0x3 << 4)
  224. #define RT5631_MICBIAS1_SHORT_CURR_DET_600UA (0x0 << 4)
  225. #define RT5631_MICBIAS1_SHORT_CURR_DET_1500UA (0x1 << 4)
  226. #define RT5631_MICBIAS1_SHORT_CURR_DET_2000UA (0x2 << 4)
  227. #define RT5631_MICBIAS2_VOLT_CTRL_MASK (0x1 << 3)
  228. #define RT5631_MICBIAS2_VOLT_CTRL_90P (0x0 << 3)
  229. #define RT5631_MICBIAS2_VOLT_CTRL_75P (0x1 << 3)
  230. #define RT5631_MICBIAS2_S_C_DET_MASK (0x1 << 2)
  231. #define RT5631_MICBIAS2_S_C_DET_DIS (0x0 << 2)
  232. #define RT5631_MICBIAS2_S_C_DET_ENA (0x1 << 2)
  233. #define RT5631_MICBIAS2_SHORT_CURR_DET_MASK (0x3)
  234. #define RT5631_MICBIAS2_SHORT_CURR_DET_600UA (0x0)
  235. #define RT5631_MICBIAS2_SHORT_CURR_DET_1500UA (0x1)
  236. #define RT5631_MICBIAS2_SHORT_CURR_DET_2000UA (0x2)
  237. /* Digital Microphone Control(0x24) */
  238. #define RT5631_DMIC_ENA_MASK (0x1 << 15)
  239. #define RT5631_DMIC_ENA_SHIFT 15
  240. /* DMIC_ENA: DMIC to ADC Digital filter */
  241. #define RT5631_DMIC_ENA (0x1 << 15)
  242. /* DMIC_DIS: ADC mixer to ADC Digital filter */
  243. #define RT5631_DMIC_DIS (0x0 << 15)
  244. #define RT5631_DMIC_L_CH_MUTE (0x1 << 13)
  245. #define RT5631_DMIC_L_CH_MUTE_SHIFT 13
  246. #define RT5631_DMIC_R_CH_MUTE (0x1 << 12)
  247. #define RT5631_DMIC_R_CH_MUTE_SHIFT 12
  248. #define RT5631_DMIC_L_CH_LATCH_MASK (0x1 << 9)
  249. #define RT5631_DMIC_L_CH_LATCH_RISING (0x1 << 9)
  250. #define RT5631_DMIC_L_CH_LATCH_FALLING (0x0 << 9)
  251. #define RT5631_DMIC_R_CH_LATCH_MASK (0x1 << 8)
  252. #define RT5631_DMIC_R_CH_LATCH_RISING (0x1 << 8)
  253. #define RT5631_DMIC_R_CH_LATCH_FALLING (0x0 << 8)
  254. #define RT5631_DMIC_CLK_CTRL_MASK (0x3 << 4)
  255. #define RT5631_DMIC_CLK_CTRL_TO_128FS (0x0 << 4)
  256. #define RT5631_DMIC_CLK_CTRL_TO_64FS (0x1 << 4)
  257. #define RT5631_DMIC_CLK_CTRL_TO_32FS (0x2 << 4)
  258. /* Microphone Input Volume(0x26) */
  259. #define RT5631_MONO_DIFF_INPUT_SHIFT 15
  260. /* Speaker Mixer Control(0x28) */
  261. #define RT5631_M_RECMIXER_L_TO_SPKMIXER_L (0x1 << 15)
  262. #define RT5631_M_RECMIXL_SPKMIXL_BIT 15
  263. #define RT5631_M_MIC1_P_TO_SPKMIXER_L (0x1 << 14)
  264. #define RT5631_M_MIC1P_SPKMIXL_BIT 14
  265. #define RT5631_M_DAC_L_TO_SPKMIXER_L (0x1 << 13)
  266. #define RT5631_M_DACL_SPKMIXL_BIT 13
  267. #define RT5631_M_OUTMIXER_L_TO_SPKMIXER_L (0x1 << 12)
  268. #define RT5631_M_OUTMIXL_SPKMIXL_BIT 12
  269. #define RT5631_M_RECMIXER_R_TO_SPKMIXER_R (0x1 << 7)
  270. #define RT5631_M_RECMIXR_SPKMIXR_BIT 7
  271. #define RT5631_M_MIC2_P_TO_SPKMIXER_R (0x1 << 6)
  272. #define RT5631_M_MIC2P_SPKMIXR_BIT 6
  273. #define RT5631_M_DAC_R_TO_SPKMIXER_R (0x1 << 5)
  274. #define RT5631_M_DACR_SPKMIXR_BIT 5
  275. #define RT5631_M_OUTMIXER_R_TO_SPKMIXER_R (0x1 << 4)
  276. #define RT5631_M_OUTMIXR_SPKMIXR_BIT 4
  277. /* Speaker/Mono Output Control(0x2A) */
  278. #define RT5631_M_SPKVOL_L_TO_SPOL_MIXER (0x1 << 15)
  279. #define RT5631_M_SPKVOLL_SPOLMIX_BIT 15
  280. #define RT5631_M_SPKVOL_R_TO_SPOL_MIXER (0x1 << 14)
  281. #define RT5631_M_SPKVOLR_SPOLMIX_BIT 14
  282. #define RT5631_M_SPKVOL_L_TO_SPOR_MIXER (0x1 << 13)
  283. #define RT5631_M_SPKVOLL_SPORMIX_BIT 13
  284. #define RT5631_M_SPKVOL_R_TO_SPOR_MIXER (0x1 << 12)
  285. #define RT5631_M_SPKVOLR_SPORMIX_BIT 12
  286. #define RT5631_M_OUTVOL_L_TO_MONOMIXER (0x1 << 11)
  287. #define RT5631_M_OUTVOLL_MONOMIX_BIT 11
  288. #define RT5631_M_OUTVOL_R_TO_MONOMIXER (0x1 << 10)
  289. #define RT5631_M_OUTVOLR_MONOMIX_BIT 10
  290. /* Speaker/Mono/HP Output Control(0x2C) */
  291. #define RT5631_SPK_L_MUX_SEL_MASK (0x3 << 14)
  292. #define RT5631_SPK_L_MUX_SEL_SPKMIXER_L (0x0 << 14)
  293. #define RT5631_SPK_L_MUX_SEL_MONO_IN (0x1 << 14)
  294. #define RT5631_SPK_L_MUX_SEL_DAC_L (0x3 << 14)
  295. #define RT5631_SPK_L_MUX_SEL_SHIFT 14
  296. #define RT5631_SPK_R_MUX_SEL_MASK (0x3 << 10)
  297. #define RT5631_SPK_R_MUX_SEL_SPKMIXER_R (0x0 << 10)
  298. #define RT5631_SPK_R_MUX_SEL_MONO_IN (0x1 << 10)
  299. #define RT5631_SPK_R_MUX_SEL_DAC_R (0x3 << 10)
  300. #define RT5631_SPK_R_MUX_SEL_SHIFT 10
  301. #define RT5631_MONO_MUX_SEL_MASK (0x3 << 6)
  302. #define RT5631_MONO_MUX_SEL_MONOMIXER (0x0 << 6)
  303. #define RT5631_MONO_MUX_SEL_MONO_IN (0x1 << 6)
  304. #define RT5631_MONO_MUX_SEL_SHIFT 6
  305. #define RT5631_HP_L_MUX_SEL_MASK (0x1 << 3)
  306. #define RT5631_HP_L_MUX_SEL_HPVOL_L (0x0 << 3)
  307. #define RT5631_HP_L_MUX_SEL_DAC_L (0x1 << 3)
  308. #define RT5631_HP_L_MUX_SEL_SHIFT 3
  309. #define RT5631_HP_R_MUX_SEL_MASK (0x1 << 2)
  310. #define RT5631_HP_R_MUX_SEL_HPVOL_R (0x0 << 2)
  311. #define RT5631_HP_R_MUX_SEL_DAC_R (0x1 << 2)
  312. #define RT5631_HP_R_MUX_SEL_SHIFT 2
  313. /* Stereo I2S Serial Data Port Control(0x34) */
  314. #define RT5631_SDP_MODE_SEL_MASK (0x1 << 15)
  315. #define RT5631_SDP_MODE_SEL_MASTER (0x0 << 15)
  316. #define RT5631_SDP_MODE_SEL_SLAVE (0x1 << 15)
  317. #define RT5631_SDP_ADC_CPS_SEL_MASK (0x3 << 10)
  318. #define RT5631_SDP_ADC_CPS_SEL_OFF (0x0 << 10)
  319. #define RT5631_SDP_ADC_CPS_SEL_U_LAW (0x1 << 10)
  320. #define RT5631_SDP_ADC_CPS_SEL_A_LAW (0x2 << 10)
  321. #define RT5631_SDP_DAC_CPS_SEL_MASK (0x3 << 8)
  322. #define RT5631_SDP_DAC_CPS_SEL_OFF (0x0 << 8)
  323. #define RT5631_SDP_DAC_CPS_SEL_U_LAW (0x1 << 8)
  324. #define RT5631_SDP_DAC_CPS_SEL_A_LAW (0x2 << 8)
  325. /* 0:Normal 1:Invert */
  326. #define RT5631_SDP_I2S_BCLK_POL_CTRL (0x1 << 7)
  327. /* 0:Normal 1:Invert */
  328. #define RT5631_SDP_DAC_R_INV (0x1 << 6)
  329. /* 0:ADC data appear at left phase of LRCK
  330. * 1:ADC data appear at right phase of LRCK
  331. */
  332. #define RT5631_SDP_ADC_DATA_L_R_SWAP (0x1 << 5)
  333. /* 0:DAC data appear at left phase of LRCK
  334. * 1:DAC data appear at right phase of LRCK
  335. */
  336. #define RT5631_SDP_DAC_DATA_L_R_SWAP (0x1 << 4)
  337. /* Data Length Slection */
  338. #define RT5631_SDP_I2S_DL_MASK (0x3 << 2)
  339. #define RT5631_SDP_I2S_DL_16 (0x0 << 2)
  340. #define RT5631_SDP_I2S_DL_20 (0x1 << 2)
  341. #define RT5631_SDP_I2S_DL_24 (0x2 << 2)
  342. #define RT5631_SDP_I2S_DL_8 (0x3 << 2)
  343. /* PCM Data Format Selection */
  344. #define RT5631_SDP_I2S_DF_MASK (0x3)
  345. #define RT5631_SDP_I2S_DF_I2S (0x0)
  346. #define RT5631_SDP_I2S_DF_LEFT (0x1)
  347. #define RT5631_SDP_I2S_DF_PCM_A (0x2)
  348. #define RT5631_SDP_I2S_DF_PCM_B (0x3)
  349. /* Stereo AD/DA Clock Control(0x38h) */
  350. #define RT5631_I2S_PRE_DIV_MASK (0x7 << 13)
  351. #define RT5631_I2S_PRE_DIV_1 (0x0 << 13)
  352. #define RT5631_I2S_PRE_DIV_2 (0x1 << 13)
  353. #define RT5631_I2S_PRE_DIV_4 (0x2 << 13)
  354. #define RT5631_I2S_PRE_DIV_8 (0x3 << 13)
  355. #define RT5631_I2S_PRE_DIV_16 (0x4 << 13)
  356. #define RT5631_I2S_PRE_DIV_32 (0x5 << 13)
  357. /* CLOCK RELATIVE OF BCLK AND LCRK */
  358. #define RT5631_I2S_LRCK_SEL_N_BCLK_MASK (0x1 << 12)
  359. #define RT5631_I2S_LRCK_SEL_64_BCLK (0x0 << 12) /* 64FS */
  360. #define RT5631_I2S_LRCK_SEL_32_BCLK (0x1 << 12) /* 32FS */
  361. #define RT5631_DAC_OSR_SEL_MASK (0x3 << 10)
  362. #define RT5631_DAC_OSR_SEL_128FS (0x3 << 10)
  363. #define RT5631_DAC_OSR_SEL_64FS (0x3 << 10)
  364. #define RT5631_DAC_OSR_SEL_32FS (0x3 << 10)
  365. #define RT5631_DAC_OSR_SEL_16FS (0x3 << 10)
  366. #define RT5631_ADC_OSR_SEL_MASK (0x3 << 8)
  367. #define RT5631_ADC_OSR_SEL_128FS (0x3 << 8)
  368. #define RT5631_ADC_OSR_SEL_64FS (0x3 << 8)
  369. #define RT5631_ADC_OSR_SEL_32FS (0x3 << 8)
  370. #define RT5631_ADC_OSR_SEL_16FS (0x3 << 8)
  371. #define RT5631_ADDA_FILTER_CLK_SEL_256FS (0 << 7) /* 256FS */
  372. #define RT5631_ADDA_FILTER_CLK_SEL_384FS (1 << 7) /* 384FS */
  373. /* Power managment addition 1 (0x3A) */
  374. #define RT5631_PWR_MAIN_I2S_EN (0x1 << 15)
  375. #define RT5631_PWR_MAIN_I2S_BIT 15
  376. #define RT5631_PWR_CLASS_D (0x1 << 12)
  377. #define RT5631_PWR_CLASS_D_BIT 12
  378. #define RT5631_PWR_ADC_L_CLK (0x1 << 11)
  379. #define RT5631_PWR_ADC_L_CLK_BIT 11
  380. #define RT5631_PWR_ADC_R_CLK (0x1 << 10)
  381. #define RT5631_PWR_ADC_R_CLK_BIT 10
  382. #define RT5631_PWR_DAC_L_CLK (0x1 << 9)
  383. #define RT5631_PWR_DAC_L_CLK_BIT 9
  384. #define RT5631_PWR_DAC_R_CLK (0x1 << 8)
  385. #define RT5631_PWR_DAC_R_CLK_BIT 8
  386. #define RT5631_PWR_DAC_REF (0x1 << 7)
  387. #define RT5631_PWR_DAC_REF_BIT 7
  388. #define RT5631_PWR_DAC_L_TO_MIXER (0x1 << 6)
  389. #define RT5631_PWR_DAC_L_TO_MIXER_BIT 6
  390. #define RT5631_PWR_DAC_R_TO_MIXER (0x1 << 5)
  391. #define RT5631_PWR_DAC_R_TO_MIXER_BIT 5
  392. /* Power managment addition 2 (0x3B) */
  393. #define RT5631_PWR_OUTMIXER_L (0x1 << 15)
  394. #define RT5631_PWR_OUTMIXER_L_BIT 15
  395. #define RT5631_PWR_OUTMIXER_R (0x1 << 14)
  396. #define RT5631_PWR_OUTMIXER_R_BIT 14
  397. #define RT5631_PWR_SPKMIXER_L (0x1 << 13)
  398. #define RT5631_PWR_SPKMIXER_L_BIT 13
  399. #define RT5631_PWR_SPKMIXER_R (0x1 << 12)
  400. #define RT5631_PWR_SPKMIXER_R_BIT 12
  401. #define RT5631_PWR_RECMIXER_L (0x1 << 11)
  402. #define RT5631_PWR_RECMIXER_L_BIT 11
  403. #define RT5631_PWR_RECMIXER_R (0x1 << 10)
  404. #define RT5631_PWR_RECMIXER_R_BIT 10
  405. #define RT5631_PWR_MIC1_BOOT_GAIN (0x1 << 5)
  406. #define RT5631_PWR_MIC1_BOOT_GAIN_BIT 5
  407. #define RT5631_PWR_MIC2_BOOT_GAIN (0x1 << 4)
  408. #define RT5631_PWR_MIC2_BOOT_GAIN_BIT 4
  409. #define RT5631_PWR_MICBIAS1_VOL (0x1 << 3)
  410. #define RT5631_PWR_MICBIAS1_VOL_BIT 3
  411. #define RT5631_PWR_MICBIAS2_VOL (0x1 << 2)
  412. #define RT5631_PWR_MICBIAS2_VOL_BIT 2
  413. #define RT5631_PWR_PLL1 (0x1 << 1)
  414. #define RT5631_PWR_PLL1_BIT 1
  415. #define RT5631_PWR_PLL2 (0x1 << 0)
  416. #define RT5631_PWR_PLL2_BIT 0
  417. /* Power managment addition 3(0x3C) */
  418. #define RT5631_PWR_VREF (0x1 << 15)
  419. #define RT5631_PWR_VREF_BIT 15
  420. #define RT5631_PWR_FAST_VREF_CTRL (0x1 << 14)
  421. #define RT5631_PWR_FAST_VREF_CTRL_BIT 14
  422. #define RT5631_PWR_MAIN_BIAS (0x1 << 13)
  423. #define RT5631_PWR_MAIN_BIAS_BIT 13
  424. #define RT5631_PWR_AXO1MIXER (0x1 << 11)
  425. #define RT5631_PWR_AXO1MIXER_BIT 11
  426. #define RT5631_PWR_AXO2MIXER (0x1 << 10)
  427. #define RT5631_PWR_AXO2MIXER_BIT 10
  428. #define RT5631_PWR_MONOMIXER (0x1 << 9)
  429. #define RT5631_PWR_MONOMIXER_BIT 9
  430. #define RT5631_PWR_MONO_DEPOP_DIS (0x1 << 8)
  431. #define RT5631_PWR_MONO_DEPOP_DIS_BIT 8
  432. #define RT5631_PWR_MONO_AMP_EN (0x1 << 7)
  433. #define RT5631_PWR_MONO_AMP_EN_BIT 7
  434. #define RT5631_PWR_CHARGE_PUMP (0x1 << 4)
  435. #define RT5631_PWR_CHARGE_PUMP_BIT 4
  436. #define RT5631_PWR_HP_L_AMP (0x1 << 3)
  437. #define RT5631_PWR_HP_L_AMP_BIT 3
  438. #define RT5631_PWR_HP_R_AMP (0x1 << 2)
  439. #define RT5631_PWR_HP_R_AMP_BIT 2
  440. #define RT5631_PWR_HP_DEPOP_DIS (0x1 << 1)
  441. #define RT5631_PWR_HP_DEPOP_DIS_BIT 1
  442. #define RT5631_PWR_HP_AMP_DRIVING (0x1 << 0)
  443. #define RT5631_PWR_HP_AMP_DRIVING_BIT 0
  444. /* Power managment addition 4(0x3E) */
  445. #define RT5631_PWR_SPK_L_VOL (0x1 << 15)
  446. #define RT5631_PWR_SPK_L_VOL_BIT 15
  447. #define RT5631_PWR_SPK_R_VOL (0x1 << 14)
  448. #define RT5631_PWR_SPK_R_VOL_BIT 14
  449. #define RT5631_PWR_LOUT_VOL (0x1 << 13)
  450. #define RT5631_PWR_LOUT_VOL_BIT 13
  451. #define RT5631_PWR_ROUT_VOL (0x1 << 12)
  452. #define RT5631_PWR_ROUT_VOL_BIT 12
  453. #define RT5631_PWR_HP_L_OUT_VOL (0x1 << 11)
  454. #define RT5631_PWR_HP_L_OUT_VOL_BIT 11
  455. #define RT5631_PWR_HP_R_OUT_VOL (0x1 << 10)
  456. #define RT5631_PWR_HP_R_OUT_VOL_BIT 10
  457. #define RT5631_PWR_AXIL_IN_VOL (0x1 << 9)
  458. #define RT5631_PWR_AXIL_IN_VOL_BIT 9
  459. #define RT5631_PWR_AXIR_IN_VOL (0x1 << 8)
  460. #define RT5631_PWR_AXIR_IN_VOL_BIT 8
  461. #define RT5631_PWR_MONO_IN_P_VOL (0x1 << 7)
  462. #define RT5631_PWR_MONO_IN_P_VOL_BIT 7
  463. #define RT5631_PWR_MONO_IN_N_VOL (0x1 << 6)
  464. #define RT5631_PWR_MONO_IN_N_VOL_BIT 6
  465. /* General Purpose Control Register(0x40) */
  466. #define RT5631_SPK_AMP_AUTO_RATIO_EN (0x1 << 15)
  467. #define RT5631_SPK_AMP_RATIO_CTRL_MASK (0x7 << 12)
  468. #define RT5631_SPK_AMP_RATIO_CTRL_2_34 (0x0 << 12) /* 7.40DB */
  469. #define RT5631_SPK_AMP_RATIO_CTRL_1_99 (0x1 << 12) /* 5.99DB */
  470. #define RT5631_SPK_AMP_RATIO_CTRL_1_68 (0x2 << 12) /* 4.50DB */
  471. #define RT5631_SPK_AMP_RATIO_CTRL_1_56 (0x3 << 12) /* 3.86DB */
  472. #define RT5631_SPK_AMP_RATIO_CTRL_1_44 (0x4 << 12) /* 3.16DB */
  473. #define RT5631_SPK_AMP_RATIO_CTRL_1_27 (0x5 << 12) /* 2.10DB */
  474. #define RT5631_SPK_AMP_RATIO_CTRL_1_09 (0x6 << 12) /* 0.80DB */
  475. #define RT5631_SPK_AMP_RATIO_CTRL_1_00 (0x7 << 12) /* 0.00DB */
  476. #define RT5631_SPK_AMP_RATIO_CTRL_SHIFT 12
  477. #define RT5631_STEREO_DAC_HI_PASS_FILT_EN (0x1 << 11)
  478. #define RT5631_STEREO_ADC_HI_PASS_FILT_EN (0x1 << 10)
  479. /* Select ADC Wind Filter Clock type */
  480. #define RT5631_ADC_WIND_FILT_MASK (0x3 << 4)
  481. #define RT5631_ADC_WIND_FILT_8_16_32K (0x0 << 4) /*8/16/32k*/
  482. #define RT5631_ADC_WIND_FILT_11_22_44K (0x1 << 4) /*11/22/44k*/
  483. #define RT5631_ADC_WIND_FILT_12_24_48K (0x2 << 4) /*12/24/48k*/
  484. #define RT5631_ADC_WIND_FILT_EN (0x1 << 3)
  485. /* SelectADC Wind Filter Corner Frequency */
  486. #define RT5631_ADC_WIND_CNR_FREQ_MASK (0x7 << 0)
  487. #define RT5631_ADC_WIND_CNR_FREQ_82_113_122 (0x0 << 0) /* 82/113/122 Hz */
  488. #define RT5631_ADC_WIND_CNR_FREQ_102_141_153 (0x1 << 0) /* 102/141/153 Hz */
  489. #define RT5631_ADC_WIND_CNR_FREQ_131_180_156 (0x2 << 0) /* 131/180/156 Hz */
  490. #define RT5631_ADC_WIND_CNR_FREQ_163_225_245 (0x3 << 0) /* 163/225/245 Hz */
  491. #define RT5631_ADC_WIND_CNR_FREQ_204_281_306 (0x4 << 0) /* 204/281/306 Hz */
  492. #define RT5631_ADC_WIND_CNR_FREQ_261_360_392 (0x5 << 0) /* 261/360/392 Hz */
  493. #define RT5631_ADC_WIND_CNR_FREQ_327_450_490 (0x6 << 0) /* 327/450/490 Hz */
  494. #define RT5631_ADC_WIND_CNR_FREQ_408_563_612 (0x7 << 0) /* 408/563/612 Hz */
  495. /* Global Clock Control Register(0x42) */
  496. #define RT5631_SYSCLK_SOUR_SEL_MASK (0x3 << 14)
  497. #define RT5631_SYSCLK_SOUR_SEL_MCLK (0x0 << 14)
  498. #define RT5631_SYSCLK_SOUR_SEL_PLL (0x1 << 14)
  499. #define RT5631_SYSCLK_SOUR_SEL_PLL_TCK (0x2 << 14)
  500. #define RT5631_PLLCLK_SOUR_SEL_MASK (0x3 << 12)
  501. #define RT5631_PLLCLK_SOUR_SEL_MCLK (0x0 << 12)
  502. #define RT5631_PLLCLK_SOUR_SEL_BCLK (0x1 << 12)
  503. #define RT5631_PLLCLK_SOUR_SEL_VBCLK (0x2 << 12)
  504. #define RT5631_PLLCLK_PRE_DIV1 (0x0 << 11)
  505. #define RT5631_PLLCLK_PRE_DIV2 (0x1 << 11)
  506. /* PLL Control(0x44) */
  507. #define RT5631_PLL_CTRL_M_VAL(m) ((m)&0xf)
  508. #define RT5631_PLL_CTRL_K_VAL(k) (((k)&0x7) << 4)
  509. #define RT5631_PLL_CTRL_N_VAL(n) (((n)&0xff) << 8)
  510. /* Internal Status and IRQ Control2(0x4A) */
  511. #define RT5631_ADC_DATA_SEL_MASK (0x3 << 14)
  512. #define RT5631_ADC_DATA_SEL_Disable (0x0 << 14)
  513. #define RT5631_ADC_DATA_SEL_MIC1 (0x1 << 14)
  514. #define RT5631_ADC_DATA_SEL_MIC1_SHIFT 14
  515. #define RT5631_ADC_DATA_SEL_MIC2 (0x2 << 14)
  516. #define RT5631_ADC_DATA_SEL_MIC2_SHIFT 15
  517. #define RT5631_ADC_DATA_SEL_STO (0x3 << 14)
  518. #define RT5631_ADC_DATA_SEL_SHIFT 14
  519. /* GPIO Pin Configuration(0x4C) */
  520. #define RT5631_GPIO_PIN_FUN_SEL_MASK (0x1 << 15)
  521. #define RT5631_GPIO_PIN_FUN_SEL_IRQ (0x1 << 15)
  522. #define RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC (0x0 << 15)
  523. #define RT5631_GPIO_DMIC_FUN_SEL_MASK (0x1 << 3)
  524. #define RT5631_GPIO_DMIC_FUN_SEL_DIMC (0x1 << 3)
  525. #define RT5631_GPIO_DMIC_FUN_SEL_GPIO (0x0 << 3)
  526. #define RT5631_GPIO_PIN_CON_MASK (0x1 << 2)
  527. #define RT5631_GPIO_PIN_SET_INPUT (0x0 << 2)
  528. #define RT5631_GPIO_PIN_SET_OUTPUT (0x1 << 2)
  529. /* De-POP function Control 1(0x54) */
  530. #define RT5631_POW_ON_SOFT_GEN (0x1 << 15)
  531. #define RT5631_EN_MUTE_UNMUTE_DEPOP (0x1 << 14)
  532. #define RT5631_EN_DEPOP2_FOR_HP (0x1 << 7)
  533. /* Power Down HPAMP_L Starts Up Signal */
  534. #define RT5631_PD_HPAMP_L_ST_UP (0x1 << 5)
  535. /* Power Down HPAMP_R Starts Up Signal */
  536. #define RT5631_PD_HPAMP_R_ST_UP (0x1 << 4)
  537. /* Enable left HP mute/unmute depop */
  538. #define RT5631_EN_HP_L_M_UN_MUTE_DEPOP (0x1 << 1)
  539. /* Enable right HP mute/unmute depop */
  540. #define RT5631_EN_HP_R_M_UN_MUTE_DEPOP (0x1 << 0)
  541. /* De-POP Fnction Control(0x56) */
  542. #define RT5631_EN_ONE_BIT_DEPOP (0x1 << 15)
  543. #define RT5631_EN_CAP_FREE_DEPOP (0x1 << 14)
  544. /* Jack Detect Control Register(0x5A) */
  545. #define RT5631_JD_USE_MASK (0x3 << 14)
  546. #define RT5631_JD_USE_JD2 (0x3 << 14)
  547. #define RT5631_JD_USE_JD1 (0x2 << 14)
  548. #define RT5631_JD_USE_GPIO (0x1 << 14)
  549. #define RT5631_JD_OFF (0x0 << 14)
  550. /* JD trigger enable for HP */
  551. #define RT5631_JD_HP_EN (0x1 << 11)
  552. #define RT5631_JD_HP_TRI_MASK (0x1 << 10)
  553. #define RT5631_JD_HP_TRI_HI (0x1 << 10)
  554. #define RT5631_JD_HP_TRI_LO (0x1 << 10)
  555. /* JD trigger enable for speaker LP/LN */
  556. #define RT5631_JD_SPK_L_EN (0x1 << 9)
  557. #define RT5631_JD_SPK_L_TRI_MASK (0x1 << 8)
  558. #define RT5631_JD_SPK_L_TRI_HI (0x1 << 8)
  559. #define RT5631_JD_SPK_L_TRI_LO (0x0 << 8)
  560. /* JD trigger enable for speaker RP/RN */
  561. #define RT5631_JD_SPK_R_EN (0x1 << 7)
  562. #define RT5631_JD_SPK_R_TRI_MASK (0x1 << 6)
  563. #define RT5631_JD_SPK_R_TRI_HI (0x1 << 6)
  564. #define RT5631_JD_SPK_R_TRI_LO (0x0 << 6)
  565. /* JD trigger enable for monoout */
  566. #define RT5631_JD_MONO_EN (0x1 << 5)
  567. #define RT5631_JD_MONO_TRI_MASK (0x1 << 4)
  568. #define RT5631_JD_MONO_TRI_HI (0x1 << 4)
  569. #define RT5631_JD_MONO_TRI_LO (0x0 << 4)
  570. /* JD trigger enable for Lout */
  571. #define RT5631_JD_AUX_1_EN (0x1 << 3)
  572. #define RT5631_JD_AUX_1_MASK (0x1 << 2)
  573. #define RT5631_JD_AUX_1_TRI_HI (0x1 << 2)
  574. #define RT5631_JD_AUX_1_TRI_LO (0x0 << 2)
  575. /* JD trigger enable for Rout */
  576. #define RT5631_JD_AUX_2_EN (0x1 << 1)
  577. #define RT5631_JD_AUX_2_MASK (0x1 << 0)
  578. #define RT5631_JD_AUX_2_TRI_HI (0x1 << 0)
  579. #define RT5631_JD_AUX_2_TRI_LO (0x0 << 0)
  580. /* ALC CONTROL 1(0x64) */
  581. #define RT5631_ALC_ATTACK_RATE_MASK (0x1F << 8)
  582. #define RT5631_ALC_RECOVERY_RATE_MASK (0x1F << 0)
  583. /* ALC CONTROL 2(0x65) */
  584. /* select Compensation gain for Noise gate function */
  585. #define RT5631_ALC_COM_NOISE_GATE_MASK (0xF << 0)
  586. /* ALC CONTROL 3(0x66) */
  587. #define RT5631_ALC_FUN_MASK (0x3 << 14)
  588. #define RT5631_ALC_FUN_DIS (0x0 << 14)
  589. #define RT5631_ALC_ENA_DAC_PATH (0x1 << 14)
  590. #define RT5631_ALC_ENA_ADC_PATH (0x3 << 14)
  591. #define RT5631_ALC_PARA_UPDATE (0x1 << 13)
  592. #define RT5631_ALC_LIMIT_LEVEL_MASK (0x1F << 8)
  593. #define RT5631_ALC_NOISE_GATE_FUN_MASK (0x1 << 7)
  594. #define RT5631_ALC_NOISE_GATE_FUN_DIS (0x0 << 7)
  595. #define RT5631_ALC_NOISE_GATE_FUN_ENA (0x1 << 7)
  596. /* ALC noise gate hold data function */
  597. #define RT5631_ALC_NOISE_GATE_H_D_MASK (0x1 << 6)
  598. #define RT5631_ALC_NOISE_GATE_H_D_DIS (0x0 << 6)
  599. #define RT5631_ALC_NOISE_GATE_H_D_ENA (0x1 << 6)
  600. /* Psedueo Stereo & Spatial Effect Block Control(0x68) */
  601. #define RT5631_SPATIAL_CTRL_EN (0x1 << 15)
  602. #define RT5631_ALL_PASS_FILTER_EN (0x1 << 14)
  603. #define RT5631_PSEUDO_STEREO_EN (0x1 << 13)
  604. #define RT5631_STEREO_EXPENSION_EN (0x1 << 12)
  605. /* 3D gain parameter */
  606. #define RT5631_GAIN_3D_PARA_MASK (0x3 << 6)
  607. #define RT5631_GAIN_3D_PARA_1_00 (0x0 << 6) /* 3D gain 1.0 */
  608. #define RT5631_GAIN_3D_PARA_1_50 (0x1 << 6) /* 3D gain 1.5 */
  609. #define RT5631_GAIN_3D_PARA_2_00 (0x2 << 6) /* 3D gain 2.0 */
  610. /* 3D ratio parameter */
  611. #define RT5631_RATIO_3D_MASK (0x3 << 4)
  612. #define RT5631_RATIO_3D_0_0 (0x0 << 4) /* 3D ratio 0.0 */
  613. #define RT5631_RATIO_3D_0_66 (0x1 << 4) /* 3D ratio 0.66 */
  614. #define RT5631_RATIO_3D_1_0 (0x2 << 4) /* 3D ratio 1.0 */
  615. /* select samplerate for all pass filter */
  616. #define RT5631_APF_FUN_SLE_MASK (0x3 << 0)
  617. #define RT5631_APF_FUN_SEL_48K (0x3 << 0)
  618. #define RT5631_APF_FUN_SEL_44_1K (0x2 << 0)
  619. #define RT5631_APF_FUN_SEL_32K (0x1 << 0)
  620. #define RT5631_APF_FUN_DIS (0x0 << 0)
  621. /* EQ CONTROL 1(0x6E) */
  622. #define RT5631_HW_EQ_PATH_SEL_MASK (0x1 << 15)
  623. #define RT5631_HW_EQ_PATH_SEL_DAC (0x0 << 15)
  624. #define RT5631_HW_EQ_PATH_SEL_ADC (0x1 << 15)
  625. #define RT5631_HW_EQ_UPDATE_CTRL (0x1 << 14)
  626. #define RT5631_EN_HW_EQ_HPF2 (0x1 << 5)
  627. #define RT5631_EN_HW_EQ_HPF1 (0x1 << 4)
  628. #define RT5631_EN_HW_EQ_BP3 (0x1 << 3)
  629. #define RT5631_EN_HW_EQ_BP2 (0x1 << 2)
  630. #define RT5631_EN_HW_EQ_BP1 (0x1 << 1)
  631. #define RT5631_EN_HW_EQ_LPF (0x1 << 0)
  632. #endif /* __RTCODEC5631_H__ */