rt5616.c 41 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * rt5616.c -- RT5616 ALSA SoC audio codec driver
  4. *
  5. * Copyright 2015 Realtek Semiconductor Corp.
  6. * Author: Bard Liao <bardliao@realtek.com>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/moduleparam.h>
  10. #include <linux/init.h>
  11. #include <linux/clk.h>
  12. #include <linux/delay.h>
  13. #include <linux/pm.h>
  14. #include <linux/i2c.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/spi/spi.h>
  17. #include <sound/core.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/soc.h>
  21. #include <sound/soc-dapm.h>
  22. #include <sound/initval.h>
  23. #include <sound/tlv.h>
  24. #include "rl6231.h"
  25. #include "rt5616.h"
  26. #define RT5616_PR_RANGE_BASE (0xff + 1)
  27. #define RT5616_PR_SPACING 0x100
  28. #define RT5616_PR_BASE (RT5616_PR_RANGE_BASE + (0 * RT5616_PR_SPACING))
  29. static const struct regmap_range_cfg rt5616_ranges[] = {
  30. {
  31. .name = "PR",
  32. .range_min = RT5616_PR_BASE,
  33. .range_max = RT5616_PR_BASE + 0xf8,
  34. .selector_reg = RT5616_PRIV_INDEX,
  35. .selector_mask = 0xff,
  36. .selector_shift = 0x0,
  37. .window_start = RT5616_PRIV_DATA,
  38. .window_len = 0x1,
  39. },
  40. };
  41. static const struct reg_sequence init_list[] = {
  42. {RT5616_PR_BASE + 0x3d, 0x3e00},
  43. {RT5616_PR_BASE + 0x25, 0x6110},
  44. {RT5616_PR_BASE + 0x20, 0x611f},
  45. {RT5616_PR_BASE + 0x21, 0x4040},
  46. {RT5616_PR_BASE + 0x23, 0x0004},
  47. };
  48. #define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list)
  49. static const struct reg_default rt5616_reg[] = {
  50. { 0x00, 0x0021 },
  51. { 0x02, 0xc8c8 },
  52. { 0x03, 0xc8c8 },
  53. { 0x05, 0x0000 },
  54. { 0x0d, 0x0000 },
  55. { 0x0f, 0x0808 },
  56. { 0x19, 0xafaf },
  57. { 0x1c, 0x2f2f },
  58. { 0x1e, 0x0000 },
  59. { 0x27, 0x7860 },
  60. { 0x29, 0x8080 },
  61. { 0x2a, 0x5252 },
  62. { 0x3b, 0x0000 },
  63. { 0x3c, 0x006f },
  64. { 0x3d, 0x0000 },
  65. { 0x3e, 0x006f },
  66. { 0x45, 0x6000 },
  67. { 0x4d, 0x0000 },
  68. { 0x4e, 0x0000 },
  69. { 0x4f, 0x0279 },
  70. { 0x50, 0x0000 },
  71. { 0x51, 0x0000 },
  72. { 0x52, 0x0279 },
  73. { 0x53, 0xf000 },
  74. { 0x61, 0x0000 },
  75. { 0x62, 0x0000 },
  76. { 0x63, 0x00c0 },
  77. { 0x64, 0x0000 },
  78. { 0x65, 0x0000 },
  79. { 0x66, 0x0000 },
  80. { 0x70, 0x8000 },
  81. { 0x73, 0x1104 },
  82. { 0x74, 0x0c00 },
  83. { 0x80, 0x0000 },
  84. { 0x81, 0x0000 },
  85. { 0x82, 0x0000 },
  86. { 0x8b, 0x0600 },
  87. { 0x8e, 0x0004 },
  88. { 0x8f, 0x1100 },
  89. { 0x90, 0x0000 },
  90. { 0x91, 0x0c00 },
  91. { 0x92, 0x0000 },
  92. { 0x93, 0x2000 },
  93. { 0x94, 0x0200 },
  94. { 0x95, 0x0000 },
  95. { 0xb0, 0x2080 },
  96. { 0xb1, 0x0000 },
  97. { 0xb2, 0x0000 },
  98. { 0xb4, 0x2206 },
  99. { 0xb5, 0x1f00 },
  100. { 0xb6, 0x0000 },
  101. { 0xb7, 0x0000 },
  102. { 0xbb, 0x0000 },
  103. { 0xbc, 0x0000 },
  104. { 0xbd, 0x0000 },
  105. { 0xbe, 0x0000 },
  106. { 0xbf, 0x0000 },
  107. { 0xc0, 0x0100 },
  108. { 0xc1, 0x0000 },
  109. { 0xc2, 0x0000 },
  110. { 0xc8, 0x0000 },
  111. { 0xc9, 0x0000 },
  112. { 0xca, 0x0000 },
  113. { 0xcb, 0x0000 },
  114. { 0xcc, 0x0000 },
  115. { 0xcd, 0x0000 },
  116. { 0xce, 0x0000 },
  117. { 0xcf, 0x0013 },
  118. { 0xd0, 0x0680 },
  119. { 0xd1, 0x1c17 },
  120. { 0xd3, 0xb320 },
  121. { 0xd4, 0x0000 },
  122. { 0xd6, 0x0000 },
  123. { 0xd7, 0x0000 },
  124. { 0xd9, 0x0809 },
  125. { 0xda, 0x0000 },
  126. { 0xfa, 0x0010 },
  127. { 0xfb, 0x0000 },
  128. { 0xfc, 0x0000 },
  129. { 0xfe, 0x10ec },
  130. { 0xff, 0x6281 },
  131. };
  132. struct rt5616_priv {
  133. struct snd_soc_component *component;
  134. struct delayed_work patch_work;
  135. struct regmap *regmap;
  136. struct clk *mclk;
  137. int sysclk;
  138. int sysclk_src;
  139. int lrck[RT5616_AIFS];
  140. int bclk[RT5616_AIFS];
  141. int master[RT5616_AIFS];
  142. int pll_src;
  143. int pll_in;
  144. int pll_out;
  145. };
  146. static bool rt5616_volatile_register(struct device *dev, unsigned int reg)
  147. {
  148. int i;
  149. for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
  150. if (reg >= rt5616_ranges[i].range_min &&
  151. reg <= rt5616_ranges[i].range_max)
  152. return true;
  153. }
  154. switch (reg) {
  155. case RT5616_RESET:
  156. case RT5616_PRIV_DATA:
  157. case RT5616_EQ_CTRL1:
  158. case RT5616_DRC_AGC_1:
  159. case RT5616_IRQ_CTRL2:
  160. case RT5616_INT_IRQ_ST:
  161. case RT5616_PGM_REG_ARR1:
  162. case RT5616_PGM_REG_ARR3:
  163. case RT5616_VENDOR_ID:
  164. case RT5616_DEVICE_ID:
  165. return true;
  166. default:
  167. return false;
  168. }
  169. }
  170. static bool rt5616_readable_register(struct device *dev, unsigned int reg)
  171. {
  172. int i;
  173. for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
  174. if (reg >= rt5616_ranges[i].range_min &&
  175. reg <= rt5616_ranges[i].range_max)
  176. return true;
  177. }
  178. switch (reg) {
  179. case RT5616_RESET:
  180. case RT5616_VERSION_ID:
  181. case RT5616_VENDOR_ID:
  182. case RT5616_DEVICE_ID:
  183. case RT5616_HP_VOL:
  184. case RT5616_LOUT_CTRL1:
  185. case RT5616_LOUT_CTRL2:
  186. case RT5616_IN1_IN2:
  187. case RT5616_INL1_INR1_VOL:
  188. case RT5616_DAC1_DIG_VOL:
  189. case RT5616_ADC_DIG_VOL:
  190. case RT5616_ADC_BST_VOL:
  191. case RT5616_STO1_ADC_MIXER:
  192. case RT5616_AD_DA_MIXER:
  193. case RT5616_STO_DAC_MIXER:
  194. case RT5616_REC_L1_MIXER:
  195. case RT5616_REC_L2_MIXER:
  196. case RT5616_REC_R1_MIXER:
  197. case RT5616_REC_R2_MIXER:
  198. case RT5616_HPO_MIXER:
  199. case RT5616_OUT_L1_MIXER:
  200. case RT5616_OUT_L2_MIXER:
  201. case RT5616_OUT_L3_MIXER:
  202. case RT5616_OUT_R1_MIXER:
  203. case RT5616_OUT_R2_MIXER:
  204. case RT5616_OUT_R3_MIXER:
  205. case RT5616_LOUT_MIXER:
  206. case RT5616_PWR_DIG1:
  207. case RT5616_PWR_DIG2:
  208. case RT5616_PWR_ANLG1:
  209. case RT5616_PWR_ANLG2:
  210. case RT5616_PWR_MIXER:
  211. case RT5616_PWR_VOL:
  212. case RT5616_PRIV_INDEX:
  213. case RT5616_PRIV_DATA:
  214. case RT5616_I2S1_SDP:
  215. case RT5616_ADDA_CLK1:
  216. case RT5616_ADDA_CLK2:
  217. case RT5616_GLB_CLK:
  218. case RT5616_PLL_CTRL1:
  219. case RT5616_PLL_CTRL2:
  220. case RT5616_HP_OVCD:
  221. case RT5616_DEPOP_M1:
  222. case RT5616_DEPOP_M2:
  223. case RT5616_DEPOP_M3:
  224. case RT5616_CHARGE_PUMP:
  225. case RT5616_PV_DET_SPK_G:
  226. case RT5616_MICBIAS:
  227. case RT5616_A_JD_CTL1:
  228. case RT5616_A_JD_CTL2:
  229. case RT5616_EQ_CTRL1:
  230. case RT5616_EQ_CTRL2:
  231. case RT5616_WIND_FILTER:
  232. case RT5616_DRC_AGC_1:
  233. case RT5616_DRC_AGC_2:
  234. case RT5616_DRC_AGC_3:
  235. case RT5616_SVOL_ZC:
  236. case RT5616_JD_CTRL1:
  237. case RT5616_JD_CTRL2:
  238. case RT5616_IRQ_CTRL1:
  239. case RT5616_IRQ_CTRL2:
  240. case RT5616_INT_IRQ_ST:
  241. case RT5616_GPIO_CTRL1:
  242. case RT5616_GPIO_CTRL2:
  243. case RT5616_GPIO_CTRL3:
  244. case RT5616_PGM_REG_ARR1:
  245. case RT5616_PGM_REG_ARR2:
  246. case RT5616_PGM_REG_ARR3:
  247. case RT5616_PGM_REG_ARR4:
  248. case RT5616_PGM_REG_ARR5:
  249. case RT5616_SCB_FUNC:
  250. case RT5616_SCB_CTRL:
  251. case RT5616_BASE_BACK:
  252. case RT5616_MP3_PLUS1:
  253. case RT5616_MP3_PLUS2:
  254. case RT5616_ADJ_HPF_CTRL1:
  255. case RT5616_ADJ_HPF_CTRL2:
  256. case RT5616_HP_CALIB_AMP_DET:
  257. case RT5616_HP_CALIB2:
  258. case RT5616_SV_ZCD1:
  259. case RT5616_SV_ZCD2:
  260. case RT5616_D_MISC:
  261. case RT5616_DUMMY2:
  262. case RT5616_DUMMY3:
  263. return true;
  264. default:
  265. return false;
  266. }
  267. }
  268. static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
  269. static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
  270. static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
  271. static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
  272. static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
  273. /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
  274. static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(bst_tlv,
  275. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  276. 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
  277. 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
  278. 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
  279. 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
  280. 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
  281. 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
  282. );
  283. static const struct snd_kcontrol_new rt5616_snd_controls[] = {
  284. /* Headphone Output Volume */
  285. SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL,
  286. RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
  287. SOC_DOUBLE("HPVOL Playback Switch", RT5616_HP_VOL,
  288. RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
  289. SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL,
  290. RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
  291. /* OUTPUT Control */
  292. SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1,
  293. RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
  294. SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1,
  295. RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
  296. SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1,
  297. RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
  298. /* DAC Digital Volume */
  299. SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL,
  300. RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
  301. 175, 0, dac_vol_tlv),
  302. /* IN1/IN2 Control */
  303. SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2,
  304. RT5616_BST_SFT1, 8, 0, bst_tlv),
  305. SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2,
  306. RT5616_BST_SFT2, 8, 0, bst_tlv),
  307. /* INL/INR Volume Control */
  308. SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL,
  309. RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT,
  310. 31, 1, in_vol_tlv),
  311. /* ADC Digital Volume Control */
  312. SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL,
  313. RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
  314. SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL,
  315. RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
  316. 127, 0, adc_vol_tlv),
  317. /* ADC Boost Volume Control */
  318. SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL,
  319. RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT,
  320. 3, 0, adc_bst_tlv),
  321. };
  322. static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
  323. struct snd_soc_dapm_widget *sink)
  324. {
  325. unsigned int val;
  326. val = snd_soc_component_read(snd_soc_dapm_to_component(source->dapm), RT5616_GLB_CLK);
  327. val &= RT5616_SCLK_SRC_MASK;
  328. if (val == RT5616_SCLK_SRC_PLL1)
  329. return 1;
  330. else
  331. return 0;
  332. }
  333. /* Digital Mixer */
  334. static const struct snd_kcontrol_new rt5616_sto1_adc_l_mix[] = {
  335. SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
  336. RT5616_M_STO1_ADC_L1_SFT, 1, 1),
  337. };
  338. static const struct snd_kcontrol_new rt5616_sto1_adc_r_mix[] = {
  339. SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
  340. RT5616_M_STO1_ADC_R1_SFT, 1, 1),
  341. };
  342. static const struct snd_kcontrol_new rt5616_dac_l_mix[] = {
  343. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
  344. RT5616_M_ADCMIX_L_SFT, 1, 1),
  345. SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
  346. RT5616_M_IF1_DAC_L_SFT, 1, 1),
  347. };
  348. static const struct snd_kcontrol_new rt5616_dac_r_mix[] = {
  349. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
  350. RT5616_M_ADCMIX_R_SFT, 1, 1),
  351. SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
  352. RT5616_M_IF1_DAC_R_SFT, 1, 1),
  353. };
  354. static const struct snd_kcontrol_new rt5616_sto_dac_l_mix[] = {
  355. SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
  356. RT5616_M_DAC_L1_MIXL_SFT, 1, 1),
  357. SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
  358. RT5616_M_DAC_R1_MIXL_SFT, 1, 1),
  359. };
  360. static const struct snd_kcontrol_new rt5616_sto_dac_r_mix[] = {
  361. SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
  362. RT5616_M_DAC_R1_MIXR_SFT, 1, 1),
  363. SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
  364. RT5616_M_DAC_L1_MIXR_SFT, 1, 1),
  365. };
  366. /* Analog Input Mixer */
  367. static const struct snd_kcontrol_new rt5616_rec_l_mix[] = {
  368. SOC_DAPM_SINGLE("INL1 Switch", RT5616_REC_L2_MIXER,
  369. RT5616_M_IN1_L_RM_L_SFT, 1, 1),
  370. SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_L2_MIXER,
  371. RT5616_M_BST2_RM_L_SFT, 1, 1),
  372. SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_L2_MIXER,
  373. RT5616_M_BST1_RM_L_SFT, 1, 1),
  374. };
  375. static const struct snd_kcontrol_new rt5616_rec_r_mix[] = {
  376. SOC_DAPM_SINGLE("INR1 Switch", RT5616_REC_R2_MIXER,
  377. RT5616_M_IN1_R_RM_R_SFT, 1, 1),
  378. SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_R2_MIXER,
  379. RT5616_M_BST2_RM_R_SFT, 1, 1),
  380. SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_R2_MIXER,
  381. RT5616_M_BST1_RM_R_SFT, 1, 1),
  382. };
  383. /* Analog Output Mixer */
  384. static const struct snd_kcontrol_new rt5616_out_l_mix[] = {
  385. SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_L3_MIXER,
  386. RT5616_M_BST1_OM_L_SFT, 1, 1),
  387. SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_L3_MIXER,
  388. RT5616_M_BST2_OM_L_SFT, 1, 1),
  389. SOC_DAPM_SINGLE("INL1 Switch", RT5616_OUT_L3_MIXER,
  390. RT5616_M_IN1_L_OM_L_SFT, 1, 1),
  391. SOC_DAPM_SINGLE("REC MIXL Switch", RT5616_OUT_L3_MIXER,
  392. RT5616_M_RM_L_OM_L_SFT, 1, 1),
  393. SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_OUT_L3_MIXER,
  394. RT5616_M_DAC_L1_OM_L_SFT, 1, 1),
  395. };
  396. static const struct snd_kcontrol_new rt5616_out_r_mix[] = {
  397. SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_R3_MIXER,
  398. RT5616_M_BST2_OM_R_SFT, 1, 1),
  399. SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_R3_MIXER,
  400. RT5616_M_BST1_OM_R_SFT, 1, 1),
  401. SOC_DAPM_SINGLE("INR1 Switch", RT5616_OUT_R3_MIXER,
  402. RT5616_M_IN1_R_OM_R_SFT, 1, 1),
  403. SOC_DAPM_SINGLE("REC MIXR Switch", RT5616_OUT_R3_MIXER,
  404. RT5616_M_RM_R_OM_R_SFT, 1, 1),
  405. SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_OUT_R3_MIXER,
  406. RT5616_M_DAC_R1_OM_R_SFT, 1, 1),
  407. };
  408. static const struct snd_kcontrol_new rt5616_hpo_mix[] = {
  409. SOC_DAPM_SINGLE("DAC1 Switch", RT5616_HPO_MIXER,
  410. RT5616_M_DAC1_HM_SFT, 1, 1),
  411. SOC_DAPM_SINGLE("HPVOL Switch", RT5616_HPO_MIXER,
  412. RT5616_M_HPVOL_HM_SFT, 1, 1),
  413. };
  414. static const struct snd_kcontrol_new rt5616_lout_mix[] = {
  415. SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_LOUT_MIXER,
  416. RT5616_M_DAC_L1_LM_SFT, 1, 1),
  417. SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_LOUT_MIXER,
  418. RT5616_M_DAC_R1_LM_SFT, 1, 1),
  419. SOC_DAPM_SINGLE("OUTVOL L Switch", RT5616_LOUT_MIXER,
  420. RT5616_M_OV_L_LM_SFT, 1, 1),
  421. SOC_DAPM_SINGLE("OUTVOL R Switch", RT5616_LOUT_MIXER,
  422. RT5616_M_OV_R_LM_SFT, 1, 1),
  423. };
  424. static int rt5616_adc_event(struct snd_soc_dapm_widget *w,
  425. struct snd_kcontrol *kcontrol, int event)
  426. {
  427. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  428. switch (event) {
  429. case SND_SOC_DAPM_POST_PMU:
  430. snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL,
  431. RT5616_L_MUTE | RT5616_R_MUTE, 0);
  432. break;
  433. case SND_SOC_DAPM_POST_PMD:
  434. snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL,
  435. RT5616_L_MUTE | RT5616_R_MUTE,
  436. RT5616_L_MUTE | RT5616_R_MUTE);
  437. break;
  438. default:
  439. return 0;
  440. }
  441. return 0;
  442. }
  443. static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w,
  444. struct snd_kcontrol *kcontrol, int event)
  445. {
  446. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  447. switch (event) {
  448. case SND_SOC_DAPM_POST_PMU:
  449. /* depop parameters */
  450. snd_soc_component_update_bits(component, RT5616_DEPOP_M2,
  451. RT5616_DEPOP_MASK, RT5616_DEPOP_MAN);
  452. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  453. RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
  454. RT5616_HP_CB_MASK, RT5616_HP_CP_PU |
  455. RT5616_HP_SG_DIS | RT5616_HP_CB_PU);
  456. snd_soc_component_write(component, RT5616_PR_BASE +
  457. RT5616_HP_DCC_INT1, 0x9f00);
  458. /* headphone amp power on */
  459. snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
  460. RT5616_PWR_FV1 | RT5616_PWR_FV2, 0);
  461. snd_soc_component_update_bits(component, RT5616_PWR_VOL,
  462. RT5616_PWR_HV_L | RT5616_PWR_HV_R,
  463. RT5616_PWR_HV_L | RT5616_PWR_HV_R);
  464. snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
  465. RT5616_PWR_HP_L | RT5616_PWR_HP_R |
  466. RT5616_PWR_HA, RT5616_PWR_HP_L |
  467. RT5616_PWR_HP_R | RT5616_PWR_HA);
  468. msleep(50);
  469. snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
  470. RT5616_PWR_FV1 | RT5616_PWR_FV2,
  471. RT5616_PWR_FV1 | RT5616_PWR_FV2);
  472. snd_soc_component_update_bits(component, RT5616_CHARGE_PUMP,
  473. RT5616_PM_HP_MASK, RT5616_PM_HP_HV);
  474. snd_soc_component_update_bits(component, RT5616_PR_BASE +
  475. RT5616_CHOP_DAC_ADC, 0x0200, 0x0200);
  476. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  477. RT5616_HP_CO_MASK | RT5616_HP_SG_MASK,
  478. RT5616_HP_CO_EN | RT5616_HP_SG_EN);
  479. break;
  480. case SND_SOC_DAPM_PRE_PMD:
  481. snd_soc_component_update_bits(component, RT5616_PR_BASE +
  482. RT5616_CHOP_DAC_ADC, 0x0200, 0x0);
  483. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  484. RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
  485. RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
  486. RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
  487. /* headphone amp power down */
  488. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  489. RT5616_SMT_TRIG_MASK |
  490. RT5616_HP_CD_PD_MASK | RT5616_HP_CO_MASK |
  491. RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
  492. RT5616_HP_CB_MASK,
  493. RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN |
  494. RT5616_HP_CO_DIS | RT5616_HP_CP_PD |
  495. RT5616_HP_SG_EN | RT5616_HP_CB_PD);
  496. snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
  497. RT5616_PWR_HP_L | RT5616_PWR_HP_R |
  498. RT5616_PWR_HA, 0);
  499. break;
  500. default:
  501. return 0;
  502. }
  503. return 0;
  504. }
  505. static int rt5616_hp_event(struct snd_soc_dapm_widget *w,
  506. struct snd_kcontrol *kcontrol, int event)
  507. {
  508. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  509. switch (event) {
  510. case SND_SOC_DAPM_POST_PMU:
  511. /* headphone unmute sequence */
  512. snd_soc_component_update_bits(component, RT5616_DEPOP_M3,
  513. RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
  514. RT5616_CP_FQ3_MASK,
  515. RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT |
  516. RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
  517. RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT);
  518. snd_soc_component_write(component, RT5616_PR_BASE +
  519. RT5616_MAMP_INT_REG2, 0xfc00);
  520. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  521. RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN);
  522. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  523. RT5616_RSTN_MASK, RT5616_RSTN_EN);
  524. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  525. RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK |
  526. RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS |
  527. RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
  528. snd_soc_component_update_bits(component, RT5616_HP_VOL,
  529. RT5616_L_MUTE | RT5616_R_MUTE, 0);
  530. msleep(100);
  531. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  532. RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
  533. RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
  534. RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
  535. msleep(20);
  536. snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET,
  537. RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN);
  538. break;
  539. case SND_SOC_DAPM_PRE_PMD:
  540. /* headphone mute sequence */
  541. snd_soc_component_update_bits(component, RT5616_DEPOP_M3,
  542. RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
  543. RT5616_CP_FQ3_MASK,
  544. RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT |
  545. RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
  546. RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT);
  547. snd_soc_component_write(component, RT5616_PR_BASE +
  548. RT5616_MAMP_INT_REG2, 0xfc00);
  549. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  550. RT5616_HP_SG_MASK, RT5616_HP_SG_EN);
  551. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  552. RT5616_RSTP_MASK, RT5616_RSTP_EN);
  553. snd_soc_component_update_bits(component, RT5616_DEPOP_M1,
  554. RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK |
  555. RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS |
  556. RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
  557. snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET,
  558. RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS);
  559. msleep(90);
  560. snd_soc_component_update_bits(component, RT5616_HP_VOL,
  561. RT5616_L_MUTE | RT5616_R_MUTE,
  562. RT5616_L_MUTE | RT5616_R_MUTE);
  563. msleep(30);
  564. break;
  565. default:
  566. return 0;
  567. }
  568. return 0;
  569. }
  570. static int rt5616_lout_event(struct snd_soc_dapm_widget *w,
  571. struct snd_kcontrol *kcontrol, int event)
  572. {
  573. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  574. switch (event) {
  575. case SND_SOC_DAPM_POST_PMU:
  576. snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
  577. RT5616_PWR_LM, RT5616_PWR_LM);
  578. snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1,
  579. RT5616_L_MUTE | RT5616_R_MUTE, 0);
  580. break;
  581. case SND_SOC_DAPM_PRE_PMD:
  582. snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1,
  583. RT5616_L_MUTE | RT5616_R_MUTE,
  584. RT5616_L_MUTE | RT5616_R_MUTE);
  585. snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
  586. RT5616_PWR_LM, 0);
  587. break;
  588. default:
  589. return 0;
  590. }
  591. return 0;
  592. }
  593. static int rt5616_bst1_event(struct snd_soc_dapm_widget *w,
  594. struct snd_kcontrol *kcontrol, int event)
  595. {
  596. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  597. switch (event) {
  598. case SND_SOC_DAPM_POST_PMU:
  599. snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
  600. RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2);
  601. break;
  602. case SND_SOC_DAPM_PRE_PMD:
  603. snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
  604. RT5616_PWR_BST1_OP2, 0);
  605. break;
  606. default:
  607. return 0;
  608. }
  609. return 0;
  610. }
  611. static int rt5616_bst2_event(struct snd_soc_dapm_widget *w,
  612. struct snd_kcontrol *kcontrol, int event)
  613. {
  614. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  615. switch (event) {
  616. case SND_SOC_DAPM_POST_PMU:
  617. snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
  618. RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2);
  619. break;
  620. case SND_SOC_DAPM_PRE_PMD:
  621. snd_soc_component_update_bits(component, RT5616_PWR_ANLG2,
  622. RT5616_PWR_BST2_OP2, 0);
  623. break;
  624. default:
  625. return 0;
  626. }
  627. return 0;
  628. }
  629. static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = {
  630. SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2,
  631. RT5616_PWR_PLL_BIT, 0, NULL, 0),
  632. /* Input Side */
  633. /* micbias */
  634. SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1,
  635. RT5616_PWR_LDO_BIT, 0, NULL, 0),
  636. SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2,
  637. RT5616_PWR_MB1_BIT, 0, NULL, 0),
  638. /* Input Lines */
  639. SND_SOC_DAPM_INPUT("MIC1"),
  640. SND_SOC_DAPM_INPUT("MIC2"),
  641. SND_SOC_DAPM_INPUT("IN1P"),
  642. SND_SOC_DAPM_INPUT("IN2P"),
  643. SND_SOC_DAPM_INPUT("IN2N"),
  644. /* Boost */
  645. SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2,
  646. RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event,
  647. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  648. SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2,
  649. RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event,
  650. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  651. /* Input Volume */
  652. SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL,
  653. RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
  654. SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL,
  655. RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
  656. SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL,
  657. RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
  658. SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL,
  659. RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
  660. /* REC Mixer */
  661. SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0,
  662. rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)),
  663. SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0,
  664. rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)),
  665. /* ADCs */
  666. SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1,
  667. RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event,
  668. SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
  669. SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1,
  670. RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event,
  671. SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
  672. /* ADC Mixer */
  673. SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2,
  674. RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
  675. SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
  676. rt5616_sto1_adc_l_mix,
  677. ARRAY_SIZE(rt5616_sto1_adc_l_mix)),
  678. SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
  679. rt5616_sto1_adc_r_mix,
  680. ARRAY_SIZE(rt5616_sto1_adc_r_mix)),
  681. /* Digital Interface */
  682. SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1,
  683. RT5616_PWR_I2S1_BIT, 0, NULL, 0),
  684. SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  685. SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  686. SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  687. SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  688. /* Digital Interface Select */
  689. /* Audio Interface */
  690. SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
  691. SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
  692. /* Audio DSP */
  693. SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
  694. /* Output Side */
  695. /* DAC mixer before sound effect */
  696. SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
  697. rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)),
  698. SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
  699. rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)),
  700. SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2,
  701. RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
  702. /* DAC Mixer */
  703. SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
  704. rt5616_sto_dac_l_mix,
  705. ARRAY_SIZE(rt5616_sto_dac_l_mix)),
  706. SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
  707. rt5616_sto_dac_r_mix,
  708. ARRAY_SIZE(rt5616_sto_dac_r_mix)),
  709. /* DACs */
  710. SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1,
  711. RT5616_PWR_DAC_L1_BIT, 0),
  712. SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1,
  713. RT5616_PWR_DAC_R1_BIT, 0),
  714. /* OUT Mixer */
  715. SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT,
  716. 0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)),
  717. SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT,
  718. 0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)),
  719. /* Output Volume */
  720. SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL,
  721. RT5616_PWR_OV_L_BIT, 0, NULL, 0),
  722. SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL,
  723. RT5616_PWR_OV_R_BIT, 0, NULL, 0),
  724. SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL,
  725. RT5616_PWR_HV_L_BIT, 0, NULL, 0),
  726. SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL,
  727. RT5616_PWR_HV_R_BIT, 0, NULL, 0),
  728. SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM,
  729. 0, 0, NULL, 0),
  730. SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM,
  731. 0, 0, NULL, 0),
  732. SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM,
  733. 0, 0, NULL, 0),
  734. SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL,
  735. RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
  736. SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL,
  737. RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
  738. SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL,
  739. RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
  740. SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL,
  741. RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
  742. /* HPO/LOUT/Mono Mixer */
  743. SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
  744. rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)),
  745. SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
  746. rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)),
  747. SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0,
  748. rt5616_hp_event, SND_SOC_DAPM_PRE_PMD |
  749. SND_SOC_DAPM_POST_PMU),
  750. SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
  751. rt5616_lout_event, SND_SOC_DAPM_PRE_PMD |
  752. SND_SOC_DAPM_POST_PMU),
  753. SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0,
  754. rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU |
  755. SND_SOC_DAPM_PRE_PMD),
  756. /* Output Lines */
  757. SND_SOC_DAPM_OUTPUT("HPOL"),
  758. SND_SOC_DAPM_OUTPUT("HPOR"),
  759. SND_SOC_DAPM_OUTPUT("LOUTL"),
  760. SND_SOC_DAPM_OUTPUT("LOUTR"),
  761. };
  762. static const struct snd_soc_dapm_route rt5616_dapm_routes[] = {
  763. {"IN1P", NULL, "LDO"},
  764. {"IN2P", NULL, "LDO"},
  765. {"IN1P", NULL, "MIC1"},
  766. {"IN2P", NULL, "MIC2"},
  767. {"IN2N", NULL, "MIC2"},
  768. {"BST1", NULL, "IN1P"},
  769. {"BST2", NULL, "IN2P"},
  770. {"BST2", NULL, "IN2N"},
  771. {"BST1", NULL, "micbias1"},
  772. {"BST2", NULL, "micbias1"},
  773. {"INL1 VOL", NULL, "IN2P"},
  774. {"INR1 VOL", NULL, "IN2N"},
  775. {"RECMIXL", "INL1 Switch", "INL1 VOL"},
  776. {"RECMIXL", "BST2 Switch", "BST2"},
  777. {"RECMIXL", "BST1 Switch", "BST1"},
  778. {"RECMIXR", "INR1 Switch", "INR1 VOL"},
  779. {"RECMIXR", "BST2 Switch", "BST2"},
  780. {"RECMIXR", "BST1 Switch", "BST1"},
  781. {"ADC L", NULL, "RECMIXL"},
  782. {"ADC R", NULL, "RECMIXR"},
  783. {"Stereo1 ADC MIXL", "ADC1 Switch", "ADC L"},
  784. {"Stereo1 ADC MIXL", NULL, "stereo1 filter"},
  785. {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
  786. {"Stereo1 ADC MIXR", "ADC1 Switch", "ADC R"},
  787. {"Stereo1 ADC MIXR", NULL, "stereo1 filter"},
  788. {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
  789. {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
  790. {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
  791. {"IF1 ADC1", NULL, "I2S1"},
  792. {"AIF1TX", NULL, "IF1 ADC1"},
  793. {"IF1 DAC", NULL, "AIF1RX"},
  794. {"IF1 DAC", NULL, "I2S1"},
  795. {"IF1 DAC1 L", NULL, "IF1 DAC"},
  796. {"IF1 DAC1 R", NULL, "IF1 DAC"},
  797. {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
  798. {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
  799. {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
  800. {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
  801. {"Audio DSP", NULL, "DAC MIXL"},
  802. {"Audio DSP", NULL, "DAC MIXR"},
  803. {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
  804. {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
  805. {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
  806. {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
  807. {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
  808. {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
  809. {"DAC L1", NULL, "Stereo DAC MIXL"},
  810. {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
  811. {"DAC R1", NULL, "Stereo DAC MIXR"},
  812. {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
  813. {"OUT MIXL", "BST1 Switch", "BST1"},
  814. {"OUT MIXL", "BST2 Switch", "BST2"},
  815. {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
  816. {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
  817. {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
  818. {"OUT MIXR", "BST2 Switch", "BST2"},
  819. {"OUT MIXR", "BST1 Switch", "BST1"},
  820. {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
  821. {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
  822. {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
  823. {"HPOVOL L", NULL, "OUT MIXL"},
  824. {"HPOVOL R", NULL, "OUT MIXR"},
  825. {"OUTVOL L", NULL, "OUT MIXL"},
  826. {"OUTVOL R", NULL, "OUT MIXR"},
  827. {"DAC 1", NULL, "DAC L1"},
  828. {"DAC 1", NULL, "DAC R1"},
  829. {"HPOVOL", NULL, "HPOVOL L"},
  830. {"HPOVOL", NULL, "HPOVOL R"},
  831. {"HPO MIX", "DAC1 Switch", "DAC 1"},
  832. {"HPO MIX", "HPVOL Switch", "HPOVOL"},
  833. {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
  834. {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
  835. {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
  836. {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
  837. {"HP amp", NULL, "HPO MIX"},
  838. {"HP amp", NULL, "Charge Pump"},
  839. {"HPOL", NULL, "HP amp"},
  840. {"HPOR", NULL, "HP amp"},
  841. {"LOUT amp", NULL, "LOUT MIX"},
  842. {"LOUT amp", NULL, "Charge Pump"},
  843. {"LOUTL", NULL, "LOUT amp"},
  844. {"LOUTR", NULL, "LOUT amp"},
  845. };
  846. static int rt5616_hw_params(struct snd_pcm_substream *substream,
  847. struct snd_pcm_hw_params *params,
  848. struct snd_soc_dai *dai)
  849. {
  850. struct snd_soc_component *component = dai->component;
  851. struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
  852. unsigned int val_len = 0, val_clk, mask_clk;
  853. int pre_div, bclk_ms, frame_size;
  854. rt5616->lrck[dai->id] = params_rate(params);
  855. pre_div = rl6231_get_clk_info(rt5616->sysclk, rt5616->lrck[dai->id]);
  856. if (pre_div < 0) {
  857. dev_err(component->dev, "Unsupported clock setting\n");
  858. return -EINVAL;
  859. }
  860. frame_size = snd_soc_params_to_frame_size(params);
  861. if (frame_size < 0) {
  862. dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
  863. return -EINVAL;
  864. }
  865. bclk_ms = frame_size > 32 ? 1 : 0;
  866. rt5616->bclk[dai->id] = rt5616->lrck[dai->id] * (32 << bclk_ms);
  867. dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
  868. rt5616->bclk[dai->id], rt5616->lrck[dai->id]);
  869. dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
  870. bclk_ms, pre_div, dai->id);
  871. switch (params_format(params)) {
  872. case SNDRV_PCM_FORMAT_S16_LE:
  873. break;
  874. case SNDRV_PCM_FORMAT_S20_3LE:
  875. val_len |= RT5616_I2S_DL_20;
  876. break;
  877. case SNDRV_PCM_FORMAT_S24_LE:
  878. val_len |= RT5616_I2S_DL_24;
  879. break;
  880. case SNDRV_PCM_FORMAT_S8:
  881. val_len |= RT5616_I2S_DL_8;
  882. break;
  883. default:
  884. return -EINVAL;
  885. }
  886. mask_clk = RT5616_I2S_PD1_MASK;
  887. val_clk = pre_div << RT5616_I2S_PD1_SFT;
  888. snd_soc_component_update_bits(component, RT5616_I2S1_SDP,
  889. RT5616_I2S_DL_MASK, val_len);
  890. snd_soc_component_update_bits(component, RT5616_ADDA_CLK1, mask_clk, val_clk);
  891. return 0;
  892. }
  893. static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  894. {
  895. struct snd_soc_component *component = dai->component;
  896. struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
  897. unsigned int reg_val = 0;
  898. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  899. case SND_SOC_DAIFMT_CBM_CFM:
  900. rt5616->master[dai->id] = 1;
  901. break;
  902. case SND_SOC_DAIFMT_CBS_CFS:
  903. reg_val |= RT5616_I2S_MS_S;
  904. rt5616->master[dai->id] = 0;
  905. break;
  906. default:
  907. return -EINVAL;
  908. }
  909. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  910. case SND_SOC_DAIFMT_NB_NF:
  911. break;
  912. case SND_SOC_DAIFMT_IB_NF:
  913. reg_val |= RT5616_I2S_BP_INV;
  914. break;
  915. default:
  916. return -EINVAL;
  917. }
  918. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  919. case SND_SOC_DAIFMT_I2S:
  920. break;
  921. case SND_SOC_DAIFMT_LEFT_J:
  922. reg_val |= RT5616_I2S_DF_LEFT;
  923. break;
  924. case SND_SOC_DAIFMT_DSP_A:
  925. reg_val |= RT5616_I2S_DF_PCM_A;
  926. break;
  927. case SND_SOC_DAIFMT_DSP_B:
  928. reg_val |= RT5616_I2S_DF_PCM_B;
  929. break;
  930. default:
  931. return -EINVAL;
  932. }
  933. snd_soc_component_update_bits(component, RT5616_I2S1_SDP,
  934. RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK |
  935. RT5616_I2S_DF_MASK, reg_val);
  936. return 0;
  937. }
  938. static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai,
  939. int clk_id, unsigned int freq, int dir)
  940. {
  941. struct snd_soc_component *component = dai->component;
  942. struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
  943. unsigned int reg_val = 0;
  944. if (freq == rt5616->sysclk && clk_id == rt5616->sysclk_src)
  945. return 0;
  946. switch (clk_id) {
  947. case RT5616_SCLK_S_MCLK:
  948. reg_val |= RT5616_SCLK_SRC_MCLK;
  949. break;
  950. case RT5616_SCLK_S_PLL1:
  951. reg_val |= RT5616_SCLK_SRC_PLL1;
  952. break;
  953. default:
  954. dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
  955. return -EINVAL;
  956. }
  957. snd_soc_component_update_bits(component, RT5616_GLB_CLK,
  958. RT5616_SCLK_SRC_MASK, reg_val);
  959. rt5616->sysclk = freq;
  960. rt5616->sysclk_src = clk_id;
  961. dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
  962. return 0;
  963. }
  964. static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
  965. unsigned int freq_in, unsigned int freq_out)
  966. {
  967. struct snd_soc_component *component = dai->component;
  968. struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
  969. struct rl6231_pll_code pll_code;
  970. int ret;
  971. if (source == rt5616->pll_src && freq_in == rt5616->pll_in &&
  972. freq_out == rt5616->pll_out)
  973. return 0;
  974. if (!freq_in || !freq_out) {
  975. dev_dbg(component->dev, "PLL disabled\n");
  976. rt5616->pll_in = 0;
  977. rt5616->pll_out = 0;
  978. snd_soc_component_update_bits(component, RT5616_GLB_CLK,
  979. RT5616_SCLK_SRC_MASK,
  980. RT5616_SCLK_SRC_MCLK);
  981. return 0;
  982. }
  983. switch (source) {
  984. case RT5616_PLL1_S_MCLK:
  985. snd_soc_component_update_bits(component, RT5616_GLB_CLK,
  986. RT5616_PLL1_SRC_MASK,
  987. RT5616_PLL1_SRC_MCLK);
  988. break;
  989. case RT5616_PLL1_S_BCLK1:
  990. case RT5616_PLL1_S_BCLK2:
  991. snd_soc_component_update_bits(component, RT5616_GLB_CLK,
  992. RT5616_PLL1_SRC_MASK,
  993. RT5616_PLL1_SRC_BCLK1);
  994. break;
  995. default:
  996. dev_err(component->dev, "Unknown PLL source %d\n", source);
  997. return -EINVAL;
  998. }
  999. ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
  1000. if (ret < 0) {
  1001. dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
  1002. return ret;
  1003. }
  1004. dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
  1005. pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
  1006. pll_code.n_code, pll_code.k_code);
  1007. snd_soc_component_write(component, RT5616_PLL_CTRL1,
  1008. pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code);
  1009. snd_soc_component_write(component, RT5616_PLL_CTRL2,
  1010. (pll_code.m_bp ? 0 : pll_code.m_code) <<
  1011. RT5616_PLL_M_SFT |
  1012. pll_code.m_bp << RT5616_PLL_M_BP_SFT);
  1013. rt5616->pll_in = freq_in;
  1014. rt5616->pll_out = freq_out;
  1015. rt5616->pll_src = source;
  1016. return 0;
  1017. }
  1018. static int rt5616_set_bias_level(struct snd_soc_component *component,
  1019. enum snd_soc_bias_level level)
  1020. {
  1021. struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
  1022. int ret;
  1023. switch (level) {
  1024. case SND_SOC_BIAS_ON:
  1025. break;
  1026. case SND_SOC_BIAS_PREPARE:
  1027. /*
  1028. * SND_SOC_BIAS_PREPARE is called while preparing for a
  1029. * transition to ON or away from ON. If current bias_level
  1030. * is SND_SOC_BIAS_ON, then it is preparing for a transition
  1031. * away from ON. Disable the clock in that case, otherwise
  1032. * enable it.
  1033. */
  1034. if (IS_ERR(rt5616->mclk))
  1035. break;
  1036. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {
  1037. clk_disable_unprepare(rt5616->mclk);
  1038. } else {
  1039. ret = clk_prepare_enable(rt5616->mclk);
  1040. if (ret)
  1041. return ret;
  1042. }
  1043. break;
  1044. case SND_SOC_BIAS_STANDBY:
  1045. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  1046. snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
  1047. RT5616_PWR_VREF1 | RT5616_PWR_MB |
  1048. RT5616_PWR_BG | RT5616_PWR_VREF2,
  1049. RT5616_PWR_VREF1 | RT5616_PWR_MB |
  1050. RT5616_PWR_BG | RT5616_PWR_VREF2);
  1051. mdelay(10);
  1052. snd_soc_component_update_bits(component, RT5616_PWR_ANLG1,
  1053. RT5616_PWR_FV1 | RT5616_PWR_FV2,
  1054. RT5616_PWR_FV1 | RT5616_PWR_FV2);
  1055. snd_soc_component_update_bits(component, RT5616_D_MISC,
  1056. RT5616_D_GATE_EN,
  1057. RT5616_D_GATE_EN);
  1058. }
  1059. break;
  1060. case SND_SOC_BIAS_OFF:
  1061. snd_soc_component_update_bits(component, RT5616_D_MISC, RT5616_D_GATE_EN, 0);
  1062. snd_soc_component_write(component, RT5616_PWR_DIG1, 0x0000);
  1063. snd_soc_component_write(component, RT5616_PWR_DIG2, 0x0000);
  1064. snd_soc_component_write(component, RT5616_PWR_VOL, 0x0000);
  1065. snd_soc_component_write(component, RT5616_PWR_MIXER, 0x0000);
  1066. snd_soc_component_write(component, RT5616_PWR_ANLG1, 0x0000);
  1067. snd_soc_component_write(component, RT5616_PWR_ANLG2, 0x0000);
  1068. break;
  1069. default:
  1070. break;
  1071. }
  1072. return 0;
  1073. }
  1074. static int rt5616_probe(struct snd_soc_component *component)
  1075. {
  1076. struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
  1077. /* Check if MCLK provided */
  1078. rt5616->mclk = devm_clk_get(component->dev, "mclk");
  1079. if (PTR_ERR(rt5616->mclk) == -EPROBE_DEFER)
  1080. return -EPROBE_DEFER;
  1081. rt5616->component = component;
  1082. return 0;
  1083. }
  1084. #ifdef CONFIG_PM
  1085. static int rt5616_suspend(struct snd_soc_component *component)
  1086. {
  1087. struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
  1088. regcache_cache_only(rt5616->regmap, true);
  1089. regcache_mark_dirty(rt5616->regmap);
  1090. return 0;
  1091. }
  1092. static int rt5616_resume(struct snd_soc_component *component)
  1093. {
  1094. struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component);
  1095. regcache_cache_only(rt5616->regmap, false);
  1096. regcache_sync(rt5616->regmap);
  1097. return 0;
  1098. }
  1099. #else
  1100. #define rt5616_suspend NULL
  1101. #define rt5616_resume NULL
  1102. #endif
  1103. #define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_192000
  1104. #define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  1105. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
  1106. static const struct snd_soc_dai_ops rt5616_aif_dai_ops = {
  1107. .hw_params = rt5616_hw_params,
  1108. .set_fmt = rt5616_set_dai_fmt,
  1109. .set_sysclk = rt5616_set_dai_sysclk,
  1110. .set_pll = rt5616_set_dai_pll,
  1111. };
  1112. static struct snd_soc_dai_driver rt5616_dai[] = {
  1113. {
  1114. .name = "rt5616-aif1",
  1115. .id = RT5616_AIF1,
  1116. .playback = {
  1117. .stream_name = "AIF1 Playback",
  1118. .channels_min = 1,
  1119. .channels_max = 2,
  1120. .rates = RT5616_STEREO_RATES,
  1121. .formats = RT5616_FORMATS,
  1122. },
  1123. .capture = {
  1124. .stream_name = "AIF1 Capture",
  1125. .channels_min = 1,
  1126. .channels_max = 2,
  1127. .rates = RT5616_STEREO_RATES,
  1128. .formats = RT5616_FORMATS,
  1129. },
  1130. .ops = &rt5616_aif_dai_ops,
  1131. },
  1132. };
  1133. static const struct snd_soc_component_driver soc_component_dev_rt5616 = {
  1134. .probe = rt5616_probe,
  1135. .suspend = rt5616_suspend,
  1136. .resume = rt5616_resume,
  1137. .set_bias_level = rt5616_set_bias_level,
  1138. .controls = rt5616_snd_controls,
  1139. .num_controls = ARRAY_SIZE(rt5616_snd_controls),
  1140. .dapm_widgets = rt5616_dapm_widgets,
  1141. .num_dapm_widgets = ARRAY_SIZE(rt5616_dapm_widgets),
  1142. .dapm_routes = rt5616_dapm_routes,
  1143. .num_dapm_routes = ARRAY_SIZE(rt5616_dapm_routes),
  1144. .use_pmdown_time = 1,
  1145. .endianness = 1,
  1146. .non_legacy_dai_naming = 1,
  1147. };
  1148. static const struct regmap_config rt5616_regmap = {
  1149. .reg_bits = 8,
  1150. .val_bits = 16,
  1151. .use_single_read = true,
  1152. .use_single_write = true,
  1153. .max_register = RT5616_DEVICE_ID + 1 + (ARRAY_SIZE(rt5616_ranges) *
  1154. RT5616_PR_SPACING),
  1155. .volatile_reg = rt5616_volatile_register,
  1156. .readable_reg = rt5616_readable_register,
  1157. .cache_type = REGCACHE_RBTREE,
  1158. .reg_defaults = rt5616_reg,
  1159. .num_reg_defaults = ARRAY_SIZE(rt5616_reg),
  1160. .ranges = rt5616_ranges,
  1161. .num_ranges = ARRAY_SIZE(rt5616_ranges),
  1162. };
  1163. static const struct i2c_device_id rt5616_i2c_id[] = {
  1164. { "rt5616", 0 },
  1165. { }
  1166. };
  1167. MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id);
  1168. #if defined(CONFIG_OF)
  1169. static const struct of_device_id rt5616_of_match[] = {
  1170. { .compatible = "realtek,rt5616", },
  1171. {},
  1172. };
  1173. MODULE_DEVICE_TABLE(of, rt5616_of_match);
  1174. #endif
  1175. static int rt5616_i2c_probe(struct i2c_client *i2c,
  1176. const struct i2c_device_id *id)
  1177. {
  1178. struct rt5616_priv *rt5616;
  1179. unsigned int val;
  1180. int ret;
  1181. rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv),
  1182. GFP_KERNEL);
  1183. if (!rt5616)
  1184. return -ENOMEM;
  1185. i2c_set_clientdata(i2c, rt5616);
  1186. rt5616->regmap = devm_regmap_init_i2c(i2c, &rt5616_regmap);
  1187. if (IS_ERR(rt5616->regmap)) {
  1188. ret = PTR_ERR(rt5616->regmap);
  1189. dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
  1190. ret);
  1191. return ret;
  1192. }
  1193. regmap_read(rt5616->regmap, RT5616_DEVICE_ID, &val);
  1194. if (val != 0x6281) {
  1195. dev_err(&i2c->dev,
  1196. "Device with ID register %#x is not rt5616\n",
  1197. val);
  1198. return -ENODEV;
  1199. }
  1200. regmap_write(rt5616->regmap, RT5616_RESET, 0);
  1201. regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
  1202. RT5616_PWR_VREF1 | RT5616_PWR_MB |
  1203. RT5616_PWR_BG | RT5616_PWR_VREF2,
  1204. RT5616_PWR_VREF1 | RT5616_PWR_MB |
  1205. RT5616_PWR_BG | RT5616_PWR_VREF2);
  1206. mdelay(10);
  1207. regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
  1208. RT5616_PWR_FV1 | RT5616_PWR_FV2,
  1209. RT5616_PWR_FV1 | RT5616_PWR_FV2);
  1210. ret = regmap_register_patch(rt5616->regmap, init_list,
  1211. ARRAY_SIZE(init_list));
  1212. if (ret != 0)
  1213. dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
  1214. regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
  1215. RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V);
  1216. return devm_snd_soc_register_component(&i2c->dev,
  1217. &soc_component_dev_rt5616,
  1218. rt5616_dai, ARRAY_SIZE(rt5616_dai));
  1219. }
  1220. static int rt5616_i2c_remove(struct i2c_client *i2c)
  1221. {
  1222. return 0;
  1223. }
  1224. static void rt5616_i2c_shutdown(struct i2c_client *client)
  1225. {
  1226. struct rt5616_priv *rt5616 = i2c_get_clientdata(client);
  1227. regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8);
  1228. regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8);
  1229. }
  1230. static struct i2c_driver rt5616_i2c_driver = {
  1231. .driver = {
  1232. .name = "rt5616",
  1233. .of_match_table = of_match_ptr(rt5616_of_match),
  1234. },
  1235. .probe = rt5616_i2c_probe,
  1236. .remove = rt5616_i2c_remove,
  1237. .shutdown = rt5616_i2c_shutdown,
  1238. .id_table = rt5616_i2c_id,
  1239. };
  1240. module_i2c_driver(rt5616_i2c_driver);
  1241. MODULE_DESCRIPTION("ASoC RT5616 driver");
  1242. MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
  1243. MODULE_LICENSE("GPL");