rt5514.h 9.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * rt5514.h -- RT5514 ALSA SoC audio driver
  4. *
  5. * Copyright 2015 Realtek Microelectronics
  6. * Author: Oder Chiou <oder_chiou@realtek.com>
  7. */
  8. #ifndef __RT5514_H__
  9. #define __RT5514_H__
  10. #include <linux/clk.h>
  11. #include <sound/rt5514.h>
  12. #define RT5514_DEVICE_ID 0x10ec5514
  13. #define RT5514_RESET 0x2000
  14. #define RT5514_PWR_ANA1 0x2004
  15. #define RT5514_PWR_ANA2 0x2008
  16. #define RT5514_I2S_CTRL1 0x2010
  17. #define RT5514_I2S_CTRL2 0x2014
  18. #define RT5514_VAD_CTRL6 0x2030
  19. #define RT5514_EXT_VAD_CTRL 0x206c
  20. #define RT5514_DIG_IO_CTRL 0x2070
  21. #define RT5514_PAD_CTRL1 0x2080
  22. #define RT5514_DMIC_DATA_CTRL 0x20a0
  23. #define RT5514_DIG_SOURCE_CTRL 0x20a4
  24. #define RT5514_SRC_CTRL 0x20ac
  25. #define RT5514_DOWNFILTER2_CTRL1 0x20d0
  26. #define RT5514_PLL_SOURCE_CTRL 0x2100
  27. #define RT5514_CLK_CTRL1 0x2104
  28. #define RT5514_CLK_CTRL2 0x2108
  29. #define RT5514_PLL3_CALIB_CTRL1 0x2110
  30. #define RT5514_PLL3_CALIB_CTRL4 0x2120
  31. #define RT5514_PLL3_CALIB_CTRL5 0x2124
  32. #define RT5514_PLL3_CALIB_CTRL6 0x2128
  33. #define RT5514_DELAY_BUF_CTRL1 0x2140
  34. #define RT5514_DELAY_BUF_CTRL3 0x2148
  35. #define RT5514_ASRC_IN_CTRL1 0x2180
  36. #define RT5514_DOWNFILTER0_CTRL1 0x2190
  37. #define RT5514_DOWNFILTER0_CTRL2 0x2194
  38. #define RT5514_DOWNFILTER0_CTRL3 0x2198
  39. #define RT5514_DOWNFILTER1_CTRL1 0x21a0
  40. #define RT5514_DOWNFILTER1_CTRL2 0x21a4
  41. #define RT5514_DOWNFILTER1_CTRL3 0x21a8
  42. #define RT5514_ANA_CTRL_LDO10 0x2200
  43. #define RT5514_ANA_CTRL_LDO18_16 0x2204
  44. #define RT5514_ANA_CTRL_ADC12 0x2210
  45. #define RT5514_ANA_CTRL_ADC21 0x2214
  46. #define RT5514_ANA_CTRL_ADC22 0x2218
  47. #define RT5514_ANA_CTRL_ADC23 0x221c
  48. #define RT5514_ANA_CTRL_MICBST 0x2220
  49. #define RT5514_ANA_CTRL_ADCFED 0x2224
  50. #define RT5514_ANA_CTRL_INBUF 0x2228
  51. #define RT5514_ANA_CTRL_VREF 0x222c
  52. #define RT5514_ANA_CTRL_PLL3 0x2240
  53. #define RT5514_ANA_CTRL_PLL1_1 0x2260
  54. #define RT5514_ANA_CTRL_PLL1_2 0x2264
  55. #define RT5514_DMIC_LP_CTRL 0x2e00
  56. #define RT5514_MISC_CTRL_DSP 0x2e04
  57. #define RT5514_DSP_CTRL1 0x2f00
  58. #define RT5514_DSP_CTRL3 0x2f08
  59. #define RT5514_DSP_CTRL4 0x2f10
  60. #define RT5514_VENDOR_ID1 0x2ff0
  61. #define RT5514_VENDOR_ID2 0x2ff4
  62. #define RT5514_DSP_MAPPING 0x18000000
  63. /* RT5514_PWR_ANA1 (0x2004) */
  64. #define RT5514_POW_LDO18_IN (0x1 << 5)
  65. #define RT5514_POW_LDO18_IN_BIT 5
  66. #define RT5514_POW_LDO18_ADC (0x1 << 4)
  67. #define RT5514_POW_LDO18_ADC_BIT 4
  68. #define RT5514_POW_LDO21 (0x1 << 3)
  69. #define RT5514_POW_LDO21_BIT 3
  70. #define RT5514_POW_BG_LDO18_IN (0x1 << 2)
  71. #define RT5514_POW_BG_LDO18_IN_BIT 2
  72. #define RT5514_POW_BG_LDO21 (0x1 << 1)
  73. #define RT5514_POW_BG_LDO21_BIT 1
  74. /* RT5514_PWR_ANA2 (0x2008) */
  75. #define RT5514_POW_PLL1 (0x1 << 18)
  76. #define RT5514_POW_PLL1_BIT 18
  77. #define RT5514_POW_PLL1_LDO (0x1 << 16)
  78. #define RT5514_POW_PLL1_LDO_BIT 16
  79. #define RT5514_POW_BG_MBIAS (0x1 << 15)
  80. #define RT5514_POW_BG_MBIAS_BIT 15
  81. #define RT5514_POW_MBIAS (0x1 << 14)
  82. #define RT5514_POW_MBIAS_BIT 14
  83. #define RT5514_POW_VREF2 (0x1 << 13)
  84. #define RT5514_POW_VREF2_BIT 13
  85. #define RT5514_POW_VREF1 (0x1 << 12)
  86. #define RT5514_POW_VREF1_BIT 12
  87. #define RT5514_POWR_LDO16 (0x1 << 11)
  88. #define RT5514_POWR_LDO16_BIT 11
  89. #define RT5514_POWL_LDO16 (0x1 << 10)
  90. #define RT5514_POWL_LDO16_BIT 10
  91. #define RT5514_POW_ADC2 (0x1 << 9)
  92. #define RT5514_POW_ADC2_BIT 9
  93. #define RT5514_POW_INPUT_BUF (0x1 << 8)
  94. #define RT5514_POW_INPUT_BUF_BIT 8
  95. #define RT5514_POW_ADC1_R (0x1 << 7)
  96. #define RT5514_POW_ADC1_R_BIT 7
  97. #define RT5514_POW_ADC1_L (0x1 << 6)
  98. #define RT5514_POW_ADC1_L_BIT 6
  99. #define RT5514_POW2_BSTR (0x1 << 5)
  100. #define RT5514_POW2_BSTR_BIT 5
  101. #define RT5514_POW2_BSTL (0x1 << 4)
  102. #define RT5514_POW2_BSTL_BIT 4
  103. #define RT5514_POW_BSTR (0x1 << 3)
  104. #define RT5514_POW_BSTR_BIT 3
  105. #define RT5514_POW_BSTL (0x1 << 2)
  106. #define RT5514_POW_BSTL_BIT 2
  107. #define RT5514_POW_ADCFEDR (0x1 << 1)
  108. #define RT5514_POW_ADCFEDR_BIT 1
  109. #define RT5514_POW_ADCFEDL (0x1 << 0)
  110. #define RT5514_POW_ADCFEDL_BIT 0
  111. /* RT5514_I2S_CTRL1 (0x2010) */
  112. #define RT5514_TDM_MODE2 (0x1 << 30)
  113. #define RT5514_TDM_MODE2_SFT 30
  114. #define RT5514_TDM_MODE (0x1 << 28)
  115. #define RT5514_TDM_MODE_SFT 28
  116. #define RT5514_I2S_LR_MASK (0x1 << 26)
  117. #define RT5514_I2S_LR_SFT 26
  118. #define RT5514_I2S_LR_NOR (0x0 << 26)
  119. #define RT5514_I2S_LR_INV (0x1 << 26)
  120. #define RT5514_I2S_BP_MASK (0x1 << 25)
  121. #define RT5514_I2S_BP_SFT 25
  122. #define RT5514_I2S_BP_NOR (0x0 << 25)
  123. #define RT5514_I2S_BP_INV (0x1 << 25)
  124. #define RT5514_I2S_DF_MASK (0x7 << 16)
  125. #define RT5514_I2S_DF_SFT 16
  126. #define RT5514_I2S_DF_I2S (0x0 << 16)
  127. #define RT5514_I2S_DF_LEFT (0x1 << 16)
  128. #define RT5514_I2S_DF_PCM_A (0x2 << 16)
  129. #define RT5514_I2S_DF_PCM_B (0x3 << 16)
  130. #define RT5514_TDMSLOT_SEL_RX_MASK (0x3 << 10)
  131. #define RT5514_TDMSLOT_SEL_RX_SFT 10
  132. #define RT5514_TDMSLOT_SEL_RX_4CH (0x1 << 10)
  133. #define RT5514_TDMSLOT_SEL_RX_6CH (0x2 << 10)
  134. #define RT5514_TDMSLOT_SEL_RX_8CH (0x3 << 10)
  135. #define RT5514_CH_LEN_RX_MASK (0x3 << 8)
  136. #define RT5514_CH_LEN_RX_SFT 8
  137. #define RT5514_CH_LEN_RX_16 (0x0 << 8)
  138. #define RT5514_CH_LEN_RX_20 (0x1 << 8)
  139. #define RT5514_CH_LEN_RX_24 (0x2 << 8)
  140. #define RT5514_CH_LEN_RX_32 (0x3 << 8)
  141. #define RT5514_TDMSLOT_SEL_TX_MASK (0x3 << 6)
  142. #define RT5514_TDMSLOT_SEL_TX_SFT 6
  143. #define RT5514_TDMSLOT_SEL_TX_4CH (0x1 << 6)
  144. #define RT5514_TDMSLOT_SEL_TX_6CH (0x2 << 6)
  145. #define RT5514_TDMSLOT_SEL_TX_8CH (0x3 << 6)
  146. #define RT5514_CH_LEN_TX_MASK (0x3 << 4)
  147. #define RT5514_CH_LEN_TX_SFT 4
  148. #define RT5514_CH_LEN_TX_16 (0x0 << 4)
  149. #define RT5514_CH_LEN_TX_20 (0x1 << 4)
  150. #define RT5514_CH_LEN_TX_24 (0x2 << 4)
  151. #define RT5514_CH_LEN_TX_32 (0x3 << 4)
  152. #define RT5514_I2S_DL_MASK (0x3 << 0)
  153. #define RT5514_I2S_DL_SFT 0
  154. #define RT5514_I2S_DL_16 (0x0 << 0)
  155. #define RT5514_I2S_DL_20 (0x1 << 0)
  156. #define RT5514_I2S_DL_24 (0x2 << 0)
  157. #define RT5514_I2S_DL_8 (0x3 << 0)
  158. /* RT5514_I2S_CTRL2 (0x2014) */
  159. #define RT5514_TDM_DOCKING_MODE (0x1 << 31)
  160. #define RT5514_TDM_DOCKING_MODE_SFT 31
  161. #define RT5514_TDM_DOCKING_VALID_CH_MASK (0x1 << 29)
  162. #define RT5514_TDM_DOCKING_VALID_CH_SFT 29
  163. #define RT5514_TDM_DOCKING_VALID_CH2 (0x0 << 29)
  164. #define RT5514_TDM_DOCKING_VALID_CH4 (0x1 << 29)
  165. #define RT5514_TDM_DOCKING_START_MASK (0x1 << 28)
  166. #define RT5514_TDM_DOCKING_START_SFT 28
  167. #define RT5514_TDM_DOCKING_START_SLOT0 (0x0 << 28)
  168. #define RT5514_TDM_DOCKING_START_SLOT4 (0x1 << 28)
  169. /* RT5514_DIG_SOURCE_CTRL (0x20a4) */
  170. #define RT5514_AD1_DMIC_INPUT_SEL (0x1 << 1)
  171. #define RT5514_AD1_DMIC_INPUT_SEL_SFT 1
  172. #define RT5514_AD0_DMIC_INPUT_SEL (0x1 << 0)
  173. #define RT5514_AD0_DMIC_INPUT_SEL_SFT 0
  174. /* RT5514_PLL_SOURCE_CTRL (0x2100) */
  175. #define RT5514_PLL_1_SEL_MASK (0x7 << 12)
  176. #define RT5514_PLL_1_SEL_SFT 12
  177. #define RT5514_PLL_1_SEL_SCLK (0x3 << 12)
  178. #define RT5514_PLL_1_SEL_MCLK (0x4 << 12)
  179. /* RT5514_CLK_CTRL1 (0x2104) */
  180. #define RT5514_CLK_AD_ANA1_EN (0x1 << 31)
  181. #define RT5514_CLK_AD_ANA1_EN_BIT 31
  182. #define RT5514_CLK_AD1_EN (0x1 << 24)
  183. #define RT5514_CLK_AD1_EN_BIT 24
  184. #define RT5514_CLK_AD0_EN (0x1 << 23)
  185. #define RT5514_CLK_AD0_EN_BIT 23
  186. #define RT5514_CLK_DMIC_OUT_SEL_MASK (0x7 << 8)
  187. #define RT5514_CLK_DMIC_OUT_SEL_SFT 8
  188. #define RT5514_CLK_AD_ANA1_SEL_MASK (0xf << 0)
  189. #define RT5514_CLK_AD_ANA1_SEL_SFT 0
  190. /* RT5514_CLK_CTRL2 (0x2108) */
  191. #define RT5514_CLK_AD1_ASRC_EN (0x1 << 17)
  192. #define RT5514_CLK_AD1_ASRC_EN_BIT 17
  193. #define RT5514_CLK_AD0_ASRC_EN (0x1 << 16)
  194. #define RT5514_CLK_AD0_ASRC_EN_BIT 16
  195. #define RT5514_CLK_SYS_DIV_OUT_MASK (0x7 << 8)
  196. #define RT5514_CLK_SYS_DIV_OUT_SFT 8
  197. #define RT5514_SEL_ADC_OSR_MASK (0x7 << 4)
  198. #define RT5514_SEL_ADC_OSR_SFT 4
  199. #define RT5514_CLK_SYS_PRE_SEL_MASK (0x3 << 0)
  200. #define RT5514_CLK_SYS_PRE_SEL_SFT 0
  201. #define RT5514_CLK_SYS_PRE_SEL_MCLK (0x2 << 0)
  202. #define RT5514_CLK_SYS_PRE_SEL_PLL (0x3 << 0)
  203. /* RT5514_DOWNFILTER_CTRL (0x2190 0x2194 0x21a0 0x21a4) */
  204. #define RT5514_AD_DMIC_MIX (0x1 << 11)
  205. #define RT5514_AD_DMIC_MIX_BIT 11
  206. #define RT5514_AD_AD_MIX (0x1 << 10)
  207. #define RT5514_AD_AD_MIX_BIT 10
  208. #define RT5514_AD_AD_MUTE (0x1 << 7)
  209. #define RT5514_AD_AD_MUTE_BIT 7
  210. #define RT5514_AD_GAIN_MASK (0x3f << 1)
  211. #define RT5514_AD_GAIN_SFT 1
  212. /* RT5514_ANA_CTRL_MICBST (0x2220) */
  213. #define RT5514_SEL_BSTL_MASK (0xf << 4)
  214. #define RT5514_SEL_BSTL_SFT 4
  215. #define RT5514_SEL_BSTR_MASK (0xf << 0)
  216. #define RT5514_SEL_BSTR_SFT 0
  217. /* RT5514_ANA_CTRL_PLL1_1 (0x2260) */
  218. #define RT5514_PLL_K_MAX 0x1f
  219. #define RT5514_PLL_K_MASK (RT5514_PLL_K_MAX << 16)
  220. #define RT5514_PLL_K_SFT 16
  221. #define RT5514_PLL_N_MAX 0x1ff
  222. #define RT5514_PLL_N_MASK (RT5514_PLL_N_MAX << 7)
  223. #define RT5514_PLL_N_SFT 4
  224. #define RT5514_PLL_M_MAX 0xf
  225. #define RT5514_PLL_M_MASK (RT5514_PLL_M_MAX << 0)
  226. #define RT5514_PLL_M_SFT 0
  227. /* RT5514_ANA_CTRL_PLL1_2 (0x2264) */
  228. #define RT5514_PLL_M_BP (0x1 << 2)
  229. #define RT5514_PLL_M_BP_SFT 2
  230. #define RT5514_PLL_K_BP (0x1 << 1)
  231. #define RT5514_PLL_K_BP_SFT 1
  232. #define RT5514_EN_LDO_PLL1 (0x1 << 0)
  233. #define RT5514_EN_LDO_PLL1_BIT 0
  234. #define RT5514_PLL_INP_MAX 40000000
  235. #define RT5514_PLL_INP_MIN 256000
  236. #define RT5514_FIRMWARE1 "rt5514_dsp_fw1.bin"
  237. #define RT5514_FIRMWARE2 "rt5514_dsp_fw2.bin"
  238. /* System Clock Source */
  239. enum {
  240. RT5514_SCLK_S_MCLK,
  241. RT5514_SCLK_S_PLL1,
  242. };
  243. /* PLL1 Source */
  244. enum {
  245. RT5514_PLL1_S_MCLK,
  246. RT5514_PLL1_S_BCLK,
  247. };
  248. struct rt5514_priv {
  249. struct rt5514_platform_data pdata;
  250. struct snd_soc_component *component;
  251. struct regmap *i2c_regmap, *regmap;
  252. struct clk *mclk, *dsp_calib_clk;
  253. int sysclk;
  254. int sysclk_src;
  255. int lrck;
  256. int bclk;
  257. int pll_src;
  258. int pll_in;
  259. int pll_out;
  260. int dsp_enabled;
  261. unsigned int pll3_cal_value;
  262. };
  263. #endif /* __RT5514_H__ */