rk3328_codec.h 6.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * rk3328 ALSA SoC Audio driver
  4. *
  5. * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd All rights reserved.
  6. */
  7. #ifndef _RK3328_CODEC_H
  8. #define _RK3328_CODEC_H
  9. #include <linux/bitfield.h>
  10. /* codec register */
  11. #define CODEC_RESET (0x00 << 2)
  12. #define DAC_INIT_CTRL1 (0x03 << 2)
  13. #define DAC_INIT_CTRL2 (0x04 << 2)
  14. #define DAC_INIT_CTRL3 (0x05 << 2)
  15. #define DAC_PRECHARGE_CTRL (0x22 << 2)
  16. #define DAC_PWR_CTRL (0x23 << 2)
  17. #define DAC_CLK_CTRL (0x24 << 2)
  18. #define HPMIX_CTRL (0x25 << 2)
  19. #define DAC_SELECT (0x26 << 2)
  20. #define HPOUT_CTRL (0x27 << 2)
  21. #define HPOUTL_GAIN_CTRL (0x28 << 2)
  22. #define HPOUTR_GAIN_CTRL (0x29 << 2)
  23. #define HPOUT_POP_CTRL (0x2a << 2)
  24. /* REG00: CODEC_RESET */
  25. #define PWR_RST_BYPASS_DIS (0x0 << 6)
  26. #define PWR_RST_BYPASS_EN (0x1 << 6)
  27. #define DIG_CORE_RST (0x0 << 1)
  28. #define DIG_CORE_WORK (0x1 << 1)
  29. #define SYS_RST (0x0 << 0)
  30. #define SYS_WORK (0x1 << 0)
  31. /* REG03: DAC_INIT_CTRL1 */
  32. #define PIN_DIRECTION_MASK BIT(5)
  33. #define PIN_DIRECTION_IN (0x0 << 5)
  34. #define PIN_DIRECTION_OUT (0x1 << 5)
  35. #define DAC_I2S_MODE_MASK BIT(4)
  36. #define DAC_I2S_MODE_SLAVE (0x0 << 4)
  37. #define DAC_I2S_MODE_MASTER (0x1 << 4)
  38. /* REG04: DAC_INIT_CTRL2 */
  39. #define DAC_I2S_LRP_MASK BIT(7)
  40. #define DAC_I2S_LRP_NORMAL (0x0 << 7)
  41. #define DAC_I2S_LRP_REVERSAL (0x1 << 7)
  42. #define DAC_VDL_MASK GENMASK(6, 5)
  43. #define DAC_VDL_16BITS (0x0 << 5)
  44. #define DAC_VDL_20BITS (0x1 << 5)
  45. #define DAC_VDL_24BITS (0x2 << 5)
  46. #define DAC_VDL_32BITS (0x3 << 5)
  47. #define DAC_MODE_MASK GENMASK(4, 3)
  48. #define DAC_MODE_RJM (0x0 << 3)
  49. #define DAC_MODE_LJM (0x1 << 3)
  50. #define DAC_MODE_I2S (0x2 << 3)
  51. #define DAC_MODE_PCM (0x3 << 3)
  52. #define DAC_LR_SWAP_MASK BIT(2)
  53. #define DAC_LR_SWAP_DIS (0x0 << 2)
  54. #define DAC_LR_SWAP_EN (0x1 << 2)
  55. /* REG05: DAC_INIT_CTRL3 */
  56. #define DAC_WL_MASK GENMASK(3, 2)
  57. #define DAC_WL_16BITS (0x0 << 2)
  58. #define DAC_WL_20BITS (0x1 << 2)
  59. #define DAC_WL_24BITS (0x2 << 2)
  60. #define DAC_WL_32BITS (0x3 << 2)
  61. #define DAC_RST_MASK BIT(1)
  62. #define DAC_RST_EN (0x0 << 1)
  63. #define DAC_RST_DIS (0x1 << 1)
  64. #define DAC_BCP_MASK BIT(0)
  65. #define DAC_BCP_NORMAL (0x0 << 0)
  66. #define DAC_BCP_REVERSAL (0x1 << 0)
  67. /* REG22: DAC_PRECHARGE_CTRL */
  68. #define DAC_CHARGE_XCHARGE_MASK BIT(7)
  69. #define DAC_CHARGE_DISCHARGE (0x0 << 7)
  70. #define DAC_CHARGE_PRECHARGE (0x1 << 7)
  71. #define DAC_CHARGE_CURRENT_64I_MASK BIT(6)
  72. #define DAC_CHARGE_CURRENT_64I (0x1 << 6)
  73. #define DAC_CHARGE_CURRENT_32I_MASK BIT(5)
  74. #define DAC_CHARGE_CURRENT_32I (0x1 << 5)
  75. #define DAC_CHARGE_CURRENT_16I_MASK BIT(4)
  76. #define DAC_CHARGE_CURRENT_16I (0x1 << 4)
  77. #define DAC_CHARGE_CURRENT_08I_MASK BIT(3)
  78. #define DAC_CHARGE_CURRENT_08I (0x1 << 3)
  79. #define DAC_CHARGE_CURRENT_04I_MASK BIT(2)
  80. #define DAC_CHARGE_CURRENT_04I (0x1 << 2)
  81. #define DAC_CHARGE_CURRENT_02I_MASK BIT(1)
  82. #define DAC_CHARGE_CURRENT_02I (0x1 << 1)
  83. #define DAC_CHARGE_CURRENT_I_MASK BIT(0)
  84. #define DAC_CHARGE_CURRENT_I (0x1 << 0)
  85. #define DAC_CHARGE_CURRENT_ALL_MASK GENMASK(6, 0)
  86. #define DAC_CHARGE_CURRENT_ALL_OFF 0x00
  87. #define DAC_CHARGE_CURRENT_ALL_ON 0x7f
  88. /* REG23: DAC_PWR_CTRL */
  89. #define DAC_PWR_MASK BIT(6)
  90. #define DAC_PWR_OFF (0x0 << 6)
  91. #define DAC_PWR_ON (0x1 << 6)
  92. #define DACL_PATH_REFV_MASK BIT(5)
  93. #define DACL_PATH_REFV_OFF (0x0 << 5)
  94. #define DACL_PATH_REFV_ON (0x1 << 5)
  95. #define HPOUTL_ZERO_CROSSING_MASK BIT(4)
  96. #define HPOUTL_ZERO_CROSSING_OFF (0x0 << 4)
  97. #define HPOUTL_ZERO_CROSSING_ON (0x1 << 4)
  98. #define DACR_PATH_REFV_MASK BIT(1)
  99. #define DACR_PATH_REFV_OFF (0x0 << 1)
  100. #define DACR_PATH_REFV_ON (0x1 << 1)
  101. #define HPOUTR_ZERO_CROSSING_MASK BIT(0)
  102. #define HPOUTR_ZERO_CROSSING_OFF (0x0 << 0)
  103. #define HPOUTR_ZERO_CROSSING_ON (0x1 << 0)
  104. /* REG24: DAC_CLK_CTRL */
  105. #define DACL_REFV_MASK BIT(7)
  106. #define DACL_REFV_OFF (0x0 << 7)
  107. #define DACL_REFV_ON (0x1 << 7)
  108. #define DACL_CLK_MASK BIT(6)
  109. #define DACL_CLK_OFF (0x0 << 6)
  110. #define DACL_CLK_ON (0x1 << 6)
  111. #define DACL_MASK BIT(5)
  112. #define DACL_OFF (0x0 << 5)
  113. #define DACL_ON (0x1 << 5)
  114. #define DACL_INIT_MASK BIT(4)
  115. #define DACL_INIT_OFF (0x0 << 4)
  116. #define DACL_INIT_ON (0x1 << 4)
  117. #define DACR_REFV_MASK BIT(3)
  118. #define DACR_REFV_OFF (0x0 << 3)
  119. #define DACR_REFV_ON (0x1 << 3)
  120. #define DACR_CLK_MASK BIT(2)
  121. #define DACR_CLK_OFF (0x0 << 2)
  122. #define DACR_CLK_ON (0x1 << 2)
  123. #define DACR_MASK BIT(1)
  124. #define DACR_OFF (0x0 << 1)
  125. #define DACR_ON (0x1 << 1)
  126. #define DACR_INIT_MASK BIT(0)
  127. #define DACR_INIT_OFF (0x0 << 0)
  128. #define DACR_INIT_ON (0x1 << 0)
  129. /* REG25: HPMIX_CTRL*/
  130. #define HPMIXL_MASK BIT(6)
  131. #define HPMIXL_DIS (0x0 << 6)
  132. #define HPMIXL_EN (0x1 << 6)
  133. #define HPMIXL_INIT_MASK BIT(5)
  134. #define HPMIXL_INIT_DIS (0x0 << 5)
  135. #define HPMIXL_INIT_EN (0x1 << 5)
  136. #define HPMIXL_INIT2_MASK BIT(4)
  137. #define HPMIXL_INIT2_DIS (0x0 << 4)
  138. #define HPMIXL_INIT2_EN (0x1 << 4)
  139. #define HPMIXR_MASK BIT(2)
  140. #define HPMIXR_DIS (0x0 << 2)
  141. #define HPMIXR_EN (0x1 << 2)
  142. #define HPMIXR_INIT_MASK BIT(1)
  143. #define HPMIXR_INIT_DIS (0x0 << 1)
  144. #define HPMIXR_INIT_EN (0x1 << 1)
  145. #define HPMIXR_INIT2_MASK BIT(0)
  146. #define HPMIXR_INIT2_DIS (0x0 << 0)
  147. #define HPMIXR_INIT2_EN (0x1 << 0)
  148. /* REG26: DAC_SELECT */
  149. #define DACL_SELECT_MASK BIT(4)
  150. #define DACL_UNSELECT (0x0 << 4)
  151. #define DACL_SELECT (0x1 << 4)
  152. #define DACR_SELECT_MASK BIT(0)
  153. #define DACR_UNSELECT (0x0 << 0)
  154. #define DACR_SELECT (0x1 << 0)
  155. /* REG27: HPOUT_CTRL */
  156. #define HPOUTL_MASK BIT(7)
  157. #define HPOUTL_DIS (0x0 << 7)
  158. #define HPOUTL_EN (0x1 << 7)
  159. #define HPOUTL_INIT_MASK BIT(6)
  160. #define HPOUTL_INIT_DIS (0x0 << 6)
  161. #define HPOUTL_INIT_EN (0x1 << 6)
  162. #define HPOUTL_MUTE_MASK BIT(5)
  163. #define HPOUTL_MUTE (0x0 << 5)
  164. #define HPOUTL_UNMUTE (0x1 << 5)
  165. #define HPOUTR_MASK BIT(4)
  166. #define HPOUTR_DIS (0x0 << 4)
  167. #define HPOUTR_EN (0x1 << 4)
  168. #define HPOUTR_INIT_MASK BIT(3)
  169. #define HPOUTR_INIT_DIS (0x0 << 3)
  170. #define HPOUTR_INIT_EN (0x1 << 3)
  171. #define HPOUTR_MUTE_MASK BIT(2)
  172. #define HPOUTR_MUTE (0x0 << 2)
  173. #define HPOUTR_UNMUTE (0x1 << 2)
  174. /* REG28: HPOUTL_GAIN_CTRL */
  175. #define HPOUTL_GAIN_MASK GENMASK(4, 0)
  176. /* REG29: HPOUTR_GAIN_CTRL */
  177. #define HPOUTR_GAIN_MASK GENMASK(4, 0)
  178. /* REG2a: HPOUT_POP_CTRL */
  179. #define HPOUTR_POP_MASK GENMASK(5, 4)
  180. #define HPOUTR_POP_XCHARGE (0x1 << 4)
  181. #define HPOUTR_POP_WORK (0x2 << 4)
  182. #define HPOUTL_POP_MASK GENMASK(1, 0)
  183. #define HPOUTL_POP_XCHARGE (0x1 << 0)
  184. #define HPOUTL_POP_WORK (0x2 << 0)
  185. #define RK3328_HIFI 0
  186. struct rk3328_reg_msk_val {
  187. unsigned int reg;
  188. unsigned int msk;
  189. unsigned int val;
  190. };
  191. #endif