pcm512x.h 9.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Driver for the PCM512x CODECs
  4. *
  5. * Author: Mark Brown <broonie@kernel.org>
  6. * Copyright 2014 Linaro Ltd
  7. */
  8. #ifndef _SND_SOC_PCM512X
  9. #define _SND_SOC_PCM512X
  10. #include <linux/pm.h>
  11. #include <linux/regmap.h>
  12. #define PCM512x_VIRT_BASE 0x100
  13. #define PCM512x_PAGE_LEN 0x100
  14. #define PCM512x_PAGE_BASE(n) (PCM512x_VIRT_BASE + (PCM512x_PAGE_LEN * n))
  15. #define PCM512x_PAGE 0
  16. #define PCM512x_RESET (PCM512x_PAGE_BASE(0) + 1)
  17. #define PCM512x_POWER (PCM512x_PAGE_BASE(0) + 2)
  18. #define PCM512x_MUTE (PCM512x_PAGE_BASE(0) + 3)
  19. #define PCM512x_PLL_EN (PCM512x_PAGE_BASE(0) + 4)
  20. #define PCM512x_SPI_MISO_FUNCTION (PCM512x_PAGE_BASE(0) + 6)
  21. #define PCM512x_DSP (PCM512x_PAGE_BASE(0) + 7)
  22. #define PCM512x_GPIO_EN (PCM512x_PAGE_BASE(0) + 8)
  23. #define PCM512x_BCLK_LRCLK_CFG (PCM512x_PAGE_BASE(0) + 9)
  24. #define PCM512x_DSP_GPIO_INPUT (PCM512x_PAGE_BASE(0) + 10)
  25. #define PCM512x_MASTER_MODE (PCM512x_PAGE_BASE(0) + 12)
  26. #define PCM512x_PLL_REF (PCM512x_PAGE_BASE(0) + 13)
  27. #define PCM512x_DAC_REF (PCM512x_PAGE_BASE(0) + 14)
  28. #define PCM512x_GPIO_DACIN (PCM512x_PAGE_BASE(0) + 16)
  29. #define PCM512x_GPIO_PLLIN (PCM512x_PAGE_BASE(0) + 18)
  30. #define PCM512x_SYNCHRONIZE (PCM512x_PAGE_BASE(0) + 19)
  31. #define PCM512x_PLL_COEFF_0 (PCM512x_PAGE_BASE(0) + 20)
  32. #define PCM512x_PLL_COEFF_1 (PCM512x_PAGE_BASE(0) + 21)
  33. #define PCM512x_PLL_COEFF_2 (PCM512x_PAGE_BASE(0) + 22)
  34. #define PCM512x_PLL_COEFF_3 (PCM512x_PAGE_BASE(0) + 23)
  35. #define PCM512x_PLL_COEFF_4 (PCM512x_PAGE_BASE(0) + 24)
  36. #define PCM512x_DSP_CLKDIV (PCM512x_PAGE_BASE(0) + 27)
  37. #define PCM512x_DAC_CLKDIV (PCM512x_PAGE_BASE(0) + 28)
  38. #define PCM512x_NCP_CLKDIV (PCM512x_PAGE_BASE(0) + 29)
  39. #define PCM512x_OSR_CLKDIV (PCM512x_PAGE_BASE(0) + 30)
  40. #define PCM512x_MASTER_CLKDIV_1 (PCM512x_PAGE_BASE(0) + 32)
  41. #define PCM512x_MASTER_CLKDIV_2 (PCM512x_PAGE_BASE(0) + 33)
  42. #define PCM512x_FS_SPEED_MODE (PCM512x_PAGE_BASE(0) + 34)
  43. #define PCM512x_IDAC_1 (PCM512x_PAGE_BASE(0) + 35)
  44. #define PCM512x_IDAC_2 (PCM512x_PAGE_BASE(0) + 36)
  45. #define PCM512x_ERROR_DETECT (PCM512x_PAGE_BASE(0) + 37)
  46. #define PCM512x_I2S_1 (PCM512x_PAGE_BASE(0) + 40)
  47. #define PCM512x_I2S_2 (PCM512x_PAGE_BASE(0) + 41)
  48. #define PCM512x_DAC_ROUTING (PCM512x_PAGE_BASE(0) + 42)
  49. #define PCM512x_DSP_PROGRAM (PCM512x_PAGE_BASE(0) + 43)
  50. #define PCM512x_CLKDET (PCM512x_PAGE_BASE(0) + 44)
  51. #define PCM512x_AUTO_MUTE (PCM512x_PAGE_BASE(0) + 59)
  52. #define PCM512x_DIGITAL_VOLUME_1 (PCM512x_PAGE_BASE(0) + 60)
  53. #define PCM512x_DIGITAL_VOLUME_2 (PCM512x_PAGE_BASE(0) + 61)
  54. #define PCM512x_DIGITAL_VOLUME_3 (PCM512x_PAGE_BASE(0) + 62)
  55. #define PCM512x_DIGITAL_MUTE_1 (PCM512x_PAGE_BASE(0) + 63)
  56. #define PCM512x_DIGITAL_MUTE_2 (PCM512x_PAGE_BASE(0) + 64)
  57. #define PCM512x_DIGITAL_MUTE_3 (PCM512x_PAGE_BASE(0) + 65)
  58. #define PCM512x_GPIO_OUTPUT_1 (PCM512x_PAGE_BASE(0) + 80)
  59. #define PCM512x_GPIO_OUTPUT_2 (PCM512x_PAGE_BASE(0) + 81)
  60. #define PCM512x_GPIO_OUTPUT_3 (PCM512x_PAGE_BASE(0) + 82)
  61. #define PCM512x_GPIO_OUTPUT_4 (PCM512x_PAGE_BASE(0) + 83)
  62. #define PCM512x_GPIO_OUTPUT_5 (PCM512x_PAGE_BASE(0) + 84)
  63. #define PCM512x_GPIO_OUTPUT_6 (PCM512x_PAGE_BASE(0) + 85)
  64. #define PCM512x_GPIO_CONTROL_1 (PCM512x_PAGE_BASE(0) + 86)
  65. #define PCM512x_GPIO_CONTROL_2 (PCM512x_PAGE_BASE(0) + 87)
  66. #define PCM512x_OVERFLOW (PCM512x_PAGE_BASE(0) + 90)
  67. #define PCM512x_RATE_DET_1 (PCM512x_PAGE_BASE(0) + 91)
  68. #define PCM512x_RATE_DET_2 (PCM512x_PAGE_BASE(0) + 92)
  69. #define PCM512x_RATE_DET_3 (PCM512x_PAGE_BASE(0) + 93)
  70. #define PCM512x_RATE_DET_4 (PCM512x_PAGE_BASE(0) + 94)
  71. #define PCM512x_CLOCK_STATUS (PCM512x_PAGE_BASE(0) + 95)
  72. #define PCM512x_ANALOG_MUTE_DET (PCM512x_PAGE_BASE(0) + 108)
  73. #define PCM512x_GPIN (PCM512x_PAGE_BASE(0) + 119)
  74. #define PCM512x_DIGITAL_MUTE_DET (PCM512x_PAGE_BASE(0) + 120)
  75. #define PCM512x_OUTPUT_AMPLITUDE (PCM512x_PAGE_BASE(1) + 1)
  76. #define PCM512x_ANALOG_GAIN_CTRL (PCM512x_PAGE_BASE(1) + 2)
  77. #define PCM512x_UNDERVOLTAGE_PROT (PCM512x_PAGE_BASE(1) + 5)
  78. #define PCM512x_ANALOG_MUTE_CTRL (PCM512x_PAGE_BASE(1) + 6)
  79. #define PCM512x_ANALOG_GAIN_BOOST (PCM512x_PAGE_BASE(1) + 7)
  80. #define PCM512x_VCOM_CTRL_1 (PCM512x_PAGE_BASE(1) + 8)
  81. #define PCM512x_VCOM_CTRL_2 (PCM512x_PAGE_BASE(1) + 9)
  82. #define PCM512x_CRAM_CTRL (PCM512x_PAGE_BASE(44) + 1)
  83. #define PCM512x_FLEX_A (PCM512x_PAGE_BASE(253) + 63)
  84. #define PCM512x_FLEX_B (PCM512x_PAGE_BASE(253) + 64)
  85. #define PCM512x_MAX_REGISTER (PCM512x_PAGE_BASE(253) + 64)
  86. /* Page 0, Register 1 - reset */
  87. #define PCM512x_RSTR (1 << 0)
  88. #define PCM512x_RSTM (1 << 4)
  89. /* Page 0, Register 2 - power */
  90. #define PCM512x_RQPD (1 << 0)
  91. #define PCM512x_RQPD_SHIFT 0
  92. #define PCM512x_RQST (1 << 4)
  93. #define PCM512x_RQST_SHIFT 4
  94. /* Page 0, Register 3 - mute */
  95. #define PCM512x_RQMR (1 << 0)
  96. #define PCM512x_RQMR_SHIFT 0
  97. #define PCM512x_RQML (1 << 4)
  98. #define PCM512x_RQML_SHIFT 4
  99. /* Page 0, Register 4 - PLL */
  100. #define PCM512x_PLLE (1 << 0)
  101. #define PCM512x_PLLE_SHIFT 0
  102. #define PCM512x_PLCK (1 << 4)
  103. #define PCM512x_PLCK_SHIFT 4
  104. /* Page 0, Register 7 - DSP */
  105. #define PCM512x_SDSL (1 << 0)
  106. #define PCM512x_SDSL_SHIFT 0
  107. #define PCM512x_DEMP (1 << 4)
  108. #define PCM512x_DEMP_SHIFT 4
  109. /* Page 0, Register 8 - GPIO output enable */
  110. #define PCM512x_G1OE (1 << 0)
  111. #define PCM512x_G2OE (1 << 1)
  112. #define PCM512x_G3OE (1 << 2)
  113. #define PCM512x_G4OE (1 << 3)
  114. #define PCM512x_G5OE (1 << 4)
  115. #define PCM512x_G6OE (1 << 5)
  116. /* Page 0, Register 9 - BCK, LRCLK configuration */
  117. #define PCM512x_LRKO (1 << 0)
  118. #define PCM512x_LRKO_SHIFT 0
  119. #define PCM512x_BCKO (1 << 4)
  120. #define PCM512x_BCKO_SHIFT 4
  121. #define PCM512x_BCKP (1 << 5)
  122. #define PCM512x_BCKP_SHIFT 5
  123. /* Page 0, Register 12 - Master mode BCK, LRCLK reset */
  124. #define PCM512x_RLRK (1 << 0)
  125. #define PCM512x_RLRK_SHIFT 0
  126. #define PCM512x_RBCK (1 << 1)
  127. #define PCM512x_RBCK_SHIFT 1
  128. /* Page 0, Register 13 - PLL reference */
  129. #define PCM512x_SREF (7 << 4)
  130. #define PCM512x_SREF_SHIFT 4
  131. #define PCM512x_SREF_SCK (0 << 4)
  132. #define PCM512x_SREF_BCK (1 << 4)
  133. #define PCM512x_SREF_GPIO (3 << 4)
  134. /* Page 0, Register 14 - DAC reference */
  135. #define PCM512x_SDAC (7 << 4)
  136. #define PCM512x_SDAC_SHIFT 4
  137. #define PCM512x_SDAC_MCK (0 << 4)
  138. #define PCM512x_SDAC_PLL (1 << 4)
  139. #define PCM512x_SDAC_SCK (3 << 4)
  140. #define PCM512x_SDAC_BCK (4 << 4)
  141. #define PCM512x_SDAC_GPIO (5 << 4)
  142. /* Page 0, Register 16, 18 - GPIO source for DAC, PLL */
  143. #define PCM512x_GREF (7 << 0)
  144. #define PCM512x_GREF_SHIFT 0
  145. #define PCM512x_GREF_GPIO1 (0 << 0)
  146. #define PCM512x_GREF_GPIO2 (1 << 0)
  147. #define PCM512x_GREF_GPIO3 (2 << 0)
  148. #define PCM512x_GREF_GPIO4 (3 << 0)
  149. #define PCM512x_GREF_GPIO5 (4 << 0)
  150. #define PCM512x_GREF_GPIO6 (5 << 0)
  151. /* Page 0, Register 19 - synchronize */
  152. #define PCM512x_RQSY (1 << 0)
  153. #define PCM512x_RQSY_RESUME (0 << 0)
  154. #define PCM512x_RQSY_HALT (1 << 0)
  155. /* Page 0, Register 34 - fs speed mode */
  156. #define PCM512x_FSSP (3 << 0)
  157. #define PCM512x_FSSP_SHIFT 0
  158. #define PCM512x_FSSP_48KHZ (0 << 0)
  159. #define PCM512x_FSSP_96KHZ (1 << 0)
  160. #define PCM512x_FSSP_192KHZ (2 << 0)
  161. #define PCM512x_FSSP_384KHZ (3 << 0)
  162. /* Page 0, Register 37 - Error detection */
  163. #define PCM512x_IPLK (1 << 0)
  164. #define PCM512x_DCAS (1 << 1)
  165. #define PCM512x_IDCM (1 << 2)
  166. #define PCM512x_IDCH (1 << 3)
  167. #define PCM512x_IDSK (1 << 4)
  168. #define PCM512x_IDBK (1 << 5)
  169. #define PCM512x_IDFS (1 << 6)
  170. /* Page 0, Register 40 - I2S configuration */
  171. #define PCM512x_ALEN (3 << 0)
  172. #define PCM512x_ALEN_SHIFT 0
  173. #define PCM512x_ALEN_16 (0 << 0)
  174. #define PCM512x_ALEN_20 (1 << 0)
  175. #define PCM512x_ALEN_24 (2 << 0)
  176. #define PCM512x_ALEN_32 (3 << 0)
  177. #define PCM512x_AFMT (3 << 4)
  178. #define PCM512x_AFMT_SHIFT 4
  179. #define PCM512x_AFMT_I2S (0 << 4)
  180. #define PCM512x_AFMT_DSP (1 << 4)
  181. #define PCM512x_AFMT_RTJ (2 << 4)
  182. #define PCM512x_AFMT_LTJ (3 << 4)
  183. /* Page 0, Register 42 - DAC routing */
  184. #define PCM512x_AUPR_SHIFT 0
  185. #define PCM512x_AUPL_SHIFT 4
  186. /* Page 0, Register 59 - auto mute */
  187. #define PCM512x_ATMR_SHIFT 0
  188. #define PCM512x_ATML_SHIFT 4
  189. /* Page 0, Register 63 - ramp rates */
  190. #define PCM512x_VNDF_SHIFT 6
  191. #define PCM512x_VNDS_SHIFT 4
  192. #define PCM512x_VNUF_SHIFT 2
  193. #define PCM512x_VNUS_SHIFT 0
  194. /* Page 0, Register 64 - emergency ramp rates */
  195. #define PCM512x_VEDF_SHIFT 6
  196. #define PCM512x_VEDS_SHIFT 4
  197. /* Page 0, Register 65 - Digital mute enables */
  198. #define PCM512x_ACTL_SHIFT 2
  199. #define PCM512x_AMLE_SHIFT 1
  200. #define PCM512x_AMRE_SHIFT 0
  201. /* Page 0, Register 80-85, GPIO output selection */
  202. #define PCM512x_GxSL (31 << 0)
  203. #define PCM512x_GxSL_SHIFT 0
  204. #define PCM512x_GxSL_OFF (0 << 0)
  205. #define PCM512x_GxSL_DSP (1 << 0)
  206. #define PCM512x_GxSL_REG (2 << 0)
  207. #define PCM512x_GxSL_AMUTB (3 << 0)
  208. #define PCM512x_GxSL_AMUTL (4 << 0)
  209. #define PCM512x_GxSL_AMUTR (5 << 0)
  210. #define PCM512x_GxSL_CLKI (6 << 0)
  211. #define PCM512x_GxSL_SDOUT (7 << 0)
  212. #define PCM512x_GxSL_ANMUL (8 << 0)
  213. #define PCM512x_GxSL_ANMUR (9 << 0)
  214. #define PCM512x_GxSL_PLLLK (10 << 0)
  215. #define PCM512x_GxSL_CPCLK (11 << 0)
  216. #define PCM512x_GxSL_UV0_7 (14 << 0)
  217. #define PCM512x_GxSL_UV0_3 (15 << 0)
  218. #define PCM512x_GxSL_PLLCK (16 << 0)
  219. /* Page 1, Register 2 - analog volume control */
  220. #define PCM512x_RAGN_SHIFT 0
  221. #define PCM512x_LAGN_SHIFT 4
  222. /* Page 1, Register 7 - analog boost control */
  223. #define PCM512x_AGBR_SHIFT 0
  224. #define PCM512x_AGBL_SHIFT 4
  225. extern const struct dev_pm_ops pcm512x_pm_ops;
  226. extern const struct regmap_config pcm512x_regmap;
  227. int pcm512x_probe(struct device *dev, struct regmap *regmap);
  228. void pcm512x_remove(struct device *dev);
  229. #endif