pcm3060.c 8.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // PCM3060 codec driver
  4. //
  5. // Copyright (C) 2018 Kirill Marinushkin <kmarinushkin@birdec.com>
  6. #include <linux/module.h>
  7. #include <sound/pcm_params.h>
  8. #include <sound/soc.h>
  9. #include <sound/tlv.h>
  10. #include "pcm3060.h"
  11. /* dai */
  12. static int pcm3060_set_sysclk(struct snd_soc_dai *dai, int clk_id,
  13. unsigned int freq, int dir)
  14. {
  15. struct snd_soc_component *comp = dai->component;
  16. struct pcm3060_priv *priv = snd_soc_component_get_drvdata(comp);
  17. unsigned int reg;
  18. unsigned int val;
  19. if (dir != SND_SOC_CLOCK_IN) {
  20. dev_err(comp->dev, "unsupported sysclock dir: %d\n", dir);
  21. return -EINVAL;
  22. }
  23. switch (clk_id) {
  24. case PCM3060_CLK_DEF:
  25. val = 0;
  26. break;
  27. case PCM3060_CLK1:
  28. val = (dai->id == PCM3060_DAI_ID_DAC ? PCM3060_REG_CSEL : 0);
  29. break;
  30. case PCM3060_CLK2:
  31. val = (dai->id == PCM3060_DAI_ID_DAC ? 0 : PCM3060_REG_CSEL);
  32. break;
  33. default:
  34. dev_err(comp->dev, "unsupported sysclock id: %d\n", clk_id);
  35. return -EINVAL;
  36. }
  37. if (dai->id == PCM3060_DAI_ID_DAC)
  38. reg = PCM3060_REG67;
  39. else
  40. reg = PCM3060_REG72;
  41. regmap_update_bits(priv->regmap, reg, PCM3060_REG_CSEL, val);
  42. priv->dai[dai->id].sclk_freq = freq;
  43. return 0;
  44. }
  45. static int pcm3060_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  46. {
  47. struct snd_soc_component *comp = dai->component;
  48. struct pcm3060_priv *priv = snd_soc_component_get_drvdata(comp);
  49. unsigned int reg;
  50. unsigned int val;
  51. if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
  52. dev_err(comp->dev, "unsupported DAI polarity: 0x%x\n", fmt);
  53. return -EINVAL;
  54. }
  55. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  56. case SND_SOC_DAIFMT_CBM_CFM:
  57. priv->dai[dai->id].is_master = true;
  58. break;
  59. case SND_SOC_DAIFMT_CBS_CFS:
  60. priv->dai[dai->id].is_master = false;
  61. break;
  62. default:
  63. dev_err(comp->dev, "unsupported DAI master mode: 0x%x\n", fmt);
  64. return -EINVAL;
  65. }
  66. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  67. case SND_SOC_DAIFMT_I2S:
  68. val = PCM3060_REG_FMT_I2S;
  69. break;
  70. case SND_SOC_DAIFMT_RIGHT_J:
  71. val = PCM3060_REG_FMT_RJ;
  72. break;
  73. case SND_SOC_DAIFMT_LEFT_J:
  74. val = PCM3060_REG_FMT_LJ;
  75. break;
  76. default:
  77. dev_err(comp->dev, "unsupported DAI format: 0x%x\n", fmt);
  78. return -EINVAL;
  79. }
  80. if (dai->id == PCM3060_DAI_ID_DAC)
  81. reg = PCM3060_REG67;
  82. else
  83. reg = PCM3060_REG72;
  84. regmap_update_bits(priv->regmap, reg, PCM3060_REG_MASK_FMT, val);
  85. return 0;
  86. }
  87. static int pcm3060_hw_params(struct snd_pcm_substream *substream,
  88. struct snd_pcm_hw_params *params,
  89. struct snd_soc_dai *dai)
  90. {
  91. struct snd_soc_component *comp = dai->component;
  92. struct pcm3060_priv *priv = snd_soc_component_get_drvdata(comp);
  93. unsigned int rate;
  94. unsigned int ratio;
  95. unsigned int reg;
  96. unsigned int val;
  97. if (!priv->dai[dai->id].is_master) {
  98. val = PCM3060_REG_MS_S;
  99. goto val_ready;
  100. }
  101. rate = params_rate(params);
  102. if (!rate) {
  103. dev_err(comp->dev, "rate is not configured\n");
  104. return -EINVAL;
  105. }
  106. ratio = priv->dai[dai->id].sclk_freq / rate;
  107. switch (ratio) {
  108. case 768:
  109. val = PCM3060_REG_MS_M768;
  110. break;
  111. case 512:
  112. val = PCM3060_REG_MS_M512;
  113. break;
  114. case 384:
  115. val = PCM3060_REG_MS_M384;
  116. break;
  117. case 256:
  118. val = PCM3060_REG_MS_M256;
  119. break;
  120. case 192:
  121. val = PCM3060_REG_MS_M192;
  122. break;
  123. case 128:
  124. val = PCM3060_REG_MS_M128;
  125. break;
  126. default:
  127. dev_err(comp->dev, "unsupported ratio: %d\n", ratio);
  128. return -EINVAL;
  129. }
  130. val_ready:
  131. if (dai->id == PCM3060_DAI_ID_DAC)
  132. reg = PCM3060_REG67;
  133. else
  134. reg = PCM3060_REG72;
  135. regmap_update_bits(priv->regmap, reg, PCM3060_REG_MASK_MS, val);
  136. return 0;
  137. }
  138. static const struct snd_soc_dai_ops pcm3060_dai_ops = {
  139. .set_sysclk = pcm3060_set_sysclk,
  140. .set_fmt = pcm3060_set_fmt,
  141. .hw_params = pcm3060_hw_params,
  142. };
  143. #define PCM3060_DAI_RATES_ADC (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | \
  144. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
  145. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
  146. #define PCM3060_DAI_RATES_DAC (PCM3060_DAI_RATES_ADC | \
  147. SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
  148. static struct snd_soc_dai_driver pcm3060_dai[] = {
  149. {
  150. .name = "pcm3060-dac",
  151. .id = PCM3060_DAI_ID_DAC,
  152. .playback = {
  153. .stream_name = "Playback",
  154. .channels_min = 2,
  155. .channels_max = 2,
  156. .rates = PCM3060_DAI_RATES_DAC,
  157. .formats = SNDRV_PCM_FMTBIT_S24_LE,
  158. },
  159. .ops = &pcm3060_dai_ops,
  160. },
  161. {
  162. .name = "pcm3060-adc",
  163. .id = PCM3060_DAI_ID_ADC,
  164. .capture = {
  165. .stream_name = "Capture",
  166. .channels_min = 2,
  167. .channels_max = 2,
  168. .rates = PCM3060_DAI_RATES_ADC,
  169. .formats = SNDRV_PCM_FMTBIT_S24_LE,
  170. },
  171. .ops = &pcm3060_dai_ops,
  172. },
  173. };
  174. /* dapm */
  175. static DECLARE_TLV_DB_SCALE(pcm3060_dapm_tlv, -10050, 50, 1);
  176. static const struct snd_kcontrol_new pcm3060_dapm_controls[] = {
  177. SOC_DOUBLE_R_RANGE_TLV("Master Playback Volume",
  178. PCM3060_REG65, PCM3060_REG66, 0,
  179. PCM3060_REG_AT2_MIN, PCM3060_REG_AT2_MAX,
  180. 0, pcm3060_dapm_tlv),
  181. SOC_DOUBLE("Master Playback Switch", PCM3060_REG68,
  182. PCM3060_REG_SHIFT_MUT21, PCM3060_REG_SHIFT_MUT22, 1, 1),
  183. SOC_DOUBLE_R_RANGE_TLV("Master Capture Volume",
  184. PCM3060_REG70, PCM3060_REG71, 0,
  185. PCM3060_REG_AT1_MIN, PCM3060_REG_AT1_MAX,
  186. 0, pcm3060_dapm_tlv),
  187. SOC_DOUBLE("Master Capture Switch", PCM3060_REG73,
  188. PCM3060_REG_SHIFT_MUT11, PCM3060_REG_SHIFT_MUT12, 1, 1),
  189. };
  190. static const struct snd_soc_dapm_widget pcm3060_dapm_widgets[] = {
  191. SND_SOC_DAPM_DAC("DAC", "Playback", PCM3060_REG64,
  192. PCM3060_REG_SHIFT_DAPSV, 1),
  193. SND_SOC_DAPM_OUTPUT("OUTL"),
  194. SND_SOC_DAPM_OUTPUT("OUTR"),
  195. SND_SOC_DAPM_INPUT("INL"),
  196. SND_SOC_DAPM_INPUT("INR"),
  197. SND_SOC_DAPM_ADC("ADC", "Capture", PCM3060_REG64,
  198. PCM3060_REG_SHIFT_ADPSV, 1),
  199. };
  200. static const struct snd_soc_dapm_route pcm3060_dapm_map[] = {
  201. { "OUTL", NULL, "DAC" },
  202. { "OUTR", NULL, "DAC" },
  203. { "ADC", NULL, "INL" },
  204. { "ADC", NULL, "INR" },
  205. };
  206. /* soc component */
  207. static const struct snd_soc_component_driver pcm3060_soc_comp_driver = {
  208. .controls = pcm3060_dapm_controls,
  209. .num_controls = ARRAY_SIZE(pcm3060_dapm_controls),
  210. .dapm_widgets = pcm3060_dapm_widgets,
  211. .num_dapm_widgets = ARRAY_SIZE(pcm3060_dapm_widgets),
  212. .dapm_routes = pcm3060_dapm_map,
  213. .num_dapm_routes = ARRAY_SIZE(pcm3060_dapm_map),
  214. };
  215. /* regmap */
  216. static bool pcm3060_reg_writeable(struct device *dev, unsigned int reg)
  217. {
  218. return (reg >= PCM3060_REG64);
  219. }
  220. static bool pcm3060_reg_readable(struct device *dev, unsigned int reg)
  221. {
  222. return (reg >= PCM3060_REG64);
  223. }
  224. static bool pcm3060_reg_volatile(struct device *dev, unsigned int reg)
  225. {
  226. /* PCM3060_REG64 is volatile */
  227. return (reg == PCM3060_REG64);
  228. }
  229. static const struct reg_default pcm3060_reg_defaults[] = {
  230. { PCM3060_REG64, 0xF0 },
  231. { PCM3060_REG65, 0xFF },
  232. { PCM3060_REG66, 0xFF },
  233. { PCM3060_REG67, 0x00 },
  234. { PCM3060_REG68, 0x00 },
  235. { PCM3060_REG69, 0x00 },
  236. { PCM3060_REG70, 0xD7 },
  237. { PCM3060_REG71, 0xD7 },
  238. { PCM3060_REG72, 0x00 },
  239. { PCM3060_REG73, 0x00 },
  240. };
  241. const struct regmap_config pcm3060_regmap = {
  242. .reg_bits = 8,
  243. .val_bits = 8,
  244. .writeable_reg = pcm3060_reg_writeable,
  245. .readable_reg = pcm3060_reg_readable,
  246. .volatile_reg = pcm3060_reg_volatile,
  247. .max_register = PCM3060_REG73,
  248. .reg_defaults = pcm3060_reg_defaults,
  249. .num_reg_defaults = ARRAY_SIZE(pcm3060_reg_defaults),
  250. .cache_type = REGCACHE_RBTREE,
  251. };
  252. EXPORT_SYMBOL(pcm3060_regmap);
  253. /* device */
  254. static void pcm3060_parse_dt(const struct device_node *np,
  255. struct pcm3060_priv *priv)
  256. {
  257. priv->out_se = of_property_read_bool(np, "ti,out-single-ended");
  258. }
  259. int pcm3060_probe(struct device *dev)
  260. {
  261. int rc;
  262. struct pcm3060_priv *priv = dev_get_drvdata(dev);
  263. /* soft reset */
  264. rc = regmap_update_bits(priv->regmap, PCM3060_REG64,
  265. PCM3060_REG_MRST, 0);
  266. if (rc) {
  267. dev_err(dev, "failed to reset component, rc=%d\n", rc);
  268. return rc;
  269. }
  270. if (dev->of_node)
  271. pcm3060_parse_dt(dev->of_node, priv);
  272. if (priv->out_se)
  273. regmap_update_bits(priv->regmap, PCM3060_REG64,
  274. PCM3060_REG_SE, PCM3060_REG_SE);
  275. rc = devm_snd_soc_register_component(dev, &pcm3060_soc_comp_driver,
  276. pcm3060_dai,
  277. ARRAY_SIZE(pcm3060_dai));
  278. if (rc) {
  279. dev_err(dev, "failed to register component, rc=%d\n", rc);
  280. return rc;
  281. }
  282. return 0;
  283. }
  284. EXPORT_SYMBOL(pcm3060_probe);
  285. MODULE_DESCRIPTION("PCM3060 codec driver");
  286. MODULE_AUTHOR("Kirill Marinushkin <kmarinushkin@birdec.com>");
  287. MODULE_LICENSE("GPL v2");