mt6660.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2019 MediaTek Inc.
  3. #include <linux/module.h>
  4. #include <linux/kernel.h>
  5. #include <linux/err.h>
  6. #include <linux/i2c.h>
  7. #include <linux/pm_runtime.h>
  8. #include <linux/delay.h>
  9. #include <sound/soc.h>
  10. #include <sound/tlv.h>
  11. #include <sound/pcm_params.h>
  12. #include "mt6660.h"
  13. struct reg_size_table {
  14. u32 addr;
  15. u8 size;
  16. };
  17. static const struct reg_size_table mt6660_reg_size_table[] = {
  18. { MT6660_REG_HPF1_COEF, 4 },
  19. { MT6660_REG_HPF2_COEF, 4 },
  20. { MT6660_REG_TDM_CFG3, 2 },
  21. { MT6660_REG_RESV17, 2 },
  22. { MT6660_REG_RESV23, 2 },
  23. { MT6660_REG_SIGMAX, 2 },
  24. { MT6660_REG_DEVID, 2 },
  25. { MT6660_REG_HCLIP_CTRL, 2 },
  26. { MT6660_REG_DA_GAIN, 2 },
  27. };
  28. static int mt6660_get_reg_size(uint32_t addr)
  29. {
  30. int i;
  31. for (i = 0; i < ARRAY_SIZE(mt6660_reg_size_table); i++) {
  32. if (mt6660_reg_size_table[i].addr == addr)
  33. return mt6660_reg_size_table[i].size;
  34. }
  35. return 1;
  36. }
  37. static int mt6660_reg_write(void *context, unsigned int reg, unsigned int val)
  38. {
  39. struct mt6660_chip *chip = context;
  40. int size = mt6660_get_reg_size(reg);
  41. u8 reg_data[4];
  42. int i, ret;
  43. for (i = 0; i < size; i++)
  44. reg_data[size - i - 1] = (val >> (8 * i)) & 0xff;
  45. ret = i2c_smbus_write_i2c_block_data(chip->i2c, reg, size, reg_data);
  46. return ret;
  47. }
  48. static int mt6660_reg_read(void *context, unsigned int reg, unsigned int *val)
  49. {
  50. struct mt6660_chip *chip = context;
  51. int size = mt6660_get_reg_size(reg);
  52. int i, ret;
  53. u8 data[4];
  54. u32 reg_data = 0;
  55. ret = i2c_smbus_read_i2c_block_data(chip->i2c, reg, size, data);
  56. if (ret < 0)
  57. return ret;
  58. for (i = 0; i < size; i++) {
  59. reg_data <<= 8;
  60. reg_data |= data[i];
  61. }
  62. *val = reg_data;
  63. return 0;
  64. }
  65. static const struct regmap_config mt6660_regmap_config = {
  66. .reg_bits = 8,
  67. .val_bits = 32,
  68. .reg_write = mt6660_reg_write,
  69. .reg_read = mt6660_reg_read,
  70. };
  71. static int mt6660_codec_dac_event(struct snd_soc_dapm_widget *w,
  72. struct snd_kcontrol *kcontrol, int event)
  73. {
  74. if (event == SND_SOC_DAPM_POST_PMU)
  75. usleep_range(1000, 1100);
  76. return 0;
  77. }
  78. static int mt6660_codec_classd_event(struct snd_soc_dapm_widget *w,
  79. struct snd_kcontrol *kcontrol, int event)
  80. {
  81. struct snd_soc_component *component =
  82. snd_soc_dapm_to_component(w->dapm);
  83. int ret;
  84. switch (event) {
  85. case SND_SOC_DAPM_PRE_PMU:
  86. dev_dbg(component->dev,
  87. "%s: before classd turn on\n", __func__);
  88. /* config to adaptive mode */
  89. ret = snd_soc_component_update_bits(component,
  90. MT6660_REG_BST_CTRL, 0x03, 0x03);
  91. if (ret < 0) {
  92. dev_err(component->dev, "config mode adaptive fail\n");
  93. return ret;
  94. }
  95. break;
  96. case SND_SOC_DAPM_POST_PMU:
  97. /* voltage sensing enable */
  98. ret = snd_soc_component_update_bits(component,
  99. MT6660_REG_RESV7, 0x04, 0x04);
  100. if (ret < 0) {
  101. dev_err(component->dev,
  102. "enable voltage sensing fail\n");
  103. return ret;
  104. }
  105. dev_dbg(component->dev, "Amp on\n");
  106. break;
  107. case SND_SOC_DAPM_PRE_PMD:
  108. dev_dbg(component->dev, "Amp off\n");
  109. /* voltage sensing disable */
  110. ret = snd_soc_component_update_bits(component,
  111. MT6660_REG_RESV7, 0x04, 0x00);
  112. if (ret < 0) {
  113. dev_err(component->dev,
  114. "disable voltage sensing fail\n");
  115. return ret;
  116. }
  117. /* pop-noise improvement 1 */
  118. ret = snd_soc_component_update_bits(component,
  119. MT6660_REG_RESV10, 0x10, 0x10);
  120. if (ret < 0) {
  121. dev_err(component->dev,
  122. "pop-noise improvement 1 fail\n");
  123. return ret;
  124. }
  125. break;
  126. case SND_SOC_DAPM_POST_PMD:
  127. dev_dbg(component->dev,
  128. "%s: after classd turn off\n", __func__);
  129. /* pop-noise improvement 2 */
  130. ret = snd_soc_component_update_bits(component,
  131. MT6660_REG_RESV10, 0x10, 0x00);
  132. if (ret < 0) {
  133. dev_err(component->dev,
  134. "pop-noise improvement 2 fail\n");
  135. return ret;
  136. }
  137. /* config to off mode */
  138. ret = snd_soc_component_update_bits(component,
  139. MT6660_REG_BST_CTRL, 0x03, 0x00);
  140. if (ret < 0) {
  141. dev_err(component->dev, "config mode off fail\n");
  142. return ret;
  143. }
  144. break;
  145. }
  146. return 0;
  147. }
  148. static const struct snd_soc_dapm_widget mt6660_component_dapm_widgets[] = {
  149. SND_SOC_DAPM_DAC_E("DAC", NULL, MT6660_REG_PLL_CFG1,
  150. 0, 1, mt6660_codec_dac_event, SND_SOC_DAPM_POST_PMU),
  151. SND_SOC_DAPM_ADC("VI ADC", NULL, SND_SOC_NOPM, 0, 0),
  152. SND_SOC_DAPM_PGA("PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
  153. SND_SOC_DAPM_OUT_DRV_E("ClassD", MT6660_REG_SYSTEM_CTRL, 2, 0,
  154. NULL, 0, mt6660_codec_classd_event,
  155. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  156. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  157. SND_SOC_DAPM_OUTPUT("OUTP"),
  158. SND_SOC_DAPM_OUTPUT("OUTN"),
  159. };
  160. static const struct snd_soc_dapm_route mt6660_component_dapm_routes[] = {
  161. { "DAC", NULL, "aif_playback" },
  162. { "PGA", NULL, "DAC" },
  163. { "ClassD", NULL, "PGA" },
  164. { "OUTP", NULL, "ClassD" },
  165. { "OUTN", NULL, "ClassD" },
  166. { "VI ADC", NULL, "ClassD" },
  167. { "aif_capture", NULL, "VI ADC" },
  168. };
  169. static int mt6660_component_get_volsw(struct snd_kcontrol *kcontrol,
  170. struct snd_ctl_elem_value *ucontrol)
  171. {
  172. struct snd_soc_component *component =
  173. snd_soc_kcontrol_component(kcontrol);
  174. struct mt6660_chip *chip = (struct mt6660_chip *)
  175. snd_soc_component_get_drvdata(component);
  176. ucontrol->value.integer.value[0] = chip->chip_rev & 0x0f;
  177. return 0;
  178. }
  179. static const DECLARE_TLV_DB_SCALE(vol_ctl_tlv, -1155, 5, 0);
  180. static const struct snd_kcontrol_new mt6660_component_snd_controls[] = {
  181. SOC_SINGLE_TLV("Digital Volume", MT6660_REG_VOL_CTRL, 0, 255,
  182. 1, vol_ctl_tlv),
  183. SOC_SINGLE("Hard Clip Switch", MT6660_REG_HCLIP_CTRL, 8, 1, 0),
  184. SOC_SINGLE("Clip Switch", MT6660_REG_SPS_CTRL, 0, 1, 0),
  185. SOC_SINGLE("Boost Mode", MT6660_REG_BST_CTRL, 0, 3, 0),
  186. SOC_SINGLE("DRE Switch", MT6660_REG_DRE_CTRL, 0, 1, 0),
  187. SOC_SINGLE("DC Protect Switch", MT6660_REG_DC_PROTECT_CTRL, 3, 1, 0),
  188. SOC_SINGLE("Data Output Left Channel Selection",
  189. MT6660_REG_DATAO_SEL, 3, 7, 0),
  190. SOC_SINGLE("Data Output Right Channel Selection",
  191. MT6660_REG_DATAO_SEL, 0, 7, 0),
  192. SOC_SINGLE_EXT("T0 SEL", MT6660_REG_CALI_T0, 0, 7, 0,
  193. snd_soc_get_volsw, NULL),
  194. SOC_SINGLE_EXT("Chip Rev", MT6660_REG_DEVID, 8, 15, 0,
  195. mt6660_component_get_volsw, NULL),
  196. };
  197. static int _mt6660_chip_power_on(struct mt6660_chip *chip, int on_off)
  198. {
  199. return regmap_write_bits(chip->regmap, MT6660_REG_SYSTEM_CTRL,
  200. 0x01, on_off ? 0x00 : 0x01);
  201. }
  202. struct reg_table {
  203. uint32_t addr;
  204. uint32_t mask;
  205. uint32_t val;
  206. };
  207. static const struct reg_table mt6660_setting_table[] = {
  208. { 0x20, 0x80, 0x00 },
  209. { 0x30, 0x01, 0x00 },
  210. { 0x50, 0x1c, 0x04 },
  211. { 0xB1, 0x0c, 0x00 },
  212. { 0xD3, 0x03, 0x03 },
  213. { 0xE0, 0x01, 0x00 },
  214. { 0x98, 0x44, 0x04 },
  215. { 0xB9, 0xff, 0x82 },
  216. { 0xB7, 0x7777, 0x7273 },
  217. { 0xB6, 0x07, 0x03 },
  218. { 0x6B, 0xe0, 0x20 },
  219. { 0x07, 0xff, 0x70 },
  220. { 0xBB, 0xff, 0x20 },
  221. { 0x69, 0xff, 0x40 },
  222. { 0xBD, 0xffff, 0x17f8 },
  223. { 0x70, 0xff, 0x15 },
  224. { 0x7C, 0xff, 0x00 },
  225. { 0x46, 0xff, 0x1d },
  226. { 0x1A, 0xffffffff, 0x7fdb7ffe },
  227. { 0x1B, 0xffffffff, 0x7fdb7ffe },
  228. { 0x51, 0xff, 0x58 },
  229. { 0xA2, 0xff, 0xce },
  230. { 0x33, 0xffff, 0x7fff },
  231. { 0x4C, 0xffff, 0x0116 },
  232. { 0x16, 0x1800, 0x0800 },
  233. { 0x68, 0x1f, 0x07 },
  234. };
  235. static int mt6660_component_setting(struct snd_soc_component *component)
  236. {
  237. struct mt6660_chip *chip = snd_soc_component_get_drvdata(component);
  238. int ret = 0;
  239. size_t i = 0;
  240. ret = _mt6660_chip_power_on(chip, 1);
  241. if (ret < 0) {
  242. dev_err(component->dev, "%s chip power on failed\n", __func__);
  243. return ret;
  244. }
  245. for (i = 0; i < ARRAY_SIZE(mt6660_setting_table); i++) {
  246. ret = snd_soc_component_update_bits(component,
  247. mt6660_setting_table[i].addr,
  248. mt6660_setting_table[i].mask,
  249. mt6660_setting_table[i].val);
  250. if (ret < 0) {
  251. dev_err(component->dev, "%s update 0x%02x failed\n",
  252. __func__, mt6660_setting_table[i].addr);
  253. return ret;
  254. }
  255. }
  256. ret = _mt6660_chip_power_on(chip, 0);
  257. if (ret < 0) {
  258. dev_err(component->dev, "%s chip power off failed\n", __func__);
  259. return ret;
  260. }
  261. return 0;
  262. }
  263. static int mt6660_component_probe(struct snd_soc_component *component)
  264. {
  265. struct mt6660_chip *chip = snd_soc_component_get_drvdata(component);
  266. int ret;
  267. dev_dbg(component->dev, "%s\n", __func__);
  268. snd_soc_component_init_regmap(component, chip->regmap);
  269. ret = mt6660_component_setting(component);
  270. if (ret < 0)
  271. dev_err(chip->dev, "mt6660 component setting failed\n");
  272. return ret;
  273. }
  274. static void mt6660_component_remove(struct snd_soc_component *component)
  275. {
  276. dev_dbg(component->dev, "%s\n", __func__);
  277. snd_soc_component_exit_regmap(component);
  278. }
  279. static const struct snd_soc_component_driver mt6660_component_driver = {
  280. .probe = mt6660_component_probe,
  281. .remove = mt6660_component_remove,
  282. .controls = mt6660_component_snd_controls,
  283. .num_controls = ARRAY_SIZE(mt6660_component_snd_controls),
  284. .dapm_widgets = mt6660_component_dapm_widgets,
  285. .num_dapm_widgets = ARRAY_SIZE(mt6660_component_dapm_widgets),
  286. .dapm_routes = mt6660_component_dapm_routes,
  287. .num_dapm_routes = ARRAY_SIZE(mt6660_component_dapm_routes),
  288. .idle_bias_on = false, /* idle_bias_off = true */
  289. };
  290. static int mt6660_component_aif_hw_params(struct snd_pcm_substream *substream,
  291. struct snd_pcm_hw_params *hw_params, struct snd_soc_dai *dai)
  292. {
  293. int word_len = params_physical_width(hw_params);
  294. int aud_bit = params_width(hw_params);
  295. u16 reg_data = 0;
  296. int ret;
  297. dev_dbg(dai->dev, "%s: ++\n", __func__);
  298. dev_dbg(dai->dev, "format: 0x%08x\n", params_format(hw_params));
  299. dev_dbg(dai->dev, "rate: 0x%08x\n", params_rate(hw_params));
  300. dev_dbg(dai->dev, "word_len: %d, aud_bit: %d\n", word_len, aud_bit);
  301. if (word_len > 32 || word_len < 16) {
  302. dev_err(dai->dev, "not supported word length\n");
  303. return -ENOTSUPP;
  304. }
  305. switch (aud_bit) {
  306. case 16:
  307. reg_data = 3;
  308. break;
  309. case 18:
  310. reg_data = 2;
  311. break;
  312. case 20:
  313. reg_data = 1;
  314. break;
  315. case 24:
  316. case 32:
  317. reg_data = 0;
  318. break;
  319. default:
  320. return -ENOTSUPP;
  321. }
  322. ret = snd_soc_component_update_bits(dai->component,
  323. MT6660_REG_SERIAL_CFG1, 0xc0, (reg_data << 6));
  324. if (ret < 0) {
  325. dev_err(dai->dev, "config aud bit fail\n");
  326. return ret;
  327. }
  328. ret = snd_soc_component_update_bits(dai->component,
  329. MT6660_REG_TDM_CFG3, 0x3f0, word_len << 4);
  330. if (ret < 0) {
  331. dev_err(dai->dev, "config word len fail\n");
  332. return ret;
  333. }
  334. dev_dbg(dai->dev, "%s: --\n", __func__);
  335. return 0;
  336. }
  337. static const struct snd_soc_dai_ops mt6660_component_aif_ops = {
  338. .hw_params = mt6660_component_aif_hw_params,
  339. };
  340. #define STUB_RATES SNDRV_PCM_RATE_8000_192000
  341. #define STUB_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
  342. SNDRV_PCM_FMTBIT_U16_LE | \
  343. SNDRV_PCM_FMTBIT_S24_LE | \
  344. SNDRV_PCM_FMTBIT_U24_LE | \
  345. SNDRV_PCM_FMTBIT_S32_LE | \
  346. SNDRV_PCM_FMTBIT_U32_LE)
  347. static struct snd_soc_dai_driver mt6660_codec_dai = {
  348. .name = "mt6660-aif",
  349. .playback = {
  350. .stream_name = "aif_playback",
  351. .channels_min = 1,
  352. .channels_max = 2,
  353. .rates = STUB_RATES,
  354. .formats = STUB_FORMATS,
  355. },
  356. .capture = {
  357. .stream_name = "aif_capture",
  358. .channels_min = 1,
  359. .channels_max = 2,
  360. .rates = STUB_RATES,
  361. .formats = STUB_FORMATS,
  362. },
  363. /* dai properties */
  364. .symmetric_rates = 1,
  365. .symmetric_channels = 1,
  366. .symmetric_samplebits = 1,
  367. /* dai operations */
  368. .ops = &mt6660_component_aif_ops,
  369. };
  370. static int _mt6660_chip_id_check(struct mt6660_chip *chip)
  371. {
  372. int ret;
  373. unsigned int val;
  374. ret = regmap_read(chip->regmap, MT6660_REG_DEVID, &val);
  375. if (ret < 0)
  376. return ret;
  377. val &= 0x0ff0;
  378. if (val != 0x00e0 && val != 0x01e0) {
  379. dev_err(chip->dev, "%s id(%x) not match\n", __func__, val);
  380. return -ENODEV;
  381. }
  382. return 0;
  383. }
  384. static int _mt6660_chip_sw_reset(struct mt6660_chip *chip)
  385. {
  386. int ret;
  387. /* turn on main pll first, then trigger reset */
  388. ret = regmap_write(chip->regmap, MT6660_REG_SYSTEM_CTRL, 0x00);
  389. if (ret < 0)
  390. return ret;
  391. ret = regmap_write(chip->regmap, MT6660_REG_SYSTEM_CTRL, 0x80);
  392. if (ret < 0)
  393. return ret;
  394. msleep(30);
  395. return 0;
  396. }
  397. static int _mt6660_read_chip_revision(struct mt6660_chip *chip)
  398. {
  399. int ret;
  400. unsigned int val;
  401. ret = regmap_read(chip->regmap, MT6660_REG_DEVID, &val);
  402. if (ret < 0) {
  403. dev_err(chip->dev, "get chip revision fail\n");
  404. return ret;
  405. }
  406. chip->chip_rev = val&0xff;
  407. dev_info(chip->dev, "%s chip_rev = %x\n", __func__, chip->chip_rev);
  408. return 0;
  409. }
  410. static int mt6660_i2c_probe(struct i2c_client *client,
  411. const struct i2c_device_id *id)
  412. {
  413. struct mt6660_chip *chip = NULL;
  414. int ret;
  415. dev_dbg(&client->dev, "%s\n", __func__);
  416. chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
  417. if (!chip)
  418. return -ENOMEM;
  419. chip->i2c = client;
  420. chip->dev = &client->dev;
  421. mutex_init(&chip->io_lock);
  422. i2c_set_clientdata(client, chip);
  423. chip->regmap = devm_regmap_init(&client->dev,
  424. NULL, chip, &mt6660_regmap_config);
  425. if (IS_ERR(chip->regmap)) {
  426. ret = PTR_ERR(chip->regmap);
  427. dev_err(&client->dev, "failed to initialise regmap: %d\n", ret);
  428. return ret;
  429. }
  430. /* chip reset first */
  431. ret = _mt6660_chip_sw_reset(chip);
  432. if (ret < 0) {
  433. dev_err(chip->dev, "chip reset fail\n");
  434. goto probe_fail;
  435. }
  436. /* chip power on */
  437. ret = _mt6660_chip_power_on(chip, 1);
  438. if (ret < 0) {
  439. dev_err(chip->dev, "chip power on 2 fail\n");
  440. goto probe_fail;
  441. }
  442. /* chip devid check */
  443. ret = _mt6660_chip_id_check(chip);
  444. if (ret < 0) {
  445. dev_err(chip->dev, "chip id check fail\n");
  446. goto probe_fail;
  447. }
  448. /* chip revision get */
  449. ret = _mt6660_read_chip_revision(chip);
  450. if (ret < 0) {
  451. dev_err(chip->dev, "read chip revision fail\n");
  452. goto probe_fail;
  453. }
  454. pm_runtime_set_active(chip->dev);
  455. pm_runtime_enable(chip->dev);
  456. ret = devm_snd_soc_register_component(chip->dev,
  457. &mt6660_component_driver,
  458. &mt6660_codec_dai, 1);
  459. return ret;
  460. probe_fail:
  461. _mt6660_chip_power_on(chip, 0);
  462. mutex_destroy(&chip->io_lock);
  463. return ret;
  464. }
  465. static int mt6660_i2c_remove(struct i2c_client *client)
  466. {
  467. struct mt6660_chip *chip = i2c_get_clientdata(client);
  468. pm_runtime_disable(chip->dev);
  469. pm_runtime_set_suspended(chip->dev);
  470. mutex_destroy(&chip->io_lock);
  471. return 0;
  472. }
  473. static int __maybe_unused mt6660_i2c_runtime_suspend(struct device *dev)
  474. {
  475. struct mt6660_chip *chip = dev_get_drvdata(dev);
  476. dev_dbg(dev, "enter low power mode\n");
  477. return regmap_update_bits(chip->regmap,
  478. MT6660_REG_SYSTEM_CTRL, 0x01, 0x01);
  479. }
  480. static int __maybe_unused mt6660_i2c_runtime_resume(struct device *dev)
  481. {
  482. struct mt6660_chip *chip = dev_get_drvdata(dev);
  483. dev_dbg(dev, "exit low power mode\n");
  484. return regmap_update_bits(chip->regmap,
  485. MT6660_REG_SYSTEM_CTRL, 0x01, 0x00);
  486. }
  487. static const struct dev_pm_ops mt6660_dev_pm_ops = {
  488. SET_RUNTIME_PM_OPS(mt6660_i2c_runtime_suspend,
  489. mt6660_i2c_runtime_resume, NULL)
  490. };
  491. static const struct of_device_id __maybe_unused mt6660_of_id[] = {
  492. { .compatible = "mediatek,mt6660",},
  493. {},
  494. };
  495. MODULE_DEVICE_TABLE(of, mt6660_of_id);
  496. static const struct i2c_device_id mt6660_i2c_id[] = {
  497. {"mt6660", 0 },
  498. {},
  499. };
  500. MODULE_DEVICE_TABLE(i2c, mt6660_i2c_id);
  501. static struct i2c_driver mt6660_i2c_driver = {
  502. .driver = {
  503. .name = "mt6660",
  504. .of_match_table = of_match_ptr(mt6660_of_id),
  505. .pm = &mt6660_dev_pm_ops,
  506. },
  507. .probe = mt6660_i2c_probe,
  508. .remove = mt6660_i2c_remove,
  509. .id_table = mt6660_i2c_id,
  510. };
  511. module_i2c_driver(mt6660_i2c_driver);
  512. MODULE_AUTHOR("Jeff Chang <jeff_chang@richtek.com>");
  513. MODULE_DESCRIPTION("MT6660 SPKAMP Driver");
  514. MODULE_LICENSE("GPL");
  515. MODULE_VERSION("1.0.8_G");