max9867.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671
  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // MAX9867 ALSA SoC codec driver
  4. //
  5. // Copyright 2013-2015 Maxim Integrated Products
  6. // Copyright 2018 Ladislav Michl <ladis@linux-mips.org>
  7. //
  8. #include <linux/delay.h>
  9. #include <linux/i2c.h>
  10. #include <linux/module.h>
  11. #include <linux/regmap.h>
  12. #include <sound/pcm_params.h>
  13. #include <sound/soc.h>
  14. #include <sound/tlv.h>
  15. #include "max9867.h"
  16. struct max9867_priv {
  17. struct regmap *regmap;
  18. const struct snd_pcm_hw_constraint_list *constraints;
  19. unsigned int sysclk, pclk;
  20. bool master, dsp_a;
  21. unsigned int adc_dac_active;
  22. };
  23. static const char *const max9867_spmode[] = {
  24. "Stereo Diff", "Mono Diff",
  25. "Stereo Cap", "Mono Cap",
  26. "Stereo Single", "Mono Single",
  27. "Stereo Single Fast", "Mono Single Fast"
  28. };
  29. static const char *const max9867_filter_text[] = {"IIR", "FIR"};
  30. static const char *const max9867_adc_dac_filter_text[] = {
  31. "Disabled",
  32. "Elliptical/16/256",
  33. "Butterworth/16/500",
  34. "Elliptical/8/256",
  35. "Butterworth/8/500",
  36. "Butterworth/8-24"
  37. };
  38. enum max9867_adc_dac {
  39. MAX9867_ADC_LEFT,
  40. MAX9867_ADC_RIGHT,
  41. MAX9867_DAC_LEFT,
  42. MAX9867_DAC_RIGHT,
  43. };
  44. static int max9867_adc_dac_event(struct snd_soc_dapm_widget *w,
  45. struct snd_kcontrol *kcontrol, int event)
  46. {
  47. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  48. struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
  49. enum max9867_adc_dac adc_dac;
  50. if (!strcmp(w->name, "ADCL"))
  51. adc_dac = MAX9867_ADC_LEFT;
  52. else if (!strcmp(w->name, "ADCR"))
  53. adc_dac = MAX9867_ADC_RIGHT;
  54. else if (!strcmp(w->name, "DACL"))
  55. adc_dac = MAX9867_DAC_LEFT;
  56. else if (!strcmp(w->name, "DACR"))
  57. adc_dac = MAX9867_DAC_RIGHT;
  58. else
  59. return 0;
  60. if (SND_SOC_DAPM_EVENT_ON(event))
  61. max9867->adc_dac_active |= BIT(adc_dac);
  62. else if (SND_SOC_DAPM_EVENT_OFF(event))
  63. max9867->adc_dac_active &= ~BIT(adc_dac);
  64. return 0;
  65. }
  66. static int max9867_filter_get(struct snd_kcontrol *kcontrol,
  67. struct snd_ctl_elem_value *ucontrol)
  68. {
  69. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  70. struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
  71. unsigned int reg;
  72. int ret;
  73. ret = regmap_read(max9867->regmap, MAX9867_CODECFLTR, &reg);
  74. if (ret)
  75. return -EINVAL;
  76. if (reg & MAX9867_CODECFLTR_MODE)
  77. ucontrol->value.enumerated.item[0] = 1;
  78. else
  79. ucontrol->value.enumerated.item[0] = 0;
  80. return 0;
  81. }
  82. static int max9867_filter_set(struct snd_kcontrol *kcontrol,
  83. struct snd_ctl_elem_value *ucontrol)
  84. {
  85. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  86. struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
  87. unsigned int reg, mode = ucontrol->value.enumerated.item[0];
  88. int ret;
  89. if (mode > 1)
  90. return -EINVAL;
  91. /* don't allow change if ADC/DAC active */
  92. if (max9867->adc_dac_active)
  93. return -EBUSY;
  94. /* read current filter mode */
  95. ret = regmap_read(max9867->regmap, MAX9867_CODECFLTR, &reg);
  96. if (ret)
  97. return -EINVAL;
  98. if (mode)
  99. mode = MAX9867_CODECFLTR_MODE;
  100. /* check if change is needed */
  101. if ((reg & MAX9867_CODECFLTR_MODE) == mode)
  102. return 0;
  103. /* shutdown codec before switching filter mode */
  104. regmap_update_bits(max9867->regmap, MAX9867_PWRMAN,
  105. MAX9867_PWRMAN_SHDN, 0);
  106. /* switch filter mode */
  107. regmap_update_bits(max9867->regmap, MAX9867_CODECFLTR,
  108. MAX9867_CODECFLTR_MODE, mode);
  109. /* out of shutdown now */
  110. regmap_update_bits(max9867->regmap, MAX9867_PWRMAN,
  111. MAX9867_PWRMAN_SHDN, MAX9867_PWRMAN_SHDN);
  112. return 0;
  113. }
  114. static SOC_ENUM_SINGLE_EXT_DECL(max9867_filter, max9867_filter_text);
  115. static SOC_ENUM_SINGLE_DECL(max9867_dac_filter, MAX9867_CODECFLTR, 0,
  116. max9867_adc_dac_filter_text);
  117. static SOC_ENUM_SINGLE_DECL(max9867_adc_filter, MAX9867_CODECFLTR, 4,
  118. max9867_adc_dac_filter_text);
  119. static SOC_ENUM_SINGLE_DECL(max9867_spkmode, MAX9867_MODECONFIG, 0,
  120. max9867_spmode);
  121. static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(max9867_master_tlv,
  122. 0, 2, TLV_DB_SCALE_ITEM(-8600, 200, 1),
  123. 3, 17, TLV_DB_SCALE_ITEM(-7800, 400, 0),
  124. 18, 25, TLV_DB_SCALE_ITEM(-2000, 200, 0),
  125. 26, 34, TLV_DB_SCALE_ITEM( -500, 100, 0),
  126. 35, 40, TLV_DB_SCALE_ITEM( 350, 50, 0),
  127. );
  128. static DECLARE_TLV_DB_SCALE(max9867_mic_tlv, 0, 100, 0);
  129. static DECLARE_TLV_DB_SCALE(max9867_line_tlv, -600, 200, 0);
  130. static DECLARE_TLV_DB_SCALE(max9867_adc_tlv, -1200, 100, 0);
  131. static DECLARE_TLV_DB_SCALE(max9867_dac_tlv, -1500, 100, 0);
  132. static DECLARE_TLV_DB_SCALE(max9867_dacboost_tlv, 0, 600, 0);
  133. static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(max9867_micboost_tlv,
  134. 0, 2, TLV_DB_SCALE_ITEM(-2000, 2000, 1),
  135. 3, 3, TLV_DB_SCALE_ITEM(3000, 0, 0),
  136. );
  137. static const struct snd_kcontrol_new max9867_snd_controls[] = {
  138. SOC_DOUBLE_R_TLV("Master Playback Volume", MAX9867_LEFTVOL,
  139. MAX9867_RIGHTVOL, 0, 40, 1, max9867_master_tlv),
  140. SOC_DOUBLE_R_TLV("Line Capture Volume", MAX9867_LEFTLINELVL,
  141. MAX9867_RIGHTLINELVL, 0, 15, 1, max9867_line_tlv),
  142. SOC_DOUBLE_R_TLV("Mic Capture Volume", MAX9867_LEFTMICGAIN,
  143. MAX9867_RIGHTMICGAIN, 0, 20, 1, max9867_mic_tlv),
  144. SOC_DOUBLE_R_TLV("Mic Boost Capture Volume", MAX9867_LEFTMICGAIN,
  145. MAX9867_RIGHTMICGAIN, 5, 3, 0, max9867_micboost_tlv),
  146. SOC_SINGLE("Digital Sidetone Volume", MAX9867_SIDETONE, 0, 31, 1),
  147. SOC_SINGLE_TLV("Digital Playback Volume", MAX9867_DACLEVEL, 0, 15, 1,
  148. max9867_dac_tlv),
  149. SOC_SINGLE_TLV("Digital Boost Playback Volume", MAX9867_DACLEVEL, 4, 3, 0,
  150. max9867_dacboost_tlv),
  151. SOC_DOUBLE_TLV("Digital Capture Volume", MAX9867_ADCLEVEL, 4, 0, 15, 1,
  152. max9867_adc_tlv),
  153. SOC_ENUM("Speaker Mode", max9867_spkmode),
  154. SOC_SINGLE("Volume Smoothing Switch", MAX9867_MODECONFIG, 6, 1, 0),
  155. SOC_SINGLE("Line ZC Switch", MAX9867_MODECONFIG, 5, 1, 0),
  156. SOC_ENUM_EXT("DSP Filter", max9867_filter, max9867_filter_get, max9867_filter_set),
  157. SOC_ENUM("ADC Filter", max9867_adc_filter),
  158. SOC_ENUM("DAC Filter", max9867_dac_filter),
  159. SOC_SINGLE("Mono Playback Switch", MAX9867_IFC1B, 3, 1, 0),
  160. };
  161. /* Input mixer */
  162. static const struct snd_kcontrol_new max9867_input_mixer_controls[] = {
  163. SOC_DAPM_DOUBLE("Line Capture Switch", MAX9867_INPUTCONFIG, 7, 5, 1, 0),
  164. SOC_DAPM_DOUBLE("Mic Capture Switch", MAX9867_INPUTCONFIG, 6, 4, 1, 0),
  165. };
  166. /* Output mixer */
  167. static const struct snd_kcontrol_new max9867_output_mixer_controls[] = {
  168. SOC_DAPM_DOUBLE_R("Line Bypass Switch",
  169. MAX9867_LEFTLINELVL, MAX9867_RIGHTLINELVL, 6, 1, 1),
  170. };
  171. /* Sidetone mixer */
  172. static const struct snd_kcontrol_new max9867_sidetone_mixer_controls[] = {
  173. SOC_DAPM_DOUBLE("Sidetone Switch", MAX9867_SIDETONE, 6, 7, 1, 0),
  174. };
  175. /* Line out switch */
  176. static const struct snd_kcontrol_new max9867_line_out_control =
  177. SOC_DAPM_DOUBLE_R("Switch",
  178. MAX9867_LEFTVOL, MAX9867_RIGHTVOL, 6, 1, 1);
  179. /* DMIC mux */
  180. static const char *const dmic_mux_text[] = {
  181. "ADC", "DMIC"
  182. };
  183. static SOC_ENUM_SINGLE_DECL(left_dmic_mux_enum,
  184. MAX9867_MICCONFIG, 5, dmic_mux_text);
  185. static SOC_ENUM_SINGLE_DECL(right_dmic_mux_enum,
  186. MAX9867_MICCONFIG, 4, dmic_mux_text);
  187. static const struct snd_kcontrol_new max9867_left_dmic_mux =
  188. SOC_DAPM_ENUM("DMICL Mux", left_dmic_mux_enum);
  189. static const struct snd_kcontrol_new max9867_right_dmic_mux =
  190. SOC_DAPM_ENUM("DMICR Mux", right_dmic_mux_enum);
  191. static const struct snd_soc_dapm_widget max9867_dapm_widgets[] = {
  192. SND_SOC_DAPM_INPUT("MICL"),
  193. SND_SOC_DAPM_INPUT("MICR"),
  194. SND_SOC_DAPM_INPUT("DMICL"),
  195. SND_SOC_DAPM_INPUT("DMICR"),
  196. SND_SOC_DAPM_INPUT("LINL"),
  197. SND_SOC_DAPM_INPUT("LINR"),
  198. SND_SOC_DAPM_PGA("Left Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),
  199. SND_SOC_DAPM_PGA("Right Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),
  200. SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0,
  201. max9867_input_mixer_controls,
  202. ARRAY_SIZE(max9867_input_mixer_controls)),
  203. SND_SOC_DAPM_MUX("DMICL Mux", SND_SOC_NOPM, 0, 0,
  204. &max9867_left_dmic_mux),
  205. SND_SOC_DAPM_MUX("DMICR Mux", SND_SOC_NOPM, 0, 0,
  206. &max9867_right_dmic_mux),
  207. SND_SOC_DAPM_ADC_E("ADCL", "HiFi Capture", SND_SOC_NOPM, 0, 0,
  208. max9867_adc_dac_event,
  209. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  210. SND_SOC_DAPM_ADC_E("ADCR", "HiFi Capture", SND_SOC_NOPM, 0, 0,
  211. max9867_adc_dac_event,
  212. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  213. SND_SOC_DAPM_MIXER("Digital", SND_SOC_NOPM, 0, 0,
  214. max9867_sidetone_mixer_controls,
  215. ARRAY_SIZE(max9867_sidetone_mixer_controls)),
  216. SND_SOC_DAPM_MIXER_NAMED_CTL("Output Mixer", SND_SOC_NOPM, 0, 0,
  217. max9867_output_mixer_controls,
  218. ARRAY_SIZE(max9867_output_mixer_controls)),
  219. SND_SOC_DAPM_DAC_E("DACL", "HiFi Playback", SND_SOC_NOPM, 0, 0,
  220. max9867_adc_dac_event,
  221. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  222. SND_SOC_DAPM_DAC_E("DACR", "HiFi Playback", SND_SOC_NOPM, 0, 0,
  223. max9867_adc_dac_event,
  224. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  225. SND_SOC_DAPM_SWITCH("Master Playback", SND_SOC_NOPM, 0, 0,
  226. &max9867_line_out_control),
  227. SND_SOC_DAPM_OUTPUT("LOUT"),
  228. SND_SOC_DAPM_OUTPUT("ROUT"),
  229. };
  230. static const struct snd_soc_dapm_route max9867_audio_map[] = {
  231. {"Left Line Input", NULL, "LINL"},
  232. {"Right Line Input", NULL, "LINR"},
  233. {"Input Mixer", "Mic Capture Switch", "MICL"},
  234. {"Input Mixer", "Mic Capture Switch", "MICR"},
  235. {"Input Mixer", "Line Capture Switch", "Left Line Input"},
  236. {"Input Mixer", "Line Capture Switch", "Right Line Input"},
  237. {"DMICL Mux", "DMIC", "DMICL"},
  238. {"DMICR Mux", "DMIC", "DMICR"},
  239. {"DMICL Mux", "ADC", "Input Mixer"},
  240. {"DMICR Mux", "ADC", "Input Mixer"},
  241. {"ADCL", NULL, "DMICL Mux"},
  242. {"ADCR", NULL, "DMICR Mux"},
  243. {"Digital", "Sidetone Switch", "ADCL"},
  244. {"Digital", "Sidetone Switch", "ADCR"},
  245. {"DACL", NULL, "Digital"},
  246. {"DACR", NULL, "Digital"},
  247. {"Output Mixer", "Line Bypass Switch", "Left Line Input"},
  248. {"Output Mixer", "Line Bypass Switch", "Right Line Input"},
  249. {"Output Mixer", NULL, "DACL"},
  250. {"Output Mixer", NULL, "DACR"},
  251. {"Master Playback", "Switch", "Output Mixer"},
  252. {"LOUT", NULL, "Master Playback"},
  253. {"ROUT", NULL, "Master Playback"},
  254. };
  255. static const unsigned int max9867_rates_44k1[] = {
  256. 11025, 22050, 44100,
  257. };
  258. static const struct snd_pcm_hw_constraint_list max9867_constraints_44k1 = {
  259. .list = max9867_rates_44k1,
  260. .count = ARRAY_SIZE(max9867_rates_44k1),
  261. };
  262. static const unsigned int max9867_rates_48k[] = {
  263. 8000, 16000, 32000, 48000,
  264. };
  265. static const struct snd_pcm_hw_constraint_list max9867_constraints_48k = {
  266. .list = max9867_rates_48k,
  267. .count = ARRAY_SIZE(max9867_rates_48k),
  268. };
  269. static int max9867_startup(struct snd_pcm_substream *substream,
  270. struct snd_soc_dai *dai)
  271. {
  272. struct max9867_priv *max9867 =
  273. snd_soc_component_get_drvdata(dai->component);
  274. if (max9867->constraints)
  275. snd_pcm_hw_constraint_list(substream->runtime, 0,
  276. SNDRV_PCM_HW_PARAM_RATE, max9867->constraints);
  277. return 0;
  278. }
  279. static int max9867_dai_hw_params(struct snd_pcm_substream *substream,
  280. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  281. {
  282. int value;
  283. unsigned long int rate, ratio;
  284. struct snd_soc_component *component = dai->component;
  285. struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
  286. unsigned int ni = DIV_ROUND_CLOSEST_ULL(96ULL * 0x10000 * params_rate(params),
  287. max9867->pclk);
  288. /* set up the ni value */
  289. regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKHIGH,
  290. MAX9867_NI_HIGH_MASK, (0xFF00 & ni) >> 8);
  291. regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKLOW,
  292. MAX9867_NI_LOW_MASK, 0x00FF & ni);
  293. if (max9867->master) {
  294. if (max9867->dsp_a) {
  295. value = MAX9867_IFC1B_48X;
  296. } else {
  297. rate = params_rate(params) * 2 * params_width(params);
  298. ratio = max9867->pclk / rate;
  299. switch (params_width(params)) {
  300. case 8:
  301. case 16:
  302. switch (ratio) {
  303. case 2:
  304. value = MAX9867_IFC1B_PCLK_2;
  305. break;
  306. case 4:
  307. value = MAX9867_IFC1B_PCLK_4;
  308. break;
  309. case 8:
  310. value = MAX9867_IFC1B_PCLK_8;
  311. break;
  312. case 16:
  313. value = MAX9867_IFC1B_PCLK_16;
  314. break;
  315. default:
  316. return -EINVAL;
  317. }
  318. break;
  319. case 24:
  320. value = MAX9867_IFC1B_48X;
  321. break;
  322. case 32:
  323. value = MAX9867_IFC1B_64X;
  324. break;
  325. default:
  326. return -EINVAL;
  327. }
  328. }
  329. regmap_update_bits(max9867->regmap, MAX9867_IFC1B,
  330. MAX9867_IFC1B_BCLK_MASK, value);
  331. } else {
  332. /*
  333. * digital pll locks on to any externally supplied LRCLK signal
  334. * and also enable rapid lock mode.
  335. */
  336. regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKLOW,
  337. MAX9867_RAPID_LOCK, MAX9867_RAPID_LOCK);
  338. regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKHIGH,
  339. MAX9867_PLL, MAX9867_PLL);
  340. }
  341. return 0;
  342. }
  343. static int max9867_mute(struct snd_soc_dai *dai, int mute, int direction)
  344. {
  345. struct snd_soc_component *component = dai->component;
  346. struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
  347. return regmap_update_bits(max9867->regmap, MAX9867_DACLEVEL,
  348. 1 << 6, !!mute << 6);
  349. }
  350. static int max9867_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  351. int clk_id, unsigned int freq, int dir)
  352. {
  353. struct snd_soc_component *component = codec_dai->component;
  354. struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
  355. int value = 0;
  356. /* Set the prescaler based on the master clock frequency*/
  357. if (freq >= 10000000 && freq <= 20000000) {
  358. value |= MAX9867_PSCLK_10_20;
  359. max9867->pclk = freq;
  360. } else if (freq >= 20000000 && freq <= 40000000) {
  361. value |= MAX9867_PSCLK_20_40;
  362. max9867->pclk = freq / 2;
  363. } else if (freq >= 40000000 && freq <= 60000000) {
  364. value |= MAX9867_PSCLK_40_60;
  365. max9867->pclk = freq / 4;
  366. } else {
  367. dev_err(component->dev,
  368. "Invalid clock frequency %uHz (required 10-60MHz)\n",
  369. freq);
  370. return -EINVAL;
  371. }
  372. if (freq % 48000 == 0)
  373. max9867->constraints = &max9867_constraints_48k;
  374. else if (freq % 44100 == 0)
  375. max9867->constraints = &max9867_constraints_44k1;
  376. else
  377. dev_warn(component->dev,
  378. "Unable to set exact rate with %uHz clock frequency\n",
  379. freq);
  380. max9867->sysclk = freq;
  381. value = value << MAX9867_PSCLK_SHIFT;
  382. /* exact integer mode is not supported */
  383. value &= ~MAX9867_FREQ_MASK;
  384. regmap_update_bits(max9867->regmap, MAX9867_SYSCLK,
  385. MAX9867_PSCLK_MASK, value);
  386. return 0;
  387. }
  388. static int max9867_dai_set_fmt(struct snd_soc_dai *codec_dai,
  389. unsigned int fmt)
  390. {
  391. struct snd_soc_component *component = codec_dai->component;
  392. struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
  393. u8 iface1A, iface1B;
  394. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  395. case SND_SOC_DAIFMT_CBM_CFM:
  396. max9867->master = true;
  397. iface1A = MAX9867_MASTER;
  398. iface1B = MAX9867_IFC1B_48X;
  399. break;
  400. case SND_SOC_DAIFMT_CBS_CFS:
  401. max9867->master = false;
  402. iface1A = iface1B = 0;
  403. break;
  404. default:
  405. return -EINVAL;
  406. }
  407. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  408. case SND_SOC_DAIFMT_I2S:
  409. max9867->dsp_a = false;
  410. iface1A |= MAX9867_I2S_DLY;
  411. break;
  412. case SND_SOC_DAIFMT_DSP_A:
  413. max9867->dsp_a = true;
  414. iface1A |= MAX9867_TDM_MODE | MAX9867_SDOUT_HIZ;
  415. break;
  416. default:
  417. return -EINVAL;
  418. }
  419. /* Clock inversion bits, BCI and WCI */
  420. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  421. case SND_SOC_DAIFMT_NB_NF:
  422. break;
  423. case SND_SOC_DAIFMT_IB_IF:
  424. iface1A |= MAX9867_WCI_MODE | MAX9867_BCI_MODE;
  425. break;
  426. case SND_SOC_DAIFMT_IB_NF:
  427. iface1A |= MAX9867_BCI_MODE;
  428. break;
  429. case SND_SOC_DAIFMT_NB_IF:
  430. iface1A |= MAX9867_WCI_MODE;
  431. break;
  432. default:
  433. return -EINVAL;
  434. }
  435. regmap_write(max9867->regmap, MAX9867_IFC1A, iface1A);
  436. regmap_update_bits(max9867->regmap, MAX9867_IFC1B,
  437. MAX9867_IFC1B_BCLK_MASK, iface1B);
  438. return 0;
  439. }
  440. static const struct snd_soc_dai_ops max9867_dai_ops = {
  441. .set_sysclk = max9867_set_dai_sysclk,
  442. .set_fmt = max9867_dai_set_fmt,
  443. .mute_stream = max9867_mute,
  444. .startup = max9867_startup,
  445. .hw_params = max9867_dai_hw_params,
  446. .no_capture_mute = 1,
  447. };
  448. static struct snd_soc_dai_driver max9867_dai[] = {
  449. {
  450. .name = "max9867-aif1",
  451. .playback = {
  452. .stream_name = "HiFi Playback",
  453. .channels_min = 2,
  454. .channels_max = 2,
  455. .rates = SNDRV_PCM_RATE_8000_48000,
  456. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  457. },
  458. .capture = {
  459. .stream_name = "HiFi Capture",
  460. .channels_min = 2,
  461. .channels_max = 2,
  462. .rates = SNDRV_PCM_RATE_8000_48000,
  463. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  464. },
  465. .ops = &max9867_dai_ops,
  466. .symmetric_rates = 1,
  467. }
  468. };
  469. #ifdef CONFIG_PM
  470. static int max9867_suspend(struct snd_soc_component *component)
  471. {
  472. snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
  473. return 0;
  474. }
  475. static int max9867_resume(struct snd_soc_component *component)
  476. {
  477. snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
  478. return 0;
  479. }
  480. #else
  481. #define max9867_suspend NULL
  482. #define max9867_resume NULL
  483. #endif
  484. static int max9867_set_bias_level(struct snd_soc_component *component,
  485. enum snd_soc_bias_level level)
  486. {
  487. int err;
  488. struct max9867_priv *max9867 = snd_soc_component_get_drvdata(component);
  489. switch (level) {
  490. case SND_SOC_BIAS_STANDBY:
  491. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  492. err = regcache_sync(max9867->regmap);
  493. if (err)
  494. return err;
  495. err = regmap_write(max9867->regmap,
  496. MAX9867_PWRMAN, 0xff);
  497. if (err)
  498. return err;
  499. }
  500. break;
  501. case SND_SOC_BIAS_OFF:
  502. err = regmap_write(max9867->regmap, MAX9867_PWRMAN, 0);
  503. if (err)
  504. return err;
  505. regcache_mark_dirty(max9867->regmap);
  506. break;
  507. default:
  508. break;
  509. }
  510. return 0;
  511. }
  512. static const struct snd_soc_component_driver max9867_component = {
  513. .controls = max9867_snd_controls,
  514. .num_controls = ARRAY_SIZE(max9867_snd_controls),
  515. .dapm_routes = max9867_audio_map,
  516. .num_dapm_routes = ARRAY_SIZE(max9867_audio_map),
  517. .dapm_widgets = max9867_dapm_widgets,
  518. .num_dapm_widgets = ARRAY_SIZE(max9867_dapm_widgets),
  519. .suspend = max9867_suspend,
  520. .resume = max9867_resume,
  521. .set_bias_level = max9867_set_bias_level,
  522. .idle_bias_on = 1,
  523. .use_pmdown_time = 1,
  524. .endianness = 1,
  525. .non_legacy_dai_naming = 1,
  526. };
  527. static bool max9867_volatile_register(struct device *dev, unsigned int reg)
  528. {
  529. switch (reg) {
  530. case MAX9867_STATUS:
  531. case MAX9867_JACKSTATUS:
  532. case MAX9867_AUXHIGH:
  533. case MAX9867_AUXLOW:
  534. return true;
  535. default:
  536. return false;
  537. }
  538. }
  539. static const struct regmap_config max9867_regmap = {
  540. .reg_bits = 8,
  541. .val_bits = 8,
  542. .max_register = MAX9867_REVISION,
  543. .volatile_reg = max9867_volatile_register,
  544. .cache_type = REGCACHE_RBTREE,
  545. };
  546. static int max9867_i2c_probe(struct i2c_client *i2c,
  547. const struct i2c_device_id *id)
  548. {
  549. struct max9867_priv *max9867;
  550. int ret, reg;
  551. max9867 = devm_kzalloc(&i2c->dev, sizeof(*max9867), GFP_KERNEL);
  552. if (!max9867)
  553. return -ENOMEM;
  554. i2c_set_clientdata(i2c, max9867);
  555. max9867->regmap = devm_regmap_init_i2c(i2c, &max9867_regmap);
  556. if (IS_ERR(max9867->regmap)) {
  557. ret = PTR_ERR(max9867->regmap);
  558. dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret);
  559. return ret;
  560. }
  561. ret = regmap_read(max9867->regmap, MAX9867_REVISION, &reg);
  562. if (ret < 0) {
  563. dev_err(&i2c->dev, "Failed to read: %d\n", ret);
  564. return ret;
  565. }
  566. dev_info(&i2c->dev, "device revision: %x\n", reg);
  567. ret = devm_snd_soc_register_component(&i2c->dev, &max9867_component,
  568. max9867_dai, ARRAY_SIZE(max9867_dai));
  569. if (ret < 0)
  570. dev_err(&i2c->dev, "Failed to register component: %d\n", ret);
  571. return ret;
  572. }
  573. static const struct i2c_device_id max9867_i2c_id[] = {
  574. { "max9867", 0 },
  575. { }
  576. };
  577. MODULE_DEVICE_TABLE(i2c, max9867_i2c_id);
  578. static const struct of_device_id max9867_of_match[] = {
  579. { .compatible = "maxim,max9867", },
  580. { }
  581. };
  582. MODULE_DEVICE_TABLE(of, max9867_of_match);
  583. static struct i2c_driver max9867_i2c_driver = {
  584. .driver = {
  585. .name = "max9867",
  586. .of_match_table = of_match_ptr(max9867_of_match),
  587. },
  588. .probe = max9867_i2c_probe,
  589. .id_table = max9867_i2c_id,
  590. };
  591. module_i2c_driver(max9867_i2c_driver);
  592. MODULE_AUTHOR("Ladislav Michl <ladis@linux-mips.org>");
  593. MODULE_DESCRIPTION("ASoC MAX9867 driver");
  594. MODULE_LICENSE("GPL");