cs4270.c 23 KB

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  1. /*
  2. * CS4270 ALSA SoC (ASoC) codec driver
  3. *
  4. * Author: Timur Tabi <timur@freescale.com>
  5. *
  6. * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
  7. * under the terms of the GNU General Public License version 2. This
  8. * program is licensed "as is" without any warranty of any kind, whether
  9. * express or implied.
  10. *
  11. * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
  12. *
  13. * Current features/limitations:
  14. *
  15. * - Software mode is supported. Stand-alone mode is not supported.
  16. * - Only I2C is supported, not SPI
  17. * - Support for master and slave mode
  18. * - The machine driver's 'startup' function must call
  19. * cs4270_set_dai_sysclk() with the value of MCLK.
  20. * - Only I2S and left-justified modes are supported
  21. * - Power management is supported
  22. */
  23. #include <linux/module.h>
  24. #include <linux/slab.h>
  25. #include <sound/core.h>
  26. #include <sound/soc.h>
  27. #include <sound/initval.h>
  28. #include <linux/i2c.h>
  29. #include <linux/delay.h>
  30. #include <linux/regulator/consumer.h>
  31. #include <linux/gpio/consumer.h>
  32. #include <linux/of_device.h>
  33. /*
  34. * The codec isn't really big-endian or little-endian, since the I2S
  35. * interface requires data to be sent serially with the MSbit first.
  36. * However, to support BE and LE I2S devices, we specify both here. That
  37. * way, ALSA will always match the bit patterns.
  38. */
  39. #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  40. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
  41. SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
  42. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
  43. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
  44. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
  45. /* CS4270 registers addresses */
  46. #define CS4270_CHIPID 0x01 /* Chip ID */
  47. #define CS4270_PWRCTL 0x02 /* Power Control */
  48. #define CS4270_MODE 0x03 /* Mode Control */
  49. #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
  50. #define CS4270_TRANS 0x05 /* Transition Control */
  51. #define CS4270_MUTE 0x06 /* Mute Control */
  52. #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
  53. #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
  54. #define CS4270_FIRSTREG 0x01
  55. #define CS4270_LASTREG 0x08
  56. #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
  57. #define CS4270_I2C_INCR 0x80
  58. /* Bit masks for the CS4270 registers */
  59. #define CS4270_CHIPID_ID 0xF0
  60. #define CS4270_CHIPID_REV 0x0F
  61. #define CS4270_PWRCTL_FREEZE 0x80
  62. #define CS4270_PWRCTL_PDN_ADC 0x20
  63. #define CS4270_PWRCTL_PDN_DAC 0x02
  64. #define CS4270_PWRCTL_PDN 0x01
  65. #define CS4270_PWRCTL_PDN_ALL \
  66. (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
  67. #define CS4270_MODE_SPEED_MASK 0x30
  68. #define CS4270_MODE_1X 0x00
  69. #define CS4270_MODE_2X 0x10
  70. #define CS4270_MODE_4X 0x20
  71. #define CS4270_MODE_SLAVE 0x30
  72. #define CS4270_MODE_DIV_MASK 0x0E
  73. #define CS4270_MODE_DIV1 0x00
  74. #define CS4270_MODE_DIV15 0x02
  75. #define CS4270_MODE_DIV2 0x04
  76. #define CS4270_MODE_DIV3 0x06
  77. #define CS4270_MODE_DIV4 0x08
  78. #define CS4270_MODE_POPGUARD 0x01
  79. #define CS4270_FORMAT_FREEZE_A 0x80
  80. #define CS4270_FORMAT_FREEZE_B 0x40
  81. #define CS4270_FORMAT_LOOPBACK 0x20
  82. #define CS4270_FORMAT_DAC_MASK 0x18
  83. #define CS4270_FORMAT_DAC_LJ 0x00
  84. #define CS4270_FORMAT_DAC_I2S 0x08
  85. #define CS4270_FORMAT_DAC_RJ16 0x18
  86. #define CS4270_FORMAT_DAC_RJ24 0x10
  87. #define CS4270_FORMAT_ADC_MASK 0x01
  88. #define CS4270_FORMAT_ADC_LJ 0x00
  89. #define CS4270_FORMAT_ADC_I2S 0x01
  90. #define CS4270_TRANS_ONE_VOL 0x80
  91. #define CS4270_TRANS_SOFT 0x40
  92. #define CS4270_TRANS_ZERO 0x20
  93. #define CS4270_TRANS_INV_ADC_A 0x08
  94. #define CS4270_TRANS_INV_ADC_B 0x10
  95. #define CS4270_TRANS_INV_DAC_A 0x02
  96. #define CS4270_TRANS_INV_DAC_B 0x04
  97. #define CS4270_TRANS_DEEMPH 0x01
  98. #define CS4270_MUTE_AUTO 0x20
  99. #define CS4270_MUTE_ADC_A 0x08
  100. #define CS4270_MUTE_ADC_B 0x10
  101. #define CS4270_MUTE_POLARITY 0x04
  102. #define CS4270_MUTE_DAC_A 0x01
  103. #define CS4270_MUTE_DAC_B 0x02
  104. /* Power-on default values for the registers
  105. *
  106. * This array contains the power-on default values of the registers, with the
  107. * exception of the "CHIPID" register (01h). The lower four bits of that
  108. * register contain the hardware revision, so it is treated as volatile.
  109. */
  110. static const struct reg_default cs4270_reg_defaults[] = {
  111. { 2, 0x00 },
  112. { 3, 0x30 },
  113. { 4, 0x00 },
  114. { 5, 0x60 },
  115. { 6, 0x20 },
  116. { 7, 0x00 },
  117. { 8, 0x00 },
  118. };
  119. static const char *supply_names[] = {
  120. "va", "vd", "vlc"
  121. };
  122. /* Private data for the CS4270 */
  123. struct cs4270_private {
  124. struct regmap *regmap;
  125. unsigned int mclk; /* Input frequency of the MCLK pin */
  126. unsigned int mode; /* The mode (I2S or left-justified) */
  127. unsigned int slave_mode;
  128. unsigned int manual_mute;
  129. /* power domain regulators */
  130. struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
  131. /* reset gpio */
  132. struct gpio_desc *reset_gpio;
  133. };
  134. static const struct snd_soc_dapm_widget cs4270_dapm_widgets[] = {
  135. SND_SOC_DAPM_INPUT("AINL"),
  136. SND_SOC_DAPM_INPUT("AINR"),
  137. SND_SOC_DAPM_OUTPUT("AOUTL"),
  138. SND_SOC_DAPM_OUTPUT("AOUTR"),
  139. };
  140. static const struct snd_soc_dapm_route cs4270_dapm_routes[] = {
  141. { "Capture", NULL, "AINL" },
  142. { "Capture", NULL, "AINR" },
  143. { "AOUTL", NULL, "Playback" },
  144. { "AOUTR", NULL, "Playback" },
  145. };
  146. /**
  147. * struct cs4270_mode_ratios - clock ratio tables
  148. * @ratio: the ratio of MCLK to the sample rate
  149. * @speed_mode: the Speed Mode bits to set in the Mode Control register for
  150. * this ratio
  151. * @mclk: the Ratio Select bits to set in the Mode Control register for this
  152. * ratio
  153. *
  154. * The data for this chart is taken from Table 5 of the CS4270 reference
  155. * manual.
  156. *
  157. * This table is used to determine how to program the Mode Control register.
  158. * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
  159. * rates the CS4270 currently supports.
  160. *
  161. * @speed_mode is the corresponding bit pattern to be written to the
  162. * MODE bits of the Mode Control Register
  163. *
  164. * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
  165. * the Mode Control Register.
  166. *
  167. * In situations where a single ratio is represented by multiple speed
  168. * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
  169. * double-speed instead of quad-speed. However, the CS4270 errata states
  170. * that divide-By-1.5 can cause failures, so we avoid that mode where
  171. * possible.
  172. *
  173. * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
  174. * work if Vd is 3.3V. If this effects you, select the
  175. * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
  176. * never select any sample rates that require divide-by-1.5.
  177. */
  178. struct cs4270_mode_ratios {
  179. unsigned int ratio;
  180. u8 speed_mode;
  181. u8 mclk;
  182. };
  183. static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
  184. {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
  185. #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
  186. {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
  187. #endif
  188. {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
  189. {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
  190. {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
  191. {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
  192. {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
  193. {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
  194. {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
  195. };
  196. /* The number of MCLK/LRCK ratios supported by the CS4270 */
  197. #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
  198. static bool cs4270_reg_is_readable(struct device *dev, unsigned int reg)
  199. {
  200. return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
  201. }
  202. static bool cs4270_reg_is_volatile(struct device *dev, unsigned int reg)
  203. {
  204. /* Unreadable registers are considered volatile */
  205. if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
  206. return true;
  207. return reg == CS4270_CHIPID;
  208. }
  209. /**
  210. * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
  211. * @codec_dai: the codec DAI
  212. * @clk_id: the clock ID (ignored)
  213. * @freq: the MCLK input frequency
  214. * @dir: the clock direction (ignored)
  215. *
  216. * This function is used to tell the codec driver what the input MCLK
  217. * frequency is.
  218. *
  219. * The value of MCLK is used to determine which sample rates are supported
  220. * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
  221. * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
  222. *
  223. * This function calculates the nine ratios and determines which ones match
  224. * a standard sample rate. If there's a match, then it is added to the list
  225. * of supported sample rates.
  226. *
  227. * This function must be called by the machine driver's 'startup' function,
  228. * otherwise the list of supported sample rates will not be available in
  229. * time for ALSA.
  230. *
  231. * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
  232. * theoretically possible sample rates to be enabled. Call it again with a
  233. * proper value set one the external clock is set (most probably you would do
  234. * that from a machine's driver 'hw_param' hook.
  235. */
  236. static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  237. int clk_id, unsigned int freq, int dir)
  238. {
  239. struct snd_soc_component *component = codec_dai->component;
  240. struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component);
  241. cs4270->mclk = freq;
  242. return 0;
  243. }
  244. /**
  245. * cs4270_set_dai_fmt - configure the codec for the selected audio format
  246. * @codec_dai: the codec DAI
  247. * @format: a SND_SOC_DAIFMT_x value indicating the data format
  248. *
  249. * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
  250. * codec accordingly.
  251. *
  252. * Currently, this function only supports SND_SOC_DAIFMT_I2S and
  253. * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
  254. * data for playback only, but ASoC currently does not support different
  255. * formats for playback vs. record.
  256. */
  257. static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
  258. unsigned int format)
  259. {
  260. struct snd_soc_component *component = codec_dai->component;
  261. struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component);
  262. /* set DAI format */
  263. switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
  264. case SND_SOC_DAIFMT_I2S:
  265. case SND_SOC_DAIFMT_LEFT_J:
  266. cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
  267. break;
  268. default:
  269. dev_err(component->dev, "invalid dai format\n");
  270. return -EINVAL;
  271. }
  272. /* set master/slave audio interface */
  273. switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
  274. case SND_SOC_DAIFMT_CBS_CFS:
  275. cs4270->slave_mode = 1;
  276. break;
  277. case SND_SOC_DAIFMT_CBM_CFM:
  278. cs4270->slave_mode = 0;
  279. break;
  280. default:
  281. /* all other modes are unsupported by the hardware */
  282. dev_err(component->dev, "Unknown master/slave configuration\n");
  283. return -EINVAL;
  284. }
  285. return 0;
  286. }
  287. /**
  288. * cs4270_hw_params - program the CS4270 with the given hardware parameters.
  289. * @substream: the audio stream
  290. * @params: the hardware parameters to set
  291. * @dai: the SOC DAI (ignored)
  292. *
  293. * This function programs the hardware with the values provided.
  294. * Specifically, the sample rate and the data format.
  295. *
  296. * The .ops functions are used to provide board-specific data, like input
  297. * frequencies, to this driver. This function takes that information,
  298. * combines it with the hardware parameters provided, and programs the
  299. * hardware accordingly.
  300. */
  301. static int cs4270_hw_params(struct snd_pcm_substream *substream,
  302. struct snd_pcm_hw_params *params,
  303. struct snd_soc_dai *dai)
  304. {
  305. struct snd_soc_component *component = dai->component;
  306. struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component);
  307. int ret;
  308. unsigned int i;
  309. unsigned int rate;
  310. unsigned int ratio;
  311. int reg;
  312. /* Figure out which MCLK/LRCK ratio to use */
  313. rate = params_rate(params); /* Sampling rate, in Hz */
  314. ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
  315. for (i = 0; i < NUM_MCLK_RATIOS; i++) {
  316. if (cs4270_mode_ratios[i].ratio == ratio)
  317. break;
  318. }
  319. if (i == NUM_MCLK_RATIOS) {
  320. /* We did not find a matching ratio */
  321. dev_err(component->dev, "could not find matching ratio\n");
  322. return -EINVAL;
  323. }
  324. /* Set the sample rate */
  325. reg = snd_soc_component_read(component, CS4270_MODE);
  326. reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
  327. reg |= cs4270_mode_ratios[i].mclk;
  328. if (cs4270->slave_mode)
  329. reg |= CS4270_MODE_SLAVE;
  330. else
  331. reg |= cs4270_mode_ratios[i].speed_mode;
  332. ret = snd_soc_component_write(component, CS4270_MODE, reg);
  333. if (ret < 0) {
  334. dev_err(component->dev, "i2c write failed\n");
  335. return ret;
  336. }
  337. /* Set the DAI format */
  338. reg = snd_soc_component_read(component, CS4270_FORMAT);
  339. reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
  340. switch (cs4270->mode) {
  341. case SND_SOC_DAIFMT_I2S:
  342. reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
  343. break;
  344. case SND_SOC_DAIFMT_LEFT_J:
  345. reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
  346. break;
  347. default:
  348. dev_err(component->dev, "unknown dai format\n");
  349. return -EINVAL;
  350. }
  351. ret = snd_soc_component_write(component, CS4270_FORMAT, reg);
  352. if (ret < 0) {
  353. dev_err(component->dev, "i2c write failed\n");
  354. return ret;
  355. }
  356. return ret;
  357. }
  358. /**
  359. * cs4270_dai_mute - enable/disable the CS4270 external mute
  360. * @dai: the SOC DAI
  361. * @mute: 0 = disable mute, 1 = enable mute
  362. *
  363. * This function toggles the mute bits in the MUTE register. The CS4270's
  364. * mute capability is intended for external muting circuitry, so if the
  365. * board does not have the MUTEA or MUTEB pins connected to such circuitry,
  366. * then this function will do nothing.
  367. */
  368. static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute, int direction)
  369. {
  370. struct snd_soc_component *component = dai->component;
  371. struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component);
  372. int reg6;
  373. reg6 = snd_soc_component_read(component, CS4270_MUTE);
  374. if (mute)
  375. reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
  376. else {
  377. reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
  378. reg6 |= cs4270->manual_mute;
  379. }
  380. return snd_soc_component_write(component, CS4270_MUTE, reg6);
  381. }
  382. /**
  383. * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
  384. * alsa control.
  385. * @kcontrol: mixer control
  386. * @ucontrol: control element information
  387. *
  388. * This function basically passes the arguments on to the generic
  389. * snd_soc_put_volsw() function and saves the mute information in
  390. * our private data structure. This is because we want to prevent
  391. * cs4270_dai_mute() neglecting the user's decision to manually
  392. * mute the codec's output.
  393. *
  394. * Returns 0 for success.
  395. */
  396. static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
  397. struct snd_ctl_elem_value *ucontrol)
  398. {
  399. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  400. struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component);
  401. int left = !ucontrol->value.integer.value[0];
  402. int right = !ucontrol->value.integer.value[1];
  403. cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
  404. (right ? CS4270_MUTE_DAC_B : 0);
  405. return snd_soc_put_volsw(kcontrol, ucontrol);
  406. }
  407. /* A list of non-DAPM controls that the CS4270 supports */
  408. static const struct snd_kcontrol_new cs4270_snd_controls[] = {
  409. SOC_DOUBLE_R("Master Playback Volume",
  410. CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
  411. SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
  412. SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
  413. SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
  414. SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
  415. SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
  416. SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
  417. SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
  418. SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
  419. snd_soc_get_volsw, cs4270_soc_put_mute),
  420. };
  421. static const struct snd_soc_dai_ops cs4270_dai_ops = {
  422. .hw_params = cs4270_hw_params,
  423. .set_sysclk = cs4270_set_dai_sysclk,
  424. .set_fmt = cs4270_set_dai_fmt,
  425. .mute_stream = cs4270_dai_mute,
  426. .no_capture_mute = 1,
  427. };
  428. static struct snd_soc_dai_driver cs4270_dai = {
  429. .name = "cs4270-hifi",
  430. .playback = {
  431. .stream_name = "Playback",
  432. .channels_min = 2,
  433. .channels_max = 2,
  434. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  435. .rate_min = 4000,
  436. .rate_max = 216000,
  437. .formats = CS4270_FORMATS,
  438. },
  439. .capture = {
  440. .stream_name = "Capture",
  441. .channels_min = 2,
  442. .channels_max = 2,
  443. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  444. .rate_min = 4000,
  445. .rate_max = 216000,
  446. .formats = CS4270_FORMATS,
  447. },
  448. .ops = &cs4270_dai_ops,
  449. };
  450. /**
  451. * cs4270_probe - ASoC probe function
  452. * @component: ASoC component
  453. *
  454. * This function is called when ASoC has all the pieces it needs to
  455. * instantiate a sound driver.
  456. */
  457. static int cs4270_probe(struct snd_soc_component *component)
  458. {
  459. struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component);
  460. int ret;
  461. /* Disable auto-mute. This feature appears to be buggy. In some
  462. * situations, auto-mute will not deactivate when it should, so we want
  463. * this feature disabled by default. An application (e.g. alsactl) can
  464. * re-enabled it by using the controls.
  465. */
  466. ret = snd_soc_component_update_bits(component, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
  467. if (ret < 0) {
  468. dev_err(component->dev, "i2c write failed\n");
  469. return ret;
  470. }
  471. /* Disable automatic volume control. The hardware enables, and it
  472. * causes volume change commands to be delayed, sometimes until after
  473. * playback has started. An application (e.g. alsactl) can
  474. * re-enabled it by using the controls.
  475. */
  476. ret = snd_soc_component_update_bits(component, CS4270_TRANS,
  477. CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
  478. if (ret < 0) {
  479. dev_err(component->dev, "i2c write failed\n");
  480. return ret;
  481. }
  482. ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
  483. cs4270->supplies);
  484. return ret;
  485. }
  486. /**
  487. * cs4270_remove - ASoC remove function
  488. * @component: ASoC component
  489. *
  490. * This function is the counterpart to cs4270_probe().
  491. */
  492. static void cs4270_remove(struct snd_soc_component *component)
  493. {
  494. struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component);
  495. regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
  496. };
  497. #ifdef CONFIG_PM
  498. /* This suspend/resume implementation can handle both - a simple standby
  499. * where the codec remains powered, and a full suspend, where the voltage
  500. * domain the codec is connected to is teared down and/or any other hardware
  501. * reset condition is asserted.
  502. *
  503. * The codec's own power saving features are enabled in the suspend callback,
  504. * and all registers are written back to the hardware when resuming.
  505. */
  506. static int cs4270_soc_suspend(struct snd_soc_component *component)
  507. {
  508. struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component);
  509. int reg, ret;
  510. reg = snd_soc_component_read(component, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
  511. if (reg < 0)
  512. return reg;
  513. ret = snd_soc_component_write(component, CS4270_PWRCTL, reg);
  514. if (ret < 0)
  515. return ret;
  516. regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
  517. cs4270->supplies);
  518. return 0;
  519. }
  520. static int cs4270_soc_resume(struct snd_soc_component *component)
  521. {
  522. struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(component);
  523. int reg, ret;
  524. ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
  525. cs4270->supplies);
  526. if (ret != 0)
  527. return ret;
  528. /* In case the device was put to hard reset during sleep, we need to
  529. * wait 500ns here before any I2C communication. */
  530. ndelay(500);
  531. /* first restore the entire register cache ... */
  532. regcache_sync(cs4270->regmap);
  533. /* ... then disable the power-down bits */
  534. reg = snd_soc_component_read(component, CS4270_PWRCTL);
  535. reg &= ~CS4270_PWRCTL_PDN_ALL;
  536. return snd_soc_component_write(component, CS4270_PWRCTL, reg);
  537. }
  538. #else
  539. #define cs4270_soc_suspend NULL
  540. #define cs4270_soc_resume NULL
  541. #endif /* CONFIG_PM */
  542. /*
  543. * ASoC codec driver structure
  544. */
  545. static const struct snd_soc_component_driver soc_component_device_cs4270 = {
  546. .probe = cs4270_probe,
  547. .remove = cs4270_remove,
  548. .suspend = cs4270_soc_suspend,
  549. .resume = cs4270_soc_resume,
  550. .controls = cs4270_snd_controls,
  551. .num_controls = ARRAY_SIZE(cs4270_snd_controls),
  552. .dapm_widgets = cs4270_dapm_widgets,
  553. .num_dapm_widgets = ARRAY_SIZE(cs4270_dapm_widgets),
  554. .dapm_routes = cs4270_dapm_routes,
  555. .num_dapm_routes = ARRAY_SIZE(cs4270_dapm_routes),
  556. .idle_bias_on = 1,
  557. .use_pmdown_time = 1,
  558. .endianness = 1,
  559. .non_legacy_dai_naming = 1,
  560. };
  561. /*
  562. * cs4270_of_match - the device tree bindings
  563. */
  564. static const struct of_device_id cs4270_of_match[] = {
  565. { .compatible = "cirrus,cs4270", },
  566. { }
  567. };
  568. MODULE_DEVICE_TABLE(of, cs4270_of_match);
  569. static const struct regmap_config cs4270_regmap = {
  570. .reg_bits = 8,
  571. .val_bits = 8,
  572. .max_register = CS4270_LASTREG,
  573. .reg_defaults = cs4270_reg_defaults,
  574. .num_reg_defaults = ARRAY_SIZE(cs4270_reg_defaults),
  575. .cache_type = REGCACHE_RBTREE,
  576. .write_flag_mask = CS4270_I2C_INCR,
  577. .readable_reg = cs4270_reg_is_readable,
  578. .volatile_reg = cs4270_reg_is_volatile,
  579. };
  580. /**
  581. * cs4270_i2c_remove - deinitialize the I2C interface of the CS4270
  582. * @i2c_client: the I2C client object
  583. *
  584. * This function puts the chip into low power mode when the i2c device
  585. * is removed.
  586. */
  587. static int cs4270_i2c_remove(struct i2c_client *i2c_client)
  588. {
  589. struct cs4270_private *cs4270 = i2c_get_clientdata(i2c_client);
  590. gpiod_set_value_cansleep(cs4270->reset_gpio, 0);
  591. return 0;
  592. }
  593. /**
  594. * cs4270_i2c_probe - initialize the I2C interface of the CS4270
  595. * @i2c_client: the I2C client object
  596. * @id: the I2C device ID (ignored)
  597. *
  598. * This function is called whenever the I2C subsystem finds a device that
  599. * matches the device ID given via a prior call to i2c_add_driver().
  600. */
  601. static int cs4270_i2c_probe(struct i2c_client *i2c_client,
  602. const struct i2c_device_id *id)
  603. {
  604. struct cs4270_private *cs4270;
  605. unsigned int val;
  606. int ret, i;
  607. cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private),
  608. GFP_KERNEL);
  609. if (!cs4270)
  610. return -ENOMEM;
  611. /* get the power supply regulators */
  612. for (i = 0; i < ARRAY_SIZE(supply_names); i++)
  613. cs4270->supplies[i].supply = supply_names[i];
  614. ret = devm_regulator_bulk_get(&i2c_client->dev,
  615. ARRAY_SIZE(cs4270->supplies),
  616. cs4270->supplies);
  617. if (ret < 0)
  618. return ret;
  619. /* reset the device */
  620. cs4270->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev, "reset",
  621. GPIOD_OUT_LOW);
  622. if (IS_ERR(cs4270->reset_gpio)) {
  623. dev_dbg(&i2c_client->dev, "Error getting CS4270 reset GPIO\n");
  624. return PTR_ERR(cs4270->reset_gpio);
  625. }
  626. if (cs4270->reset_gpio) {
  627. dev_dbg(&i2c_client->dev, "Found reset GPIO\n");
  628. gpiod_set_value_cansleep(cs4270->reset_gpio, 1);
  629. }
  630. /* Sleep 500ns before i2c communications */
  631. ndelay(500);
  632. cs4270->regmap = devm_regmap_init_i2c(i2c_client, &cs4270_regmap);
  633. if (IS_ERR(cs4270->regmap))
  634. return PTR_ERR(cs4270->regmap);
  635. /* Verify that we have a CS4270 */
  636. ret = regmap_read(cs4270->regmap, CS4270_CHIPID, &val);
  637. if (ret < 0) {
  638. dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
  639. i2c_client->addr);
  640. return ret;
  641. }
  642. /* The top four bits of the chip ID should be 1100. */
  643. if ((val & 0xF0) != 0xC0) {
  644. dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
  645. i2c_client->addr);
  646. return -ENODEV;
  647. }
  648. dev_info(&i2c_client->dev, "found device at i2c address %X\n",
  649. i2c_client->addr);
  650. dev_info(&i2c_client->dev, "hardware revision %X\n", val & 0xF);
  651. i2c_set_clientdata(i2c_client, cs4270);
  652. ret = devm_snd_soc_register_component(&i2c_client->dev,
  653. &soc_component_device_cs4270, &cs4270_dai, 1);
  654. return ret;
  655. }
  656. /*
  657. * cs4270_id - I2C device IDs supported by this driver
  658. */
  659. static const struct i2c_device_id cs4270_id[] = {
  660. {"cs4270", 0},
  661. {}
  662. };
  663. MODULE_DEVICE_TABLE(i2c, cs4270_id);
  664. /*
  665. * cs4270_i2c_driver - I2C device identification
  666. *
  667. * This structure tells the I2C subsystem how to identify and support a
  668. * given I2C device type.
  669. */
  670. static struct i2c_driver cs4270_i2c_driver = {
  671. .driver = {
  672. .name = "cs4270",
  673. .of_match_table = cs4270_of_match,
  674. },
  675. .id_table = cs4270_id,
  676. .probe = cs4270_i2c_probe,
  677. .remove = cs4270_i2c_remove,
  678. };
  679. module_i2c_driver(cs4270_i2c_driver);
  680. MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
  681. MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
  682. MODULE_LICENSE("GPL");