cros_ec_codec.c 27 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2019 Google, Inc.
  4. *
  5. * ChromeOS Embedded Controller codec driver.
  6. *
  7. * This driver uses the cros-ec interface to communicate with the ChromeOS
  8. * EC for audio function.
  9. */
  10. #include <crypto/sha.h>
  11. #include <linux/acpi.h>
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/io.h>
  15. #include <linux/jiffies.h>
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/of.h>
  19. #include <linux/of_address.h>
  20. #include <linux/platform_data/cros_ec_commands.h>
  21. #include <linux/platform_data/cros_ec_proto.h>
  22. #include <linux/platform_device.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/tlv.h>
  27. struct cros_ec_codec_priv {
  28. struct device *dev;
  29. struct cros_ec_device *ec_device;
  30. /* common */
  31. uint32_t ec_capabilities;
  32. uint64_t ec_shm_addr;
  33. uint32_t ec_shm_len;
  34. uint64_t ap_shm_phys_addr;
  35. uint32_t ap_shm_len;
  36. uint64_t ap_shm_addr;
  37. uint64_t ap_shm_last_alloc;
  38. /* DMIC */
  39. atomic_t dmic_probed;
  40. /* I2S_RX */
  41. uint32_t i2s_rx_bclk_ratio;
  42. /* WoV */
  43. bool wov_enabled;
  44. uint8_t *wov_audio_shm_p;
  45. uint32_t wov_audio_shm_len;
  46. uint8_t wov_audio_shm_type;
  47. uint8_t *wov_lang_shm_p;
  48. uint32_t wov_lang_shm_len;
  49. uint8_t wov_lang_shm_type;
  50. struct mutex wov_dma_lock;
  51. uint8_t wov_buf[64000];
  52. uint32_t wov_rp, wov_wp;
  53. size_t wov_dma_offset;
  54. bool wov_burst_read;
  55. struct snd_pcm_substream *wov_substream;
  56. struct delayed_work wov_copy_work;
  57. struct notifier_block wov_notifier;
  58. };
  59. static int ec_codec_capable(struct cros_ec_codec_priv *priv, uint8_t cap)
  60. {
  61. return priv->ec_capabilities & BIT(cap);
  62. }
  63. static int send_ec_host_command(struct cros_ec_device *ec_dev, uint32_t cmd,
  64. uint8_t *out, size_t outsize,
  65. uint8_t *in, size_t insize)
  66. {
  67. int ret;
  68. struct cros_ec_command *msg;
  69. msg = kmalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL);
  70. if (!msg)
  71. return -ENOMEM;
  72. msg->version = 0;
  73. msg->command = cmd;
  74. msg->outsize = outsize;
  75. msg->insize = insize;
  76. if (outsize)
  77. memcpy(msg->data, out, outsize);
  78. ret = cros_ec_cmd_xfer_status(ec_dev, msg);
  79. if (ret < 0)
  80. goto error;
  81. if (insize)
  82. memcpy(in, msg->data, insize);
  83. ret = 0;
  84. error:
  85. kfree(msg);
  86. return ret;
  87. }
  88. static int dmic_get_gain(struct snd_kcontrol *kcontrol,
  89. struct snd_ctl_elem_value *ucontrol)
  90. {
  91. struct snd_soc_component *component =
  92. snd_soc_kcontrol_component(kcontrol);
  93. struct cros_ec_codec_priv *priv =
  94. snd_soc_component_get_drvdata(component);
  95. struct ec_param_ec_codec_dmic p;
  96. struct ec_response_ec_codec_dmic_get_gain_idx r;
  97. int ret;
  98. p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX;
  99. p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0;
  100. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
  101. (uint8_t *)&p, sizeof(p),
  102. (uint8_t *)&r, sizeof(r));
  103. if (ret < 0)
  104. return ret;
  105. ucontrol->value.integer.value[0] = r.gain;
  106. p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX;
  107. p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1;
  108. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
  109. (uint8_t *)&p, sizeof(p),
  110. (uint8_t *)&r, sizeof(r));
  111. if (ret < 0)
  112. return ret;
  113. ucontrol->value.integer.value[1] = r.gain;
  114. return 0;
  115. }
  116. static int dmic_put_gain(struct snd_kcontrol *kcontrol,
  117. struct snd_ctl_elem_value *ucontrol)
  118. {
  119. struct snd_soc_component *component =
  120. snd_soc_kcontrol_component(kcontrol);
  121. struct cros_ec_codec_priv *priv =
  122. snd_soc_component_get_drvdata(component);
  123. struct soc_mixer_control *control =
  124. (struct soc_mixer_control *)kcontrol->private_value;
  125. int max_dmic_gain = control->max;
  126. int left = ucontrol->value.integer.value[0];
  127. int right = ucontrol->value.integer.value[1];
  128. struct ec_param_ec_codec_dmic p;
  129. int ret;
  130. if (left > max_dmic_gain || right > max_dmic_gain)
  131. return -EINVAL;
  132. dev_dbg(component->dev, "set mic gain to %u, %u\n", left, right);
  133. p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX;
  134. p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0;
  135. p.set_gain_idx_param.gain = left;
  136. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
  137. (uint8_t *)&p, sizeof(p), NULL, 0);
  138. if (ret < 0)
  139. return ret;
  140. p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX;
  141. p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1;
  142. p.set_gain_idx_param.gain = right;
  143. return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
  144. (uint8_t *)&p, sizeof(p), NULL, 0);
  145. }
  146. static const DECLARE_TLV_DB_SCALE(dmic_gain_tlv, 0, 100, 0);
  147. enum {
  148. DMIC_CTL_GAIN = 0,
  149. };
  150. static struct snd_kcontrol_new dmic_controls[] = {
  151. [DMIC_CTL_GAIN] =
  152. SOC_DOUBLE_EXT_TLV("EC Mic Gain", SND_SOC_NOPM, SND_SOC_NOPM,
  153. 0, 0, 0, dmic_get_gain, dmic_put_gain,
  154. dmic_gain_tlv),
  155. };
  156. static int dmic_probe(struct snd_soc_component *component)
  157. {
  158. struct cros_ec_codec_priv *priv =
  159. snd_soc_component_get_drvdata(component);
  160. struct device *dev = priv->dev;
  161. struct soc_mixer_control *control;
  162. struct ec_param_ec_codec_dmic p;
  163. struct ec_response_ec_codec_dmic_get_max_gain r;
  164. int ret;
  165. if (!atomic_add_unless(&priv->dmic_probed, 1, 1))
  166. return 0;
  167. p.cmd = EC_CODEC_DMIC_GET_MAX_GAIN;
  168. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
  169. (uint8_t *)&p, sizeof(p),
  170. (uint8_t *)&r, sizeof(r));
  171. if (ret < 0) {
  172. dev_warn(dev, "get_max_gain() unsupported\n");
  173. return 0;
  174. }
  175. dev_dbg(dev, "max gain = %d\n", r.max_gain);
  176. control = (struct soc_mixer_control *)
  177. dmic_controls[DMIC_CTL_GAIN].private_value;
  178. control->max = r.max_gain;
  179. control->platform_max = r.max_gain;
  180. return snd_soc_add_component_controls(component,
  181. &dmic_controls[DMIC_CTL_GAIN], 1);
  182. }
  183. static int i2s_rx_hw_params(struct snd_pcm_substream *substream,
  184. struct snd_pcm_hw_params *params,
  185. struct snd_soc_dai *dai)
  186. {
  187. struct snd_soc_component *component = dai->component;
  188. struct cros_ec_codec_priv *priv =
  189. snd_soc_component_get_drvdata(component);
  190. struct ec_param_ec_codec_i2s_rx p;
  191. enum ec_codec_i2s_rx_sample_depth depth;
  192. uint32_t bclk;
  193. int ret;
  194. if (params_rate(params) != 48000)
  195. return -EINVAL;
  196. switch (params_format(params)) {
  197. case SNDRV_PCM_FORMAT_S16_LE:
  198. depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_16;
  199. break;
  200. case SNDRV_PCM_FORMAT_S24_LE:
  201. depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_24;
  202. break;
  203. default:
  204. return -EINVAL;
  205. }
  206. dev_dbg(component->dev, "set depth to %u\n", depth);
  207. p.cmd = EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH;
  208. p.set_sample_depth_param.depth = depth;
  209. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
  210. (uint8_t *)&p, sizeof(p), NULL, 0);
  211. if (ret < 0)
  212. return ret;
  213. if (priv->i2s_rx_bclk_ratio)
  214. bclk = params_rate(params) * priv->i2s_rx_bclk_ratio;
  215. else
  216. bclk = snd_soc_params_to_bclk(params);
  217. dev_dbg(component->dev, "set bclk to %u\n", bclk);
  218. p.cmd = EC_CODEC_I2S_RX_SET_BCLK;
  219. p.set_bclk_param.bclk = bclk;
  220. return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
  221. (uint8_t *)&p, sizeof(p), NULL, 0);
  222. }
  223. static int i2s_rx_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
  224. {
  225. struct snd_soc_component *component = dai->component;
  226. struct cros_ec_codec_priv *priv =
  227. snd_soc_component_get_drvdata(component);
  228. priv->i2s_rx_bclk_ratio = ratio;
  229. return 0;
  230. }
  231. static int i2s_rx_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  232. {
  233. struct snd_soc_component *component = dai->component;
  234. struct cros_ec_codec_priv *priv =
  235. snd_soc_component_get_drvdata(component);
  236. struct ec_param_ec_codec_i2s_rx p;
  237. enum ec_codec_i2s_rx_daifmt daifmt;
  238. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  239. case SND_SOC_DAIFMT_CBS_CFS:
  240. break;
  241. default:
  242. return -EINVAL;
  243. }
  244. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  245. case SND_SOC_DAIFMT_NB_NF:
  246. break;
  247. default:
  248. return -EINVAL;
  249. }
  250. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  251. case SND_SOC_DAIFMT_I2S:
  252. daifmt = EC_CODEC_I2S_RX_DAIFMT_I2S;
  253. break;
  254. case SND_SOC_DAIFMT_RIGHT_J:
  255. daifmt = EC_CODEC_I2S_RX_DAIFMT_RIGHT_J;
  256. break;
  257. case SND_SOC_DAIFMT_LEFT_J:
  258. daifmt = EC_CODEC_I2S_RX_DAIFMT_LEFT_J;
  259. break;
  260. default:
  261. return -EINVAL;
  262. }
  263. dev_dbg(component->dev, "set format to %u\n", daifmt);
  264. p.cmd = EC_CODEC_I2S_RX_SET_DAIFMT;
  265. p.set_daifmt_param.daifmt = daifmt;
  266. return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
  267. (uint8_t *)&p, sizeof(p), NULL, 0);
  268. }
  269. static const struct snd_soc_dai_ops i2s_rx_dai_ops = {
  270. .hw_params = i2s_rx_hw_params,
  271. .set_fmt = i2s_rx_set_fmt,
  272. .set_bclk_ratio = i2s_rx_set_bclk_ratio,
  273. };
  274. static int i2s_rx_event(struct snd_soc_dapm_widget *w,
  275. struct snd_kcontrol *kcontrol, int event)
  276. {
  277. struct snd_soc_component *component =
  278. snd_soc_dapm_to_component(w->dapm);
  279. struct cros_ec_codec_priv *priv =
  280. snd_soc_component_get_drvdata(component);
  281. struct ec_param_ec_codec_i2s_rx p = {};
  282. switch (event) {
  283. case SND_SOC_DAPM_PRE_PMU:
  284. dev_dbg(component->dev, "enable I2S RX\n");
  285. p.cmd = EC_CODEC_I2S_RX_ENABLE;
  286. break;
  287. case SND_SOC_DAPM_PRE_PMD:
  288. dev_dbg(component->dev, "disable I2S RX\n");
  289. p.cmd = EC_CODEC_I2S_RX_DISABLE;
  290. break;
  291. default:
  292. return 0;
  293. }
  294. return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
  295. (uint8_t *)&p, sizeof(p), NULL, 0);
  296. }
  297. static struct snd_soc_dapm_widget i2s_rx_dapm_widgets[] = {
  298. SND_SOC_DAPM_INPUT("DMIC"),
  299. SND_SOC_DAPM_SUPPLY("I2S RX Enable", SND_SOC_NOPM, 0, 0, i2s_rx_event,
  300. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
  301. SND_SOC_DAPM_AIF_OUT("I2S RX", "I2S Capture", 0, SND_SOC_NOPM, 0, 0),
  302. };
  303. static struct snd_soc_dapm_route i2s_rx_dapm_routes[] = {
  304. {"I2S RX", NULL, "DMIC"},
  305. {"I2S RX", NULL, "I2S RX Enable"},
  306. };
  307. static struct snd_soc_dai_driver i2s_rx_dai_driver = {
  308. .name = "EC Codec I2S RX",
  309. .capture = {
  310. .stream_name = "I2S Capture",
  311. .channels_min = 2,
  312. .channels_max = 2,
  313. .rates = SNDRV_PCM_RATE_48000,
  314. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  315. SNDRV_PCM_FMTBIT_S24_LE,
  316. },
  317. .ops = &i2s_rx_dai_ops,
  318. };
  319. static int i2s_rx_probe(struct snd_soc_component *component)
  320. {
  321. return dmic_probe(component);
  322. }
  323. static const struct snd_soc_component_driver i2s_rx_component_driver = {
  324. .probe = i2s_rx_probe,
  325. .dapm_widgets = i2s_rx_dapm_widgets,
  326. .num_dapm_widgets = ARRAY_SIZE(i2s_rx_dapm_widgets),
  327. .dapm_routes = i2s_rx_dapm_routes,
  328. .num_dapm_routes = ARRAY_SIZE(i2s_rx_dapm_routes),
  329. };
  330. static void *wov_map_shm(struct cros_ec_codec_priv *priv,
  331. uint8_t shm_id, uint32_t *len, uint8_t *type)
  332. {
  333. struct ec_param_ec_codec p;
  334. struct ec_response_ec_codec_get_shm_addr r;
  335. uint32_t req, offset;
  336. p.cmd = EC_CODEC_GET_SHM_ADDR;
  337. p.get_shm_addr_param.shm_id = shm_id;
  338. if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
  339. (uint8_t *)&p, sizeof(p),
  340. (uint8_t *)&r, sizeof(r)) < 0) {
  341. dev_err(priv->dev, "failed to EC_CODEC_GET_SHM_ADDR\n");
  342. return NULL;
  343. }
  344. dev_dbg(priv->dev, "phys_addr=%#llx, len=%#x\n", r.phys_addr, r.len);
  345. *len = r.len;
  346. *type = r.type;
  347. switch (r.type) {
  348. case EC_CODEC_SHM_TYPE_EC_RAM:
  349. return (void __force *)devm_ioremap_wc(priv->dev,
  350. r.phys_addr + priv->ec_shm_addr, r.len);
  351. case EC_CODEC_SHM_TYPE_SYSTEM_RAM:
  352. if (r.phys_addr) {
  353. dev_err(priv->dev, "unknown status\n");
  354. return NULL;
  355. }
  356. req = round_up(r.len, PAGE_SIZE);
  357. dev_dbg(priv->dev, "round up from %u to %u\n", r.len, req);
  358. if (priv->ap_shm_last_alloc + req >
  359. priv->ap_shm_phys_addr + priv->ap_shm_len) {
  360. dev_err(priv->dev, "insufficient space for AP SHM\n");
  361. return NULL;
  362. }
  363. dev_dbg(priv->dev, "alloc AP SHM addr=%#llx, len=%#x\n",
  364. priv->ap_shm_last_alloc, req);
  365. p.cmd = EC_CODEC_SET_SHM_ADDR;
  366. p.set_shm_addr_param.phys_addr = priv->ap_shm_last_alloc;
  367. p.set_shm_addr_param.len = req;
  368. p.set_shm_addr_param.shm_id = shm_id;
  369. if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
  370. (uint8_t *)&p, sizeof(p),
  371. NULL, 0) < 0) {
  372. dev_err(priv->dev, "failed to EC_CODEC_SET_SHM_ADDR\n");
  373. return NULL;
  374. }
  375. /*
  376. * Note: EC codec only requests for `r.len' but we allocate
  377. * round up PAGE_SIZE `req'.
  378. */
  379. offset = priv->ap_shm_last_alloc - priv->ap_shm_phys_addr;
  380. priv->ap_shm_last_alloc += req;
  381. return (void *)(uintptr_t)(priv->ap_shm_addr + offset);
  382. default:
  383. return NULL;
  384. }
  385. }
  386. static bool wov_queue_full(struct cros_ec_codec_priv *priv)
  387. {
  388. return ((priv->wov_wp + 1) % sizeof(priv->wov_buf)) == priv->wov_rp;
  389. }
  390. static size_t wov_queue_size(struct cros_ec_codec_priv *priv)
  391. {
  392. if (priv->wov_wp >= priv->wov_rp)
  393. return priv->wov_wp - priv->wov_rp;
  394. else
  395. return sizeof(priv->wov_buf) - priv->wov_rp + priv->wov_wp;
  396. }
  397. static void wov_queue_dequeue(struct cros_ec_codec_priv *priv, size_t len)
  398. {
  399. struct snd_pcm_runtime *runtime = priv->wov_substream->runtime;
  400. size_t req;
  401. while (len) {
  402. req = min(len, runtime->dma_bytes - priv->wov_dma_offset);
  403. if (priv->wov_wp >= priv->wov_rp)
  404. req = min(req, (size_t)priv->wov_wp - priv->wov_rp);
  405. else
  406. req = min(req, sizeof(priv->wov_buf) - priv->wov_rp);
  407. memcpy(runtime->dma_area + priv->wov_dma_offset,
  408. priv->wov_buf + priv->wov_rp, req);
  409. priv->wov_dma_offset += req;
  410. if (priv->wov_dma_offset == runtime->dma_bytes)
  411. priv->wov_dma_offset = 0;
  412. priv->wov_rp += req;
  413. if (priv->wov_rp == sizeof(priv->wov_buf))
  414. priv->wov_rp = 0;
  415. len -= req;
  416. }
  417. snd_pcm_period_elapsed(priv->wov_substream);
  418. }
  419. static void wov_queue_try_dequeue(struct cros_ec_codec_priv *priv)
  420. {
  421. size_t period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream);
  422. while (period_bytes && wov_queue_size(priv) >= period_bytes) {
  423. wov_queue_dequeue(priv, period_bytes);
  424. period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream);
  425. }
  426. }
  427. static void wov_queue_enqueue(struct cros_ec_codec_priv *priv,
  428. uint8_t *addr, size_t len, bool iomem)
  429. {
  430. size_t req;
  431. while (len) {
  432. if (wov_queue_full(priv)) {
  433. wov_queue_try_dequeue(priv);
  434. if (wov_queue_full(priv)) {
  435. dev_err(priv->dev, "overrun detected\n");
  436. return;
  437. }
  438. }
  439. if (priv->wov_wp >= priv->wov_rp)
  440. req = sizeof(priv->wov_buf) - priv->wov_wp;
  441. else
  442. /* Note: waste 1-byte to differentiate full and empty */
  443. req = priv->wov_rp - priv->wov_wp - 1;
  444. req = min(req, len);
  445. if (iomem)
  446. memcpy_fromio(priv->wov_buf + priv->wov_wp,
  447. (void __force __iomem *)addr, req);
  448. else
  449. memcpy(priv->wov_buf + priv->wov_wp, addr, req);
  450. priv->wov_wp += req;
  451. if (priv->wov_wp == sizeof(priv->wov_buf))
  452. priv->wov_wp = 0;
  453. addr += req;
  454. len -= req;
  455. }
  456. wov_queue_try_dequeue(priv);
  457. }
  458. static int wov_read_audio_shm(struct cros_ec_codec_priv *priv)
  459. {
  460. struct ec_param_ec_codec_wov p;
  461. struct ec_response_ec_codec_wov_read_audio_shm r;
  462. int ret;
  463. p.cmd = EC_CODEC_WOV_READ_AUDIO_SHM;
  464. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  465. (uint8_t *)&p, sizeof(p),
  466. (uint8_t *)&r, sizeof(r));
  467. if (ret) {
  468. dev_err(priv->dev, "failed to EC_CODEC_WOV_READ_AUDIO_SHM\n");
  469. return ret;
  470. }
  471. if (!r.len)
  472. dev_dbg(priv->dev, "no data, sleep\n");
  473. else
  474. wov_queue_enqueue(priv, priv->wov_audio_shm_p + r.offset, r.len,
  475. priv->wov_audio_shm_type == EC_CODEC_SHM_TYPE_EC_RAM);
  476. return -EAGAIN;
  477. }
  478. static int wov_read_audio(struct cros_ec_codec_priv *priv)
  479. {
  480. struct ec_param_ec_codec_wov p;
  481. struct ec_response_ec_codec_wov_read_audio r;
  482. int remain = priv->wov_burst_read ? 16000 : 320;
  483. int ret;
  484. while (remain >= 0) {
  485. p.cmd = EC_CODEC_WOV_READ_AUDIO;
  486. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  487. (uint8_t *)&p, sizeof(p),
  488. (uint8_t *)&r, sizeof(r));
  489. if (ret) {
  490. dev_err(priv->dev,
  491. "failed to EC_CODEC_WOV_READ_AUDIO\n");
  492. return ret;
  493. }
  494. if (!r.len) {
  495. dev_dbg(priv->dev, "no data, sleep\n");
  496. priv->wov_burst_read = false;
  497. break;
  498. }
  499. wov_queue_enqueue(priv, r.buf, r.len, false);
  500. remain -= r.len;
  501. }
  502. return -EAGAIN;
  503. }
  504. static void wov_copy_work(struct work_struct *w)
  505. {
  506. struct cros_ec_codec_priv *priv =
  507. container_of(w, struct cros_ec_codec_priv, wov_copy_work.work);
  508. int ret;
  509. mutex_lock(&priv->wov_dma_lock);
  510. if (!priv->wov_substream) {
  511. dev_warn(priv->dev, "no pcm substream\n");
  512. goto leave;
  513. }
  514. if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM))
  515. ret = wov_read_audio_shm(priv);
  516. else
  517. ret = wov_read_audio(priv);
  518. if (ret == -EAGAIN)
  519. schedule_delayed_work(&priv->wov_copy_work,
  520. msecs_to_jiffies(10));
  521. else if (ret)
  522. dev_err(priv->dev, "failed to read audio data\n");
  523. leave:
  524. mutex_unlock(&priv->wov_dma_lock);
  525. }
  526. static int wov_enable_get(struct snd_kcontrol *kcontrol,
  527. struct snd_ctl_elem_value *ucontrol)
  528. {
  529. struct snd_soc_component *c = snd_soc_kcontrol_component(kcontrol);
  530. struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c);
  531. ucontrol->value.integer.value[0] = priv->wov_enabled;
  532. return 0;
  533. }
  534. static int wov_enable_put(struct snd_kcontrol *kcontrol,
  535. struct snd_ctl_elem_value *ucontrol)
  536. {
  537. struct snd_soc_component *c = snd_soc_kcontrol_component(kcontrol);
  538. struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c);
  539. int enabled = ucontrol->value.integer.value[0];
  540. struct ec_param_ec_codec_wov p;
  541. int ret;
  542. if (priv->wov_enabled != enabled) {
  543. if (enabled)
  544. p.cmd = EC_CODEC_WOV_ENABLE;
  545. else
  546. p.cmd = EC_CODEC_WOV_DISABLE;
  547. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  548. (uint8_t *)&p, sizeof(p), NULL, 0);
  549. if (ret) {
  550. dev_err(priv->dev, "failed to %s wov\n",
  551. enabled ? "enable" : "disable");
  552. return ret;
  553. }
  554. priv->wov_enabled = enabled;
  555. }
  556. return 0;
  557. }
  558. static int wov_set_lang_shm(struct cros_ec_codec_priv *priv,
  559. uint8_t *buf, size_t size, uint8_t *digest)
  560. {
  561. struct ec_param_ec_codec_wov p;
  562. struct ec_param_ec_codec_wov_set_lang_shm *pp = &p.set_lang_shm_param;
  563. int ret;
  564. if (size > priv->wov_lang_shm_len) {
  565. dev_err(priv->dev, "no enough SHM size: %d\n",
  566. priv->wov_lang_shm_len);
  567. return -EIO;
  568. }
  569. switch (priv->wov_lang_shm_type) {
  570. case EC_CODEC_SHM_TYPE_EC_RAM:
  571. memcpy_toio((void __force __iomem *)priv->wov_lang_shm_p,
  572. buf, size);
  573. memset_io((void __force __iomem *)priv->wov_lang_shm_p + size,
  574. 0, priv->wov_lang_shm_len - size);
  575. break;
  576. case EC_CODEC_SHM_TYPE_SYSTEM_RAM:
  577. memcpy(priv->wov_lang_shm_p, buf, size);
  578. memset(priv->wov_lang_shm_p + size, 0,
  579. priv->wov_lang_shm_len - size);
  580. /* make sure write to memory before calling host command */
  581. wmb();
  582. break;
  583. }
  584. p.cmd = EC_CODEC_WOV_SET_LANG_SHM;
  585. memcpy(pp->hash, digest, SHA256_DIGEST_SIZE);
  586. pp->total_len = size;
  587. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  588. (uint8_t *)&p, sizeof(p), NULL, 0);
  589. if (ret) {
  590. dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG_SHM\n");
  591. return ret;
  592. }
  593. return 0;
  594. }
  595. static int wov_set_lang(struct cros_ec_codec_priv *priv,
  596. uint8_t *buf, size_t size, uint8_t *digest)
  597. {
  598. struct ec_param_ec_codec_wov p;
  599. struct ec_param_ec_codec_wov_set_lang *pp = &p.set_lang_param;
  600. size_t i, req;
  601. int ret;
  602. for (i = 0; i < size; i += req) {
  603. req = min(size - i, ARRAY_SIZE(pp->buf));
  604. p.cmd = EC_CODEC_WOV_SET_LANG;
  605. memcpy(pp->hash, digest, SHA256_DIGEST_SIZE);
  606. pp->total_len = size;
  607. pp->offset = i;
  608. memcpy(pp->buf, buf + i, req);
  609. pp->len = req;
  610. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  611. (uint8_t *)&p, sizeof(p), NULL, 0);
  612. if (ret) {
  613. dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG\n");
  614. return ret;
  615. }
  616. }
  617. return 0;
  618. }
  619. static int wov_hotword_model_put(struct snd_kcontrol *kcontrol,
  620. const unsigned int __user *bytes,
  621. unsigned int size)
  622. {
  623. struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  624. struct cros_ec_codec_priv *priv =
  625. snd_soc_component_get_drvdata(component);
  626. struct ec_param_ec_codec_wov p;
  627. struct ec_response_ec_codec_wov_get_lang r;
  628. uint8_t digest[SHA256_DIGEST_SIZE];
  629. uint8_t *buf;
  630. int ret;
  631. /* Skips the TLV header. */
  632. bytes += 2;
  633. size -= 8;
  634. dev_dbg(priv->dev, "%s: size=%d\n", __func__, size);
  635. buf = memdup_user(bytes, size);
  636. if (IS_ERR(buf))
  637. return PTR_ERR(buf);
  638. sha256(buf, size, digest);
  639. dev_dbg(priv->dev, "hash=%*phN\n", SHA256_DIGEST_SIZE, digest);
  640. p.cmd = EC_CODEC_WOV_GET_LANG;
  641. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
  642. (uint8_t *)&p, sizeof(p),
  643. (uint8_t *)&r, sizeof(r));
  644. if (ret)
  645. goto leave;
  646. if (memcmp(digest, r.hash, SHA256_DIGEST_SIZE) == 0) {
  647. dev_dbg(priv->dev, "not updated");
  648. goto leave;
  649. }
  650. if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM))
  651. ret = wov_set_lang_shm(priv, buf, size, digest);
  652. else
  653. ret = wov_set_lang(priv, buf, size, digest);
  654. leave:
  655. kfree(buf);
  656. return ret;
  657. }
  658. static struct snd_kcontrol_new wov_controls[] = {
  659. SOC_SINGLE_BOOL_EXT("Wake-on-Voice Switch", 0,
  660. wov_enable_get, wov_enable_put),
  661. SND_SOC_BYTES_TLV("Hotword Model", 0x11000, NULL,
  662. wov_hotword_model_put),
  663. };
  664. static struct snd_soc_dai_driver wov_dai_driver = {
  665. .name = "Wake on Voice",
  666. .capture = {
  667. .stream_name = "WoV Capture",
  668. .channels_min = 1,
  669. .channels_max = 1,
  670. .rates = SNDRV_PCM_RATE_16000,
  671. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  672. },
  673. };
  674. static int wov_host_event(struct notifier_block *nb,
  675. unsigned long queued_during_suspend, void *notify)
  676. {
  677. struct cros_ec_codec_priv *priv =
  678. container_of(nb, struct cros_ec_codec_priv, wov_notifier);
  679. u32 host_event;
  680. dev_dbg(priv->dev, "%s\n", __func__);
  681. host_event = cros_ec_get_host_event(priv->ec_device);
  682. if (host_event & EC_HOST_EVENT_MASK(EC_HOST_EVENT_WOV)) {
  683. schedule_delayed_work(&priv->wov_copy_work, 0);
  684. return NOTIFY_OK;
  685. } else {
  686. return NOTIFY_DONE;
  687. }
  688. }
  689. static int wov_probe(struct snd_soc_component *component)
  690. {
  691. struct cros_ec_codec_priv *priv =
  692. snd_soc_component_get_drvdata(component);
  693. int ret;
  694. mutex_init(&priv->wov_dma_lock);
  695. INIT_DELAYED_WORK(&priv->wov_copy_work, wov_copy_work);
  696. priv->wov_notifier.notifier_call = wov_host_event;
  697. ret = blocking_notifier_chain_register(
  698. &priv->ec_device->event_notifier, &priv->wov_notifier);
  699. if (ret)
  700. return ret;
  701. if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM)) {
  702. priv->wov_lang_shm_p = wov_map_shm(priv,
  703. EC_CODEC_SHM_ID_WOV_LANG,
  704. &priv->wov_lang_shm_len,
  705. &priv->wov_lang_shm_type);
  706. if (!priv->wov_lang_shm_p)
  707. return -EFAULT;
  708. }
  709. if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM)) {
  710. priv->wov_audio_shm_p = wov_map_shm(priv,
  711. EC_CODEC_SHM_ID_WOV_AUDIO,
  712. &priv->wov_audio_shm_len,
  713. &priv->wov_audio_shm_type);
  714. if (!priv->wov_audio_shm_p)
  715. return -EFAULT;
  716. }
  717. return dmic_probe(component);
  718. }
  719. static void wov_remove(struct snd_soc_component *component)
  720. {
  721. struct cros_ec_codec_priv *priv =
  722. snd_soc_component_get_drvdata(component);
  723. blocking_notifier_chain_unregister(
  724. &priv->ec_device->event_notifier, &priv->wov_notifier);
  725. }
  726. static int wov_pcm_open(struct snd_soc_component *component,
  727. struct snd_pcm_substream *substream)
  728. {
  729. static const struct snd_pcm_hardware hw_param = {
  730. .info = SNDRV_PCM_INFO_MMAP |
  731. SNDRV_PCM_INFO_INTERLEAVED |
  732. SNDRV_PCM_INFO_MMAP_VALID,
  733. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  734. .rates = SNDRV_PCM_RATE_16000,
  735. .channels_min = 1,
  736. .channels_max = 1,
  737. .period_bytes_min = PAGE_SIZE,
  738. .period_bytes_max = 0x20000 / 8,
  739. .periods_min = 8,
  740. .periods_max = 8,
  741. .buffer_bytes_max = 0x20000,
  742. };
  743. return snd_soc_set_runtime_hwparams(substream, &hw_param);
  744. }
  745. static int wov_pcm_hw_params(struct snd_soc_component *component,
  746. struct snd_pcm_substream *substream,
  747. struct snd_pcm_hw_params *hw_params)
  748. {
  749. struct cros_ec_codec_priv *priv =
  750. snd_soc_component_get_drvdata(component);
  751. mutex_lock(&priv->wov_dma_lock);
  752. priv->wov_substream = substream;
  753. priv->wov_rp = priv->wov_wp = 0;
  754. priv->wov_dma_offset = 0;
  755. priv->wov_burst_read = true;
  756. mutex_unlock(&priv->wov_dma_lock);
  757. return 0;
  758. }
  759. static int wov_pcm_hw_free(struct snd_soc_component *component,
  760. struct snd_pcm_substream *substream)
  761. {
  762. struct cros_ec_codec_priv *priv =
  763. snd_soc_component_get_drvdata(component);
  764. mutex_lock(&priv->wov_dma_lock);
  765. wov_queue_dequeue(priv, wov_queue_size(priv));
  766. priv->wov_substream = NULL;
  767. mutex_unlock(&priv->wov_dma_lock);
  768. cancel_delayed_work_sync(&priv->wov_copy_work);
  769. return 0;
  770. }
  771. static snd_pcm_uframes_t wov_pcm_pointer(struct snd_soc_component *component,
  772. struct snd_pcm_substream *substream)
  773. {
  774. struct snd_pcm_runtime *runtime = substream->runtime;
  775. struct cros_ec_codec_priv *priv =
  776. snd_soc_component_get_drvdata(component);
  777. return bytes_to_frames(runtime, priv->wov_dma_offset);
  778. }
  779. static int wov_pcm_new(struct snd_soc_component *component,
  780. struct snd_soc_pcm_runtime *rtd)
  781. {
  782. snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_VMALLOC,
  783. NULL, 0, 0);
  784. return 0;
  785. }
  786. static const struct snd_soc_component_driver wov_component_driver = {
  787. .probe = wov_probe,
  788. .remove = wov_remove,
  789. .controls = wov_controls,
  790. .num_controls = ARRAY_SIZE(wov_controls),
  791. .open = wov_pcm_open,
  792. .hw_params = wov_pcm_hw_params,
  793. .hw_free = wov_pcm_hw_free,
  794. .pointer = wov_pcm_pointer,
  795. .pcm_construct = wov_pcm_new,
  796. };
  797. static int cros_ec_codec_platform_probe(struct platform_device *pdev)
  798. {
  799. struct device *dev = &pdev->dev;
  800. struct cros_ec_device *ec_device = dev_get_drvdata(pdev->dev.parent);
  801. struct cros_ec_codec_priv *priv;
  802. struct ec_param_ec_codec p;
  803. struct ec_response_ec_codec_get_capabilities r;
  804. int ret;
  805. #ifdef CONFIG_OF
  806. struct device_node *node;
  807. struct resource res;
  808. u64 ec_shm_size;
  809. const __be32 *regaddr_p;
  810. #endif
  811. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  812. if (!priv)
  813. return -ENOMEM;
  814. #ifdef CONFIG_OF
  815. regaddr_p = of_get_address(dev->of_node, 0, &ec_shm_size, NULL);
  816. if (regaddr_p) {
  817. priv->ec_shm_addr = of_read_number(regaddr_p, 2);
  818. priv->ec_shm_len = ec_shm_size;
  819. dev_dbg(dev, "ec_shm_addr=%#llx len=%#x\n",
  820. priv->ec_shm_addr, priv->ec_shm_len);
  821. }
  822. node = of_parse_phandle(dev->of_node, "memory-region", 0);
  823. if (node) {
  824. ret = of_address_to_resource(node, 0, &res);
  825. if (!ret) {
  826. priv->ap_shm_phys_addr = res.start;
  827. priv->ap_shm_len = resource_size(&res);
  828. priv->ap_shm_addr =
  829. (uint64_t)(uintptr_t)devm_ioremap_wc(
  830. dev, priv->ap_shm_phys_addr,
  831. priv->ap_shm_len);
  832. priv->ap_shm_last_alloc = priv->ap_shm_phys_addr;
  833. dev_dbg(dev, "ap_shm_phys_addr=%#llx len=%#x\n",
  834. priv->ap_shm_phys_addr, priv->ap_shm_len);
  835. }
  836. }
  837. #endif
  838. priv->dev = dev;
  839. priv->ec_device = ec_device;
  840. atomic_set(&priv->dmic_probed, 0);
  841. p.cmd = EC_CODEC_GET_CAPABILITIES;
  842. ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
  843. (uint8_t *)&p, sizeof(p),
  844. (uint8_t *)&r, sizeof(r));
  845. if (ret) {
  846. dev_err(dev, "failed to EC_CODEC_GET_CAPABILITIES\n");
  847. return ret;
  848. }
  849. priv->ec_capabilities = r.capabilities;
  850. platform_set_drvdata(pdev, priv);
  851. ret = devm_snd_soc_register_component(dev, &i2s_rx_component_driver,
  852. &i2s_rx_dai_driver, 1);
  853. if (ret)
  854. return ret;
  855. return devm_snd_soc_register_component(dev, &wov_component_driver,
  856. &wov_dai_driver, 1);
  857. }
  858. #ifdef CONFIG_OF
  859. static const struct of_device_id cros_ec_codec_of_match[] = {
  860. { .compatible = "google,cros-ec-codec" },
  861. {},
  862. };
  863. MODULE_DEVICE_TABLE(of, cros_ec_codec_of_match);
  864. #endif
  865. #ifdef CONFIG_ACPI
  866. static const struct acpi_device_id cros_ec_codec_acpi_id[] = {
  867. { "GOOG0013", 0 },
  868. { }
  869. };
  870. MODULE_DEVICE_TABLE(acpi, cros_ec_codec_acpi_id);
  871. #endif
  872. static struct platform_driver cros_ec_codec_platform_driver = {
  873. .driver = {
  874. .name = "cros-ec-codec",
  875. .of_match_table = of_match_ptr(cros_ec_codec_of_match),
  876. .acpi_match_table = ACPI_PTR(cros_ec_codec_acpi_id),
  877. },
  878. .probe = cros_ec_codec_platform_probe,
  879. };
  880. module_platform_driver(cros_ec_codec_platform_driver);
  881. MODULE_LICENSE("GPL v2");
  882. MODULE_DESCRIPTION("ChromeOS EC codec driver");
  883. MODULE_AUTHOR("Cheng-Yi Chiang <cychiang@chromium.org>");
  884. MODULE_ALIAS("platform:cros-ec-codec");