ak4458.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Audio driver for AK4458 DAC
  4. //
  5. // Copyright (C) 2016 Asahi Kasei Microdevices Corporation
  6. // Copyright 2018 NXP
  7. #include <linux/delay.h>
  8. #include <linux/gpio/consumer.h>
  9. #include <linux/i2c.h>
  10. #include <linux/module.h>
  11. #include <linux/of_device.h>
  12. #include <linux/of_gpio.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/slab.h>
  16. #include <sound/initval.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include <sound/tlv.h>
  21. #include "ak4458.h"
  22. #define AK4458_NUM_SUPPLIES 2
  23. static const char *ak4458_supply_names[AK4458_NUM_SUPPLIES] = {
  24. "DVDD",
  25. "AVDD",
  26. };
  27. enum ak4458_type {
  28. AK4458 = 0,
  29. AK4497 = 1,
  30. };
  31. struct ak4458_drvdata {
  32. struct snd_soc_dai_driver *dai_drv;
  33. const struct snd_soc_component_driver *comp_drv;
  34. enum ak4458_type type;
  35. };
  36. /* AK4458 Codec Private Data */
  37. struct ak4458_priv {
  38. struct regulator_bulk_data supplies[AK4458_NUM_SUPPLIES];
  39. const struct ak4458_drvdata *drvdata;
  40. struct device *dev;
  41. struct regmap *regmap;
  42. struct gpio_desc *reset_gpiod;
  43. struct gpio_desc *mute_gpiod;
  44. int digfil; /* SSLOW, SD, SLOW bits */
  45. int fs; /* sampling rate */
  46. int fmt;
  47. int slots;
  48. int slot_width;
  49. u32 dsd_path; /* For ak4497 */
  50. };
  51. static const struct reg_default ak4458_reg_defaults[] = {
  52. { 0x00, 0x0C }, /* 0x00 AK4458_00_CONTROL1 */
  53. { 0x01, 0x22 }, /* 0x01 AK4458_01_CONTROL2 */
  54. { 0x02, 0x00 }, /* 0x02 AK4458_02_CONTROL3 */
  55. { 0x03, 0xFF }, /* 0x03 AK4458_03_LCHATT */
  56. { 0x04, 0xFF }, /* 0x04 AK4458_04_RCHATT */
  57. { 0x05, 0x00 }, /* 0x05 AK4458_05_CONTROL4 */
  58. { 0x06, 0x00 }, /* 0x06 AK4458_06_DSD1 */
  59. { 0x07, 0x03 }, /* 0x07 AK4458_07_CONTROL5 */
  60. { 0x08, 0x00 }, /* 0x08 AK4458_08_SOUND_CONTROL */
  61. { 0x09, 0x00 }, /* 0x09 AK4458_09_DSD2 */
  62. { 0x0A, 0x0D }, /* 0x0A AK4458_0A_CONTROL6 */
  63. { 0x0B, 0x0C }, /* 0x0B AK4458_0B_CONTROL7 */
  64. { 0x0C, 0x00 }, /* 0x0C AK4458_0C_CONTROL8 */
  65. { 0x0D, 0x00 }, /* 0x0D AK4458_0D_CONTROL9 */
  66. { 0x0E, 0x50 }, /* 0x0E AK4458_0E_CONTROL10 */
  67. { 0x0F, 0xFF }, /* 0x0F AK4458_0F_L2CHATT */
  68. { 0x10, 0xFF }, /* 0x10 AK4458_10_R2CHATT */
  69. { 0x11, 0xFF }, /* 0x11 AK4458_11_L3CHATT */
  70. { 0x12, 0xFF }, /* 0x12 AK4458_12_R3CHATT */
  71. { 0x13, 0xFF }, /* 0x13 AK4458_13_L4CHATT */
  72. { 0x14, 0xFF }, /* 0x14 AK4458_14_R4CHATT */
  73. };
  74. /*
  75. * Volume control:
  76. * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
  77. */
  78. static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  79. /*
  80. * DEM1 bit DEM0 bit Mode
  81. * 0 0 44.1kHz
  82. * 0 1 OFF (default)
  83. * 1 0 48kHz
  84. * 1 1 32kHz
  85. */
  86. static const char * const ak4458_dem_select_texts[] = {
  87. "44.1kHz", "OFF", "48kHz", "32kHz"
  88. };
  89. /*
  90. * SSLOW, SD, SLOW bits Digital Filter Setting
  91. * 0, 0, 0 : Sharp Roll-Off Filter
  92. * 0, 0, 1 : Slow Roll-Off Filter
  93. * 0, 1, 0 : Short delay Sharp Roll-Off Filter
  94. * 0, 1, 1 : Short delay Slow Roll-Off Filter
  95. * 1, *, * : Super Slow Roll-Off Filter
  96. */
  97. static const char * const ak4458_digfil_select_texts[] = {
  98. "Sharp Roll-Off Filter",
  99. "Slow Roll-Off Filter",
  100. "Short delay Sharp Roll-Off Filter",
  101. "Short delay Slow Roll-Off Filter",
  102. "Super Slow Roll-Off Filter"
  103. };
  104. /*
  105. * DZFB: Inverting Enable of DZF
  106. * 0: DZF goes H at Zero Detection
  107. * 1: DZF goes L at Zero Detection
  108. */
  109. static const char * const ak4458_dzfb_select_texts[] = {"H", "L"};
  110. /*
  111. * SC1-0 bits: Sound Mode Setting
  112. * 0 0 : Sound Mode 0
  113. * 0 1 : Sound Mode 1
  114. * 1 0 : Sound Mode 2
  115. * 1 1 : Reserved
  116. */
  117. static const char * const ak4458_sc_select_texts[] = {
  118. "Sound Mode 0", "Sound Mode 1", "Sound Mode 2"
  119. };
  120. /* FIR2-0 bits: FIR Filter Mode Setting */
  121. static const char * const ak4458_fir_select_texts[] = {
  122. "Mode 0", "Mode 1", "Mode 2", "Mode 3",
  123. "Mode 4", "Mode 5", "Mode 6", "Mode 7",
  124. };
  125. /* ATS1-0 bits Attenuation Speed */
  126. static const char * const ak4458_ats_select_texts[] = {
  127. "4080/fs", "2040/fs", "510/fs", "255/fs",
  128. };
  129. /* DIF2 bit Audio Interface Format Setting(BICK fs) */
  130. static const char * const ak4458_dif_select_texts[] = {"32fs,48fs", "64fs",};
  131. static const struct soc_enum ak4458_dac1_dem_enum =
  132. SOC_ENUM_SINGLE(AK4458_01_CONTROL2, 1,
  133. ARRAY_SIZE(ak4458_dem_select_texts),
  134. ak4458_dem_select_texts);
  135. static const struct soc_enum ak4458_dac2_dem_enum =
  136. SOC_ENUM_SINGLE(AK4458_0A_CONTROL6, 0,
  137. ARRAY_SIZE(ak4458_dem_select_texts),
  138. ak4458_dem_select_texts);
  139. static const struct soc_enum ak4458_dac3_dem_enum =
  140. SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 4,
  141. ARRAY_SIZE(ak4458_dem_select_texts),
  142. ak4458_dem_select_texts);
  143. static const struct soc_enum ak4458_dac4_dem_enum =
  144. SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 6,
  145. ARRAY_SIZE(ak4458_dem_select_texts),
  146. ak4458_dem_select_texts);
  147. static const struct soc_enum ak4458_digfil_enum =
  148. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak4458_digfil_select_texts),
  149. ak4458_digfil_select_texts);
  150. static const struct soc_enum ak4458_dzfb_enum =
  151. SOC_ENUM_SINGLE(AK4458_02_CONTROL3, 2,
  152. ARRAY_SIZE(ak4458_dzfb_select_texts),
  153. ak4458_dzfb_select_texts);
  154. static const struct soc_enum ak4458_sm_enum =
  155. SOC_ENUM_SINGLE(AK4458_08_SOUND_CONTROL, 0,
  156. ARRAY_SIZE(ak4458_sc_select_texts),
  157. ak4458_sc_select_texts);
  158. static const struct soc_enum ak4458_fir_enum =
  159. SOC_ENUM_SINGLE(AK4458_0C_CONTROL8, 0,
  160. ARRAY_SIZE(ak4458_fir_select_texts),
  161. ak4458_fir_select_texts);
  162. static const struct soc_enum ak4458_ats_enum =
  163. SOC_ENUM_SINGLE(AK4458_0B_CONTROL7, 6,
  164. ARRAY_SIZE(ak4458_ats_select_texts),
  165. ak4458_ats_select_texts);
  166. static const struct soc_enum ak4458_dif_enum =
  167. SOC_ENUM_SINGLE(AK4458_00_CONTROL1, 3,
  168. ARRAY_SIZE(ak4458_dif_select_texts),
  169. ak4458_dif_select_texts);
  170. static int get_digfil(struct snd_kcontrol *kcontrol,
  171. struct snd_ctl_elem_value *ucontrol)
  172. {
  173. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  174. struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
  175. ucontrol->value.enumerated.item[0] = ak4458->digfil;
  176. return 0;
  177. }
  178. static int set_digfil(struct snd_kcontrol *kcontrol,
  179. struct snd_ctl_elem_value *ucontrol)
  180. {
  181. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  182. struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
  183. int num;
  184. num = ucontrol->value.enumerated.item[0];
  185. if (num > 4)
  186. return -EINVAL;
  187. ak4458->digfil = num;
  188. /* write SD bit */
  189. snd_soc_component_update_bits(component, AK4458_01_CONTROL2,
  190. AK4458_SD_MASK,
  191. ((ak4458->digfil & 0x02) << 4));
  192. /* write SLOW bit */
  193. snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
  194. AK4458_SLOW_MASK,
  195. (ak4458->digfil & 0x01));
  196. /* write SSLOW bit */
  197. snd_soc_component_update_bits(component, AK4458_05_CONTROL4,
  198. AK4458_SSLOW_MASK,
  199. ((ak4458->digfil & 0x04) >> 2));
  200. return 0;
  201. }
  202. static const struct snd_kcontrol_new ak4458_snd_controls[] = {
  203. SOC_DOUBLE_R_TLV("DAC1 Playback Volume", AK4458_03_LCHATT,
  204. AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
  205. SOC_DOUBLE_R_TLV("DAC2 Playback Volume", AK4458_0F_L2CHATT,
  206. AK4458_10_R2CHATT, 0, 0xFF, 0, dac_tlv),
  207. SOC_DOUBLE_R_TLV("DAC3 Playback Volume", AK4458_11_L3CHATT,
  208. AK4458_12_R3CHATT, 0, 0xFF, 0, dac_tlv),
  209. SOC_DOUBLE_R_TLV("DAC4 Playback Volume", AK4458_13_L4CHATT,
  210. AK4458_14_R4CHATT, 0, 0xFF, 0, dac_tlv),
  211. SOC_ENUM("AK4458 De-emphasis Response DAC1", ak4458_dac1_dem_enum),
  212. SOC_ENUM("AK4458 De-emphasis Response DAC2", ak4458_dac2_dem_enum),
  213. SOC_ENUM("AK4458 De-emphasis Response DAC3", ak4458_dac3_dem_enum),
  214. SOC_ENUM("AK4458 De-emphasis Response DAC4", ak4458_dac4_dem_enum),
  215. SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum,
  216. get_digfil, set_digfil),
  217. SOC_ENUM("AK4458 Inverting Enable of DZFB", ak4458_dzfb_enum),
  218. SOC_ENUM("AK4458 Sound Mode", ak4458_sm_enum),
  219. SOC_ENUM("AK4458 FIR Filter Mode Setting", ak4458_fir_enum),
  220. SOC_ENUM("AK4458 Attenuation transition Time Setting",
  221. ak4458_ats_enum),
  222. SOC_ENUM("AK4458 BICK fs Setting", ak4458_dif_enum),
  223. };
  224. /* ak4458 dapm widgets */
  225. static const struct snd_soc_dapm_widget ak4458_dapm_widgets[] = {
  226. SND_SOC_DAPM_DAC("AK4458 DAC1", NULL, AK4458_0A_CONTROL6, 2, 0),/*pw*/
  227. SND_SOC_DAPM_AIF_IN("AK4458 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
  228. SND_SOC_DAPM_OUTPUT("AK4458 AOUTA"),
  229. SND_SOC_DAPM_DAC("AK4458 DAC2", NULL, AK4458_0A_CONTROL6, 3, 0),/*pw*/
  230. SND_SOC_DAPM_OUTPUT("AK4458 AOUTB"),
  231. SND_SOC_DAPM_DAC("AK4458 DAC3", NULL, AK4458_0B_CONTROL7, 2, 0),/*pw*/
  232. SND_SOC_DAPM_OUTPUT("AK4458 AOUTC"),
  233. SND_SOC_DAPM_DAC("AK4458 DAC4", NULL, AK4458_0B_CONTROL7, 3, 0),/*pw*/
  234. SND_SOC_DAPM_OUTPUT("AK4458 AOUTD"),
  235. };
  236. static const struct snd_soc_dapm_route ak4458_intercon[] = {
  237. {"AK4458 DAC1", NULL, "AK4458 SDTI"},
  238. {"AK4458 AOUTA", NULL, "AK4458 DAC1"},
  239. {"AK4458 DAC2", NULL, "AK4458 SDTI"},
  240. {"AK4458 AOUTB", NULL, "AK4458 DAC2"},
  241. {"AK4458 DAC3", NULL, "AK4458 SDTI"},
  242. {"AK4458 AOUTC", NULL, "AK4458 DAC3"},
  243. {"AK4458 DAC4", NULL, "AK4458 SDTI"},
  244. {"AK4458 AOUTD", NULL, "AK4458 DAC4"},
  245. };
  246. /* ak4497 controls */
  247. static const struct snd_kcontrol_new ak4497_snd_controls[] = {
  248. SOC_DOUBLE_R_TLV("DAC Playback Volume", AK4458_03_LCHATT,
  249. AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
  250. SOC_ENUM("AK4497 De-emphasis Response DAC", ak4458_dac1_dem_enum),
  251. SOC_ENUM_EXT("AK4497 Digital Filter Setting", ak4458_digfil_enum,
  252. get_digfil, set_digfil),
  253. SOC_ENUM("AK4497 Inverting Enable of DZFB", ak4458_dzfb_enum),
  254. SOC_ENUM("AK4497 Sound Mode", ak4458_sm_enum),
  255. SOC_ENUM("AK4497 Attenuation transition Time Setting",
  256. ak4458_ats_enum),
  257. };
  258. /* ak4497 dapm widgets */
  259. static const struct snd_soc_dapm_widget ak4497_dapm_widgets[] = {
  260. SND_SOC_DAPM_DAC("AK4497 DAC", NULL, AK4458_0A_CONTROL6, 2, 0),
  261. SND_SOC_DAPM_AIF_IN("AK4497 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
  262. SND_SOC_DAPM_OUTPUT("AK4497 AOUT"),
  263. };
  264. /* ak4497 dapm routes */
  265. static const struct snd_soc_dapm_route ak4497_intercon[] = {
  266. {"AK4497 DAC", NULL, "AK4497 SDTI"},
  267. {"AK4497 AOUT", NULL, "AK4497 DAC"},
  268. };
  269. static int ak4458_rstn_control(struct snd_soc_component *component, int bit)
  270. {
  271. int ret;
  272. if (bit)
  273. ret = snd_soc_component_update_bits(component,
  274. AK4458_00_CONTROL1,
  275. AK4458_RSTN_MASK,
  276. 0x1);
  277. else
  278. ret = snd_soc_component_update_bits(component,
  279. AK4458_00_CONTROL1,
  280. AK4458_RSTN_MASK,
  281. 0x0);
  282. if (ret < 0)
  283. return ret;
  284. return 0;
  285. }
  286. static int ak4458_hw_params(struct snd_pcm_substream *substream,
  287. struct snd_pcm_hw_params *params,
  288. struct snd_soc_dai *dai)
  289. {
  290. struct snd_soc_component *component = dai->component;
  291. struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
  292. int pcm_width = max(params_physical_width(params), ak4458->slot_width);
  293. u8 format, dsdsel0, dsdsel1;
  294. int nfs1, dsd_bclk;
  295. nfs1 = params_rate(params);
  296. ak4458->fs = nfs1;
  297. /* calculate bit clock */
  298. switch (params_format(params)) {
  299. case SNDRV_PCM_FORMAT_DSD_U8:
  300. case SNDRV_PCM_FORMAT_DSD_U16_LE:
  301. case SNDRV_PCM_FORMAT_DSD_U16_BE:
  302. case SNDRV_PCM_FORMAT_DSD_U32_LE:
  303. case SNDRV_PCM_FORMAT_DSD_U32_BE:
  304. dsd_bclk = nfs1 * params_physical_width(params);
  305. switch (dsd_bclk) {
  306. case 2822400:
  307. dsdsel0 = 0;
  308. dsdsel1 = 0;
  309. break;
  310. case 5644800:
  311. dsdsel0 = 1;
  312. dsdsel1 = 0;
  313. break;
  314. case 11289600:
  315. dsdsel0 = 0;
  316. dsdsel1 = 1;
  317. break;
  318. case 22579200:
  319. if (ak4458->drvdata->type == AK4497) {
  320. dsdsel0 = 1;
  321. dsdsel1 = 1;
  322. } else {
  323. dev_err(dai->dev, "DSD512 not supported.\n");
  324. return -EINVAL;
  325. }
  326. break;
  327. default:
  328. dev_err(dai->dev, "Unsupported dsd bclk.\n");
  329. return -EINVAL;
  330. }
  331. snd_soc_component_update_bits(component, AK4458_06_DSD1,
  332. AK4458_DSDSEL_MASK, dsdsel0);
  333. snd_soc_component_update_bits(component, AK4458_09_DSD2,
  334. AK4458_DSDSEL_MASK, dsdsel1);
  335. break;
  336. }
  337. /* Master Clock Frequency Auto Setting Mode Enable */
  338. snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80);
  339. switch (pcm_width) {
  340. case 16:
  341. if (ak4458->fmt == SND_SOC_DAIFMT_I2S)
  342. format = AK4458_DIF_24BIT_I2S;
  343. else
  344. format = AK4458_DIF_16BIT_LSB;
  345. break;
  346. case 32:
  347. switch (ak4458->fmt) {
  348. case SND_SOC_DAIFMT_I2S:
  349. format = AK4458_DIF_32BIT_I2S;
  350. break;
  351. case SND_SOC_DAIFMT_LEFT_J:
  352. format = AK4458_DIF_32BIT_MSB;
  353. break;
  354. case SND_SOC_DAIFMT_RIGHT_J:
  355. format = AK4458_DIF_32BIT_LSB;
  356. break;
  357. case SND_SOC_DAIFMT_DSP_B:
  358. format = AK4458_DIF_32BIT_MSB;
  359. break;
  360. case SND_SOC_DAIFMT_PDM:
  361. format = AK4458_DIF_32BIT_MSB;
  362. break;
  363. default:
  364. return -EINVAL;
  365. }
  366. break;
  367. default:
  368. return -EINVAL;
  369. }
  370. snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
  371. AK4458_DIF_MASK, format);
  372. ak4458_rstn_control(component, 0);
  373. ak4458_rstn_control(component, 1);
  374. return 0;
  375. }
  376. static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  377. {
  378. struct snd_soc_component *component = dai->component;
  379. struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
  380. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  381. case SND_SOC_DAIFMT_CBS_CFS: /* Slave Mode */
  382. break;
  383. case SND_SOC_DAIFMT_CBM_CFM: /* Master Mode is not supported */
  384. case SND_SOC_DAIFMT_CBS_CFM:
  385. case SND_SOC_DAIFMT_CBM_CFS:
  386. default:
  387. dev_err(component->dev, "Master mode unsupported\n");
  388. return -EINVAL;
  389. }
  390. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  391. case SND_SOC_DAIFMT_I2S:
  392. case SND_SOC_DAIFMT_LEFT_J:
  393. case SND_SOC_DAIFMT_RIGHT_J:
  394. case SND_SOC_DAIFMT_DSP_B:
  395. case SND_SOC_DAIFMT_PDM:
  396. ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
  397. break;
  398. default:
  399. dev_err(component->dev, "Audio format 0x%02X unsupported\n",
  400. fmt & SND_SOC_DAIFMT_FORMAT_MASK);
  401. return -EINVAL;
  402. }
  403. /* DSD mode */
  404. snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
  405. AK4458_DP_MASK,
  406. ak4458->fmt == SND_SOC_DAIFMT_PDM ?
  407. AK4458_DP_MASK : 0);
  408. ak4458_rstn_control(component, 0);
  409. ak4458_rstn_control(component, 1);
  410. return 0;
  411. }
  412. static const int att_speed[] = { 4080, 2040, 510, 255 };
  413. static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute, int direction)
  414. {
  415. struct snd_soc_component *component = dai->component;
  416. struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
  417. int nfs, ndt, reg;
  418. int ats;
  419. nfs = ak4458->fs;
  420. reg = snd_soc_component_read(component, AK4458_0B_CONTROL7);
  421. ats = (reg & AK4458_ATS_MASK) >> AK4458_ATS_SHIFT;
  422. ndt = att_speed[ats] / (nfs / 1000);
  423. if (mute) {
  424. snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 1);
  425. mdelay(ndt);
  426. if (ak4458->mute_gpiod)
  427. gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
  428. } else {
  429. if (ak4458->mute_gpiod)
  430. gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
  431. snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
  432. mdelay(ndt);
  433. }
  434. return 0;
  435. }
  436. static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
  437. unsigned int rx_mask, int slots, int slot_width)
  438. {
  439. struct snd_soc_component *component = dai->component;
  440. struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
  441. int mode;
  442. ak4458->slots = slots;
  443. ak4458->slot_width = slot_width;
  444. switch (slots * slot_width) {
  445. case 128:
  446. mode = AK4458_MODE_TDM128;
  447. break;
  448. case 256:
  449. mode = AK4458_MODE_TDM256;
  450. break;
  451. case 512:
  452. mode = AK4458_MODE_TDM512;
  453. break;
  454. default:
  455. mode = AK4458_MODE_NORMAL;
  456. break;
  457. }
  458. snd_soc_component_update_bits(component, AK4458_0A_CONTROL6,
  459. AK4458_MODE_MASK,
  460. mode);
  461. return 0;
  462. }
  463. #define AK4458_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
  464. SNDRV_PCM_FMTBIT_S24_LE |\
  465. SNDRV_PCM_FMTBIT_S32_LE |\
  466. SNDRV_PCM_FMTBIT_DSD_U8 |\
  467. SNDRV_PCM_FMTBIT_DSD_U16_LE |\
  468. SNDRV_PCM_FMTBIT_DSD_U32_LE)
  469. static const unsigned int ak4458_rates[] = {
  470. 8000, 11025, 16000, 22050,
  471. 32000, 44100, 48000, 88200,
  472. 96000, 176400, 192000, 352800,
  473. 384000, 705600, 768000, 1411200,
  474. 2822400,
  475. };
  476. static const struct snd_pcm_hw_constraint_list ak4458_rate_constraints = {
  477. .count = ARRAY_SIZE(ak4458_rates),
  478. .list = ak4458_rates,
  479. };
  480. static int ak4458_startup(struct snd_pcm_substream *substream,
  481. struct snd_soc_dai *dai)
  482. {
  483. int ret;
  484. ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
  485. SNDRV_PCM_HW_PARAM_RATE,
  486. &ak4458_rate_constraints);
  487. return ret;
  488. }
  489. static const struct snd_soc_dai_ops ak4458_dai_ops = {
  490. .startup = ak4458_startup,
  491. .hw_params = ak4458_hw_params,
  492. .set_fmt = ak4458_set_dai_fmt,
  493. .mute_stream = ak4458_set_dai_mute,
  494. .set_tdm_slot = ak4458_set_tdm_slot,
  495. .no_capture_mute = 1,
  496. };
  497. static struct snd_soc_dai_driver ak4458_dai = {
  498. .name = "ak4458-aif",
  499. .playback = {
  500. .stream_name = "Playback",
  501. .channels_min = 1,
  502. .channels_max = 8,
  503. .rates = SNDRV_PCM_RATE_KNOT,
  504. .formats = AK4458_FORMATS,
  505. },
  506. .ops = &ak4458_dai_ops,
  507. };
  508. static struct snd_soc_dai_driver ak4497_dai = {
  509. .name = "ak4497-aif",
  510. .playback = {
  511. .stream_name = "Playback",
  512. .channels_min = 1,
  513. .channels_max = 2,
  514. .rates = SNDRV_PCM_RATE_KNOT,
  515. .formats = AK4458_FORMATS,
  516. },
  517. .ops = &ak4458_dai_ops,
  518. };
  519. static void ak4458_reset(struct ak4458_priv *ak4458, bool active)
  520. {
  521. if (ak4458->reset_gpiod) {
  522. gpiod_set_value_cansleep(ak4458->reset_gpiod, active);
  523. usleep_range(1000, 2000);
  524. }
  525. }
  526. static int ak4458_init(struct snd_soc_component *component)
  527. {
  528. struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
  529. int ret;
  530. /* External Mute ON */
  531. if (ak4458->mute_gpiod)
  532. gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
  533. ak4458_reset(ak4458, false);
  534. ret = snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
  535. 0x80, 0x80); /* ACKS bit = 1; 10000000 */
  536. if (ret < 0)
  537. return ret;
  538. if (ak4458->drvdata->type == AK4497) {
  539. ret = snd_soc_component_update_bits(component, AK4458_09_DSD2,
  540. 0x4, (ak4458->dsd_path << 2));
  541. if (ret < 0)
  542. return ret;
  543. }
  544. return ak4458_rstn_control(component, 1);
  545. }
  546. static int ak4458_probe(struct snd_soc_component *component)
  547. {
  548. struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
  549. ak4458->fs = 48000;
  550. return ak4458_init(component);
  551. }
  552. static void ak4458_remove(struct snd_soc_component *component)
  553. {
  554. struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
  555. ak4458_reset(ak4458, true);
  556. }
  557. #ifdef CONFIG_PM
  558. static int __maybe_unused ak4458_runtime_suspend(struct device *dev)
  559. {
  560. struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
  561. regcache_cache_only(ak4458->regmap, true);
  562. ak4458_reset(ak4458, true);
  563. if (ak4458->mute_gpiod)
  564. gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
  565. regulator_bulk_disable(ARRAY_SIZE(ak4458->supplies),
  566. ak4458->supplies);
  567. return 0;
  568. }
  569. static int __maybe_unused ak4458_runtime_resume(struct device *dev)
  570. {
  571. struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
  572. int ret;
  573. ret = regulator_bulk_enable(ARRAY_SIZE(ak4458->supplies),
  574. ak4458->supplies);
  575. if (ret != 0) {
  576. dev_err(ak4458->dev, "Failed to enable supplies: %d\n", ret);
  577. return ret;
  578. }
  579. if (ak4458->mute_gpiod)
  580. gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
  581. ak4458_reset(ak4458, true);
  582. ak4458_reset(ak4458, false);
  583. regcache_cache_only(ak4458->regmap, false);
  584. regcache_mark_dirty(ak4458->regmap);
  585. return regcache_sync(ak4458->regmap);
  586. }
  587. #endif /* CONFIG_PM */
  588. static const struct snd_soc_component_driver soc_codec_dev_ak4458 = {
  589. .probe = ak4458_probe,
  590. .remove = ak4458_remove,
  591. .controls = ak4458_snd_controls,
  592. .num_controls = ARRAY_SIZE(ak4458_snd_controls),
  593. .dapm_widgets = ak4458_dapm_widgets,
  594. .num_dapm_widgets = ARRAY_SIZE(ak4458_dapm_widgets),
  595. .dapm_routes = ak4458_intercon,
  596. .num_dapm_routes = ARRAY_SIZE(ak4458_intercon),
  597. .idle_bias_on = 1,
  598. .use_pmdown_time = 1,
  599. .endianness = 1,
  600. .non_legacy_dai_naming = 1,
  601. };
  602. static const struct snd_soc_component_driver soc_codec_dev_ak4497 = {
  603. .probe = ak4458_probe,
  604. .remove = ak4458_remove,
  605. .controls = ak4497_snd_controls,
  606. .num_controls = ARRAY_SIZE(ak4497_snd_controls),
  607. .dapm_widgets = ak4497_dapm_widgets,
  608. .num_dapm_widgets = ARRAY_SIZE(ak4497_dapm_widgets),
  609. .dapm_routes = ak4497_intercon,
  610. .num_dapm_routes = ARRAY_SIZE(ak4497_intercon),
  611. .idle_bias_on = 1,
  612. .use_pmdown_time = 1,
  613. .endianness = 1,
  614. .non_legacy_dai_naming = 1,
  615. };
  616. static const struct regmap_config ak4458_regmap = {
  617. .reg_bits = 8,
  618. .val_bits = 8,
  619. .max_register = AK4458_14_R4CHATT,
  620. .reg_defaults = ak4458_reg_defaults,
  621. .num_reg_defaults = ARRAY_SIZE(ak4458_reg_defaults),
  622. .cache_type = REGCACHE_RBTREE,
  623. };
  624. static const struct ak4458_drvdata ak4458_drvdata = {
  625. .dai_drv = &ak4458_dai,
  626. .comp_drv = &soc_codec_dev_ak4458,
  627. .type = AK4458,
  628. };
  629. static const struct ak4458_drvdata ak4497_drvdata = {
  630. .dai_drv = &ak4497_dai,
  631. .comp_drv = &soc_codec_dev_ak4497,
  632. .type = AK4497,
  633. };
  634. static const struct dev_pm_ops ak4458_pm = {
  635. SET_RUNTIME_PM_OPS(ak4458_runtime_suspend, ak4458_runtime_resume, NULL)
  636. SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
  637. pm_runtime_force_resume)
  638. };
  639. static int ak4458_i2c_probe(struct i2c_client *i2c)
  640. {
  641. struct ak4458_priv *ak4458;
  642. int ret, i;
  643. ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL);
  644. if (!ak4458)
  645. return -ENOMEM;
  646. ak4458->regmap = devm_regmap_init_i2c(i2c, &ak4458_regmap);
  647. if (IS_ERR(ak4458->regmap))
  648. return PTR_ERR(ak4458->regmap);
  649. i2c_set_clientdata(i2c, ak4458);
  650. ak4458->dev = &i2c->dev;
  651. ak4458->drvdata = of_device_get_match_data(&i2c->dev);
  652. ak4458->reset_gpiod = devm_gpiod_get_optional(ak4458->dev, "reset",
  653. GPIOD_OUT_LOW);
  654. if (IS_ERR(ak4458->reset_gpiod))
  655. return PTR_ERR(ak4458->reset_gpiod);
  656. ak4458->mute_gpiod = devm_gpiod_get_optional(ak4458->dev, "mute",
  657. GPIOD_OUT_LOW);
  658. if (IS_ERR(ak4458->mute_gpiod))
  659. return PTR_ERR(ak4458->mute_gpiod);
  660. /* Optional property for ak4497 */
  661. of_property_read_u32(i2c->dev.of_node, "dsd-path", &ak4458->dsd_path);
  662. for (i = 0; i < ARRAY_SIZE(ak4458->supplies); i++)
  663. ak4458->supplies[i].supply = ak4458_supply_names[i];
  664. ret = devm_regulator_bulk_get(ak4458->dev, ARRAY_SIZE(ak4458->supplies),
  665. ak4458->supplies);
  666. if (ret != 0) {
  667. dev_err(ak4458->dev, "Failed to request supplies: %d\n", ret);
  668. return ret;
  669. }
  670. ret = devm_snd_soc_register_component(ak4458->dev,
  671. ak4458->drvdata->comp_drv,
  672. ak4458->drvdata->dai_drv, 1);
  673. if (ret < 0) {
  674. dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret);
  675. return ret;
  676. }
  677. pm_runtime_enable(&i2c->dev);
  678. regcache_cache_only(ak4458->regmap, true);
  679. return 0;
  680. }
  681. static int ak4458_i2c_remove(struct i2c_client *i2c)
  682. {
  683. pm_runtime_disable(&i2c->dev);
  684. return 0;
  685. }
  686. static const struct of_device_id ak4458_of_match[] = {
  687. { .compatible = "asahi-kasei,ak4458", .data = &ak4458_drvdata},
  688. { .compatible = "asahi-kasei,ak4497", .data = &ak4497_drvdata},
  689. { },
  690. };
  691. MODULE_DEVICE_TABLE(of, ak4458_of_match);
  692. static struct i2c_driver ak4458_i2c_driver = {
  693. .driver = {
  694. .name = "ak4458",
  695. .pm = &ak4458_pm,
  696. .of_match_table = ak4458_of_match,
  697. },
  698. .probe_new = ak4458_i2c_probe,
  699. .remove = ak4458_i2c_remove,
  700. };
  701. module_i2c_driver(ak4458_i2c_driver);
  702. MODULE_AUTHOR("Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>");
  703. MODULE_AUTHOR("Mihai Serban <mihai.serban@nxp.com>");
  704. MODULE_DESCRIPTION("ASoC AK4458 DAC driver");
  705. MODULE_LICENSE("GPL v2");