awacs.h 7.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Driver for PowerMac AWACS onboard soundchips
  4. * Copyright (c) 2001 by Takashi Iwai <tiwai@suse.de>
  5. * based on dmasound.c.
  6. */
  7. #ifndef __AWACS_H
  8. #define __AWACS_H
  9. /*******************************/
  10. /* AWACs Audio Register Layout */
  11. /*******************************/
  12. struct awacs_regs {
  13. unsigned control; /* Audio control register */
  14. unsigned pad0[3];
  15. unsigned codec_ctrl; /* Codec control register */
  16. unsigned pad1[3];
  17. unsigned codec_stat; /* Codec status register */
  18. unsigned pad2[3];
  19. unsigned clip_count; /* Clipping count register */
  20. unsigned pad3[3];
  21. unsigned byteswap; /* Data is little-endian if 1 */
  22. };
  23. /*******************/
  24. /* Audio Bit Masks */
  25. /*******************/
  26. /* Audio Control Reg Bit Masks */
  27. /* ----- ------- --- --- ----- */
  28. #define MASK_ISFSEL (0xf) /* Input SubFrame Select */
  29. #define MASK_OSFSEL (0xf << 4) /* Output SubFrame Select */
  30. #define MASK_RATE (0x7 << 8) /* Sound Rate */
  31. #define MASK_CNTLERR (0x1 << 11) /* Error */
  32. #define MASK_PORTCHG (0x1 << 12) /* Port Change */
  33. #define MASK_IEE (0x1 << 13) /* Enable Interrupt on Error */
  34. #define MASK_IEPC (0x1 << 14) /* Enable Interrupt on Port Change */
  35. #define MASK_SSFSEL (0x3 << 15) /* Status SubFrame Select */
  36. /* Audio Codec Control Reg Bit Masks */
  37. /* ----- ----- ------- --- --- ----- */
  38. #define MASK_NEWECMD (0x1 << 24) /* Lock: don't write to reg when 1 */
  39. #define MASK_EMODESEL (0x3 << 22) /* Send info out on which frame? */
  40. #define MASK_EXMODEADDR (0x3ff << 12) /* Extended Mode Address -- 10 bits */
  41. #define MASK_EXMODEDATA (0xfff) /* Extended Mode Data -- 12 bits */
  42. /* Audio Codec Control Address Values / Masks */
  43. /* ----- ----- ------- ------- ------ - ----- */
  44. #define MASK_ADDR0 (0x0 << 12) /* Expanded Data Mode Address 0 */
  45. #define MASK_ADDR_MUX MASK_ADDR0 /* Mux Control */
  46. #define MASK_ADDR_GAIN MASK_ADDR0
  47. #define MASK_ADDR1 (0x1 << 12) /* Expanded Data Mode Address 1 */
  48. #define MASK_ADDR_MUTE MASK_ADDR1
  49. #define MASK_ADDR_RATE MASK_ADDR1
  50. #define MASK_ADDR2 (0x2 << 12) /* Expanded Data Mode Address 2 */
  51. #define MASK_ADDR_VOLA MASK_ADDR2 /* Volume Control A -- Headphones */
  52. #define MASK_ADDR_VOLHD MASK_ADDR2
  53. #define MASK_ADDR4 (0x4 << 12) /* Expanded Data Mode Address 4 */
  54. #define MASK_ADDR_VOLC MASK_ADDR4 /* Volume Control C -- Speaker */
  55. #define MASK_ADDR_VOLSPK MASK_ADDR4
  56. /* additional registers of screamer */
  57. #define MASK_ADDR5 (0x5 << 12) /* Expanded Data Mode Address 5 */
  58. #define MASK_ADDR6 (0x6 << 12) /* Expanded Data Mode Address 6 */
  59. #define MASK_ADDR7 (0x7 << 12) /* Expanded Data Mode Address 7 */
  60. /* Address 0 Bit Masks & Macros */
  61. /* ------- - --- ----- - ------ */
  62. #define MASK_GAINRIGHT (0xf) /* Gain Right Mask */
  63. #define MASK_GAINLEFT (0xf << 4) /* Gain Left Mask */
  64. #define MASK_GAINLINE (0x1 << 8) /* Disable Mic preamp */
  65. #define MASK_GAINMIC (0x0 << 8) /* Enable Mic preamp */
  66. #define MASK_MUX_CD (0x1 << 9) /* Select CD in MUX */
  67. #define MASK_MUX_MIC (0x1 << 10) /* Select Mic in MUX */
  68. #define MASK_MUX_AUDIN (0x1 << 11) /* Select Audio In in MUX */
  69. #define MASK_MUX_LINE MASK_MUX_AUDIN
  70. #define SHIFT_GAINLINE 8
  71. #define SHIFT_MUX_CD 9
  72. #define SHIFT_MUX_MIC 10
  73. #define SHIFT_MUX_LINE 11
  74. #define GAINRIGHT(x) ((x) & MASK_GAINRIGHT)
  75. #define GAINLEFT(x) (((x) << 4) & MASK_GAINLEFT)
  76. /* Address 1 Bit Masks */
  77. /* ------- - --- ----- */
  78. #define MASK_ADDR1RES1 (0x3) /* Reserved */
  79. #define MASK_RECALIBRATE (0x1 << 2) /* Recalibrate */
  80. #define MASK_SAMPLERATE (0x7 << 3) /* Sample Rate: */
  81. #define MASK_LOOPTHRU (0x1 << 6) /* Loopthrough Enable */
  82. #define SHIFT_LOOPTHRU 6
  83. #define MASK_CMUTE (0x1 << 7) /* Output C (Speaker) Mute when 1 */
  84. #define MASK_SPKMUTE MASK_CMUTE
  85. #define SHIFT_SPKMUTE 7
  86. #define MASK_ADDR1RES2 (0x1 << 8) /* Reserved */
  87. #define MASK_AMUTE (0x1 << 9) /* Output A (Headphone) Mute when 1 */
  88. #define MASK_HDMUTE MASK_AMUTE
  89. #define SHIFT_HDMUTE 9
  90. #define MASK_PAROUT (0x3 << 10) /* Parallel Out (???) */
  91. #define MASK_PAROUT0 (0x1 << 10) /* Parallel Out (???) */
  92. #define MASK_PAROUT1 (0x1 << 11) /* Parallel Out (enable speaker) */
  93. #define SHIFT_PAROUT 10
  94. #define SHIFT_PAROUT0 10
  95. #define SHIFT_PAROUT1 11
  96. #define SAMPLERATE_48000 (0x0 << 3) /* 48 or 44.1 kHz */
  97. #define SAMPLERATE_32000 (0x1 << 3) /* 32 or 29.4 kHz */
  98. #define SAMPLERATE_24000 (0x2 << 3) /* 24 or 22.05 kHz */
  99. #define SAMPLERATE_19200 (0x3 << 3) /* 19.2 or 17.64 kHz */
  100. #define SAMPLERATE_16000 (0x4 << 3) /* 16 or 14.7 kHz */
  101. #define SAMPLERATE_12000 (0x5 << 3) /* 12 or 11.025 kHz */
  102. #define SAMPLERATE_9600 (0x6 << 3) /* 9.6 or 8.82 kHz */
  103. #define SAMPLERATE_8000 (0x7 << 3) /* 8 or 7.35 kHz */
  104. /* Address 2 & 4 Bit Masks & Macros */
  105. /* ------- - - - --- ----- - ------ */
  106. #define MASK_OUTVOLRIGHT (0xf) /* Output Right Volume */
  107. #define MASK_ADDR2RES1 (0x2 << 4) /* Reserved */
  108. #define MASK_ADDR4RES1 MASK_ADDR2RES1
  109. #define MASK_OUTVOLLEFT (0xf << 6) /* Output Left Volume */
  110. #define MASK_ADDR2RES2 (0x2 << 10) /* Reserved */
  111. #define MASK_ADDR4RES2 MASK_ADDR2RES2
  112. #define VOLRIGHT(x) (((~(x)) & MASK_OUTVOLRIGHT))
  113. #define VOLLEFT(x) (((~(x)) << 6) & MASK_OUTVOLLEFT)
  114. /* address 6 */
  115. #define MASK_MIC_BOOST (0x4) /* screamer mic boost */
  116. #define SHIFT_MIC_BOOST 2
  117. /* Audio Codec Status Reg Bit Masks */
  118. /* ----- ----- ------ --- --- ----- */
  119. #define MASK_EXTEND (0x1 << 23) /* Extend */
  120. #define MASK_VALID (0x1 << 22) /* Valid Data? */
  121. #define MASK_OFLEFT (0x1 << 21) /* Overflow Left */
  122. #define MASK_OFRIGHT (0x1 << 20) /* Overflow Right */
  123. #define MASK_ERRCODE (0xf << 16) /* Error Code */
  124. #define MASK_REVISION (0xf << 12) /* Revision Number */
  125. #define MASK_MFGID (0xf << 8) /* Mfg. ID */
  126. #define MASK_CODSTATRES (0xf << 4) /* bits 4 - 7 reserved */
  127. #define MASK_INSENSE (0xf) /* port sense bits: */
  128. #define MASK_HDPCONN 8 /* headphone plugged in */
  129. #define MASK_LOCONN 4 /* line-out plugged in */
  130. #define MASK_LICONN 2 /* line-in plugged in */
  131. #define MASK_MICCONN 1 /* microphone plugged in */
  132. #define MASK_LICONN_IMAC 8 /* line-in plugged in */
  133. #define MASK_HDPRCONN_IMAC 4 /* headphone right plugged in */
  134. #define MASK_HDPLCONN_IMAC 2 /* headphone left plugged in */
  135. #define MASK_LOCONN_IMAC 1 /* line-out plugged in */
  136. /* Clipping Count Reg Bit Masks */
  137. /* -------- ----- --- --- ----- */
  138. #define MASK_CLIPLEFT (0xff << 7) /* Clipping Count, Left Channel */
  139. #define MASK_CLIPRIGHT (0xff) /* Clipping Count, Right Channel */
  140. /* DBDMA ChannelStatus Bit Masks */
  141. /* ----- ------------- --- ----- */
  142. #define MASK_CSERR (0x1 << 7) /* Error */
  143. #define MASK_EOI (0x1 << 6) /* End of Input --
  144. only for Input Channel */
  145. #define MASK_CSUNUSED (0x1f << 1) /* bits 1-5 not used */
  146. #define MASK_WAIT (0x1) /* Wait */
  147. /* Various Rates */
  148. /* ------- ----- */
  149. #define RATE_48000 (0x0 << 8) /* 48 kHz */
  150. #define RATE_44100 (0x0 << 8) /* 44.1 kHz */
  151. #define RATE_32000 (0x1 << 8) /* 32 kHz */
  152. #define RATE_29400 (0x1 << 8) /* 29.4 kHz */
  153. #define RATE_24000 (0x2 << 8) /* 24 kHz */
  154. #define RATE_22050 (0x2 << 8) /* 22.05 kHz */
  155. #define RATE_19200 (0x3 << 8) /* 19.2 kHz */
  156. #define RATE_17640 (0x3 << 8) /* 17.64 kHz */
  157. #define RATE_16000 (0x4 << 8) /* 16 kHz */
  158. #define RATE_14700 (0x4 << 8) /* 14.7 kHz */
  159. #define RATE_12000 (0x5 << 8) /* 12 kHz */
  160. #define RATE_11025 (0x5 << 8) /* 11.025 kHz */
  161. #define RATE_9600 (0x6 << 8) /* 9.6 kHz */
  162. #define RATE_8820 (0x6 << 8) /* 8.82 kHz */
  163. #define RATE_8000 (0x7 << 8) /* 8 kHz */
  164. #define RATE_7350 (0x7 << 8) /* 7.35 kHz */
  165. #define RATE_LOW 1 /* HIGH = 48kHz, etc; LOW = 44.1kHz, etc. */
  166. #endif /* __AWACS_H */