sis7019.h 13 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. #ifndef __sis7019_h__
  3. #define __sis7019_h__
  4. /*
  5. * Definitions for SiS7019 Audio Accelerator
  6. *
  7. * Copyright (C) 2004-2007, David Dillow
  8. * Written by David Dillow <dave@thedillows.org>
  9. * Inspired by the Trident 4D-WaveDX/NX driver.
  10. *
  11. * All rights reserved.
  12. */
  13. /* General Control Register */
  14. #define SIS_GCR 0x00
  15. #define SIS_GCR_MACRO_POWER_DOWN 0x80000000
  16. #define SIS_GCR_MODEM_ENABLE 0x00010000
  17. #define SIS_GCR_SOFTWARE_RESET 0x00000001
  18. /* General Interrupt Enable Register */
  19. #define SIS_GIER 0x04
  20. #define SIS_GIER_MODEM_TIMER_IRQ_ENABLE 0x00100000
  21. #define SIS_GIER_MODEM_RX_DMA_IRQ_ENABLE 0x00080000
  22. #define SIS_GIER_MODEM_TX_DMA_IRQ_ENABLE 0x00040000
  23. #define SIS_GIER_AC97_GPIO1_IRQ_ENABLE 0x00020000
  24. #define SIS_GIER_AC97_GPIO0_IRQ_ENABLE 0x00010000
  25. #define SIS_GIER_AC97_SAMPLE_TIMER_IRQ_ENABLE 0x00000010
  26. #define SIS_GIER_AUDIO_GLOBAL_TIMER_IRQ_ENABLE 0x00000008
  27. #define SIS_GIER_AUDIO_RECORD_DMA_IRQ_ENABLE 0x00000004
  28. #define SIS_GIER_AUDIO_PLAY_DMA_IRQ_ENABLE 0x00000002
  29. #define SIS_GIER_AUDIO_WAVE_ENGINE_IRQ_ENABLE 0x00000001
  30. /* General Interrupt Status Register */
  31. #define SIS_GISR 0x08
  32. #define SIS_GISR_MODEM_TIMER_IRQ_STATUS 0x00100000
  33. #define SIS_GISR_MODEM_RX_DMA_IRQ_STATUS 0x00080000
  34. #define SIS_GISR_MODEM_TX_DMA_IRQ_STATUS 0x00040000
  35. #define SIS_GISR_AC97_GPIO1_IRQ_STATUS 0x00020000
  36. #define SIS_GISR_AC97_GPIO0_IRQ_STATUS 0x00010000
  37. #define SIS_GISR_AC97_SAMPLE_TIMER_IRQ_STATUS 0x00000010
  38. #define SIS_GISR_AUDIO_GLOBAL_TIMER_IRQ_STATUS 0x00000008
  39. #define SIS_GISR_AUDIO_RECORD_DMA_IRQ_STATUS 0x00000004
  40. #define SIS_GISR_AUDIO_PLAY_DMA_IRQ_STATUS 0x00000002
  41. #define SIS_GISR_AUDIO_WAVE_ENGINE_IRQ_STATUS 0x00000001
  42. /* DMA Control Register */
  43. #define SIS_DMA_CSR 0x10
  44. #define SIS_DMA_CSR_PCI_SETTINGS 0x0000001d
  45. #define SIS_DMA_CSR_CONCURRENT_ENABLE 0x00000200
  46. #define SIS_DMA_CSR_PIPELINE_ENABLE 0x00000100
  47. #define SIS_DMA_CSR_RX_DRAIN_ENABLE 0x00000010
  48. #define SIS_DMA_CSR_RX_FILL_ENABLE 0x00000008
  49. #define SIS_DMA_CSR_TX_DRAIN_ENABLE 0x00000004
  50. #define SIS_DMA_CSR_TX_LOWPRI_FILL_ENABLE 0x00000002
  51. #define SIS_DMA_CSR_TX_HIPRI_FILL_ENABLE 0x00000001
  52. /* Playback Channel Start Registers */
  53. #define SIS_PLAY_START_A_REG 0x14
  54. #define SIS_PLAY_START_B_REG 0x18
  55. /* Playback Channel Stop Registers */
  56. #define SIS_PLAY_STOP_A_REG 0x1c
  57. #define SIS_PLAY_STOP_B_REG 0x20
  58. /* Recording Channel Start Register */
  59. #define SIS_RECORD_START_REG 0x24
  60. /* Recording Channel Stop Register */
  61. #define SIS_RECORD_STOP_REG 0x28
  62. /* Playback Interrupt Status Registers */
  63. #define SIS_PISR_A 0x2c
  64. #define SIS_PISR_B 0x30
  65. /* Recording Interrupt Status Register */
  66. #define SIS_RISR 0x34
  67. /* AC97 AC-link Playback Source Register */
  68. #define SIS_AC97_PSR 0x40
  69. #define SIS_AC97_PSR_MODEM_HEADSET_SRC_MIXER 0x0f000000
  70. #define SIS_AC97_PSR_MODEM_LINE2_SRC_MIXER 0x00f00000
  71. #define SIS_AC97_PSR_MODEM_LINE1_SRC_MIXER 0x000f0000
  72. #define SIS_AC97_PSR_PCM_LFR_SRC_MIXER 0x0000f000
  73. #define SIS_AC97_PSR_PCM_SURROUND_SRC_MIXER 0x00000f00
  74. #define SIS_AC97_PSR_PCM_CENTER_SRC_MIXER 0x000000f0
  75. #define SIS_AC97_PSR_PCM_LR_SRC_MIXER 0x0000000f
  76. /* AC97 AC-link Command Register */
  77. #define SIS_AC97_CMD 0x50
  78. #define SIS_AC97_CMD_DATA_MASK 0xffff0000
  79. #define SIS_AC97_CMD_REG_MASK 0x0000ff00
  80. #define SIS_AC97_CMD_CODEC3_READ 0x0000000d
  81. #define SIS_AC97_CMD_CODEC3_WRITE 0x0000000c
  82. #define SIS_AC97_CMD_CODEC2_READ 0x0000000b
  83. #define SIS_AC97_CMD_CODEC2_WRITE 0x0000000a
  84. #define SIS_AC97_CMD_CODEC_READ 0x00000009
  85. #define SIS_AC97_CMD_CODEC_WRITE 0x00000008
  86. #define SIS_AC97_CMD_CODEC_WARM_RESET 0x00000005
  87. #define SIS_AC97_CMD_CODEC_COLD_RESET 0x00000004
  88. #define SIS_AC97_CMD_DONE 0x00000000
  89. /* AC97 AC-link Semaphore Register */
  90. #define SIS_AC97_SEMA 0x54
  91. #define SIS_AC97_SEMA_BUSY 0x00000001
  92. #define SIS_AC97_SEMA_RELEASE 0x00000000
  93. /* AC97 AC-link Status Register */
  94. #define SIS_AC97_STATUS 0x58
  95. #define SIS_AC97_STATUS_AUDIO_D2_INACT_SECS 0x03f00000
  96. #define SIS_AC97_STATUS_MODEM_ALIVE 0x00002000
  97. #define SIS_AC97_STATUS_AUDIO_ALIVE 0x00001000
  98. #define SIS_AC97_STATUS_CODEC3_READY 0x00000400
  99. #define SIS_AC97_STATUS_CODEC2_READY 0x00000200
  100. #define SIS_AC97_STATUS_CODEC_READY 0x00000100
  101. #define SIS_AC97_STATUS_WARM_RESET 0x00000080
  102. #define SIS_AC97_STATUS_COLD_RESET 0x00000040
  103. #define SIS_AC97_STATUS_POWERED_DOWN 0x00000020
  104. #define SIS_AC97_STATUS_NORMAL 0x00000010
  105. #define SIS_AC97_STATUS_READ_EXPIRED 0x00000004
  106. #define SIS_AC97_STATUS_SEMAPHORE 0x00000002
  107. #define SIS_AC97_STATUS_BUSY 0x00000001
  108. /* AC97 AC-link Audio Configuration Register */
  109. #define SIS_AC97_CONF 0x5c
  110. #define SIS_AC97_CONF_AUDIO_ALIVE 0x80000000
  111. #define SIS_AC97_CONF_WARM_RESET_ENABLE 0x40000000
  112. #define SIS_AC97_CONF_PR6_ENABLE 0x20000000
  113. #define SIS_AC97_CONF_PR5_ENABLE 0x10000000
  114. #define SIS_AC97_CONF_PR4_ENABLE 0x08000000
  115. #define SIS_AC97_CONF_PR3_ENABLE 0x04000000
  116. #define SIS_AC97_CONF_PR2_PR7_ENABLE 0x02000000
  117. #define SIS_AC97_CONF_PR0_PR1_ENABLE 0x01000000
  118. #define SIS_AC97_CONF_AUTO_PM_ENABLE 0x00800000
  119. #define SIS_AC97_CONF_PCM_LFE_ENABLE 0x00080000
  120. #define SIS_AC97_CONF_PCM_SURROUND_ENABLE 0x00040000
  121. #define SIS_AC97_CONF_PCM_CENTER_ENABLE 0x00020000
  122. #define SIS_AC97_CONF_PCM_LR_ENABLE 0x00010000
  123. #define SIS_AC97_CONF_PCM_CAP_MIC_ENABLE 0x00002000
  124. #define SIS_AC97_CONF_PCM_CAP_LR_ENABLE 0x00001000
  125. #define SIS_AC97_CONF_PCM_CAP_MIC_FROM_CODEC3 0x00000200
  126. #define SIS_AC97_CONF_PCM_CAP_LR_FROM_CODEC3 0x00000100
  127. #define SIS_AC97_CONF_CODEC3_PM_VRM 0x00000080
  128. #define SIS_AC97_CONF_CODEC_PM_VRM 0x00000040
  129. #define SIS_AC97_CONF_CODEC3_VRA_ENABLE 0x00000020
  130. #define SIS_AC97_CONF_CODEC_VRA_ENABLE 0x00000010
  131. #define SIS_AC97_CONF_CODEC3_PM_EAC 0x00000008
  132. #define SIS_AC97_CONF_CODEC_PM_EAC 0x00000004
  133. #define SIS_AC97_CONF_CODEC3_EXISTS 0x00000002
  134. #define SIS_AC97_CONF_CODEC_EXISTS 0x00000001
  135. /* Playback Channel Sync Group registers */
  136. #define SIS_PLAY_SYNC_GROUP_A 0x80
  137. #define SIS_PLAY_SYNC_GROUP_B 0x84
  138. #define SIS_PLAY_SYNC_GROUP_C 0x88
  139. #define SIS_PLAY_SYNC_GROUP_D 0x8c
  140. #define SIS_MIXER_SYNC_GROUP 0x90
  141. /* Wave Engine Config and Control Register */
  142. #define SIS_WECCR 0xa0
  143. #define SIS_WECCR_TESTMODE_MASK 0x00300000
  144. #define SIS_WECCR_TESTMODE_NORMAL 0x00000000
  145. #define SIS_WECCR_TESTMODE_BYPASS_NSO_ALPHA 0x00100000
  146. #define SIS_WECCR_TESTMODE_BYPASS_FC 0x00200000
  147. #define SIS_WECCR_TESTMODE_BYPASS_WOL 0x00300000
  148. #define SIS_WECCR_RESONANCE_DELAY_MASK 0x00060000
  149. #define SIS_WECCR_RESONANCE_DELAY_NONE 0x00000000
  150. #define SIS_WECCR_RESONANCE_DELAY_FC_1F00 0x00020000
  151. #define SIS_WECCR_RESONANCE_DELAY_FC_1E00 0x00040000
  152. #define SIS_WECCR_RESONANCE_DELAY_FC_1C00 0x00060000
  153. #define SIS_WECCR_IGNORE_CHANNEL_PARMS 0x00010000
  154. #define SIS_WECCR_COMMAND_CHANNEL_ID_MASK 0x0003ff00
  155. #define SIS_WECCR_COMMAND_MASK 0x00000007
  156. #define SIS_WECCR_COMMAND_NONE 0x00000000
  157. #define SIS_WECCR_COMMAND_DONE 0x00000000
  158. #define SIS_WECCR_COMMAND_PAUSE 0x00000001
  159. #define SIS_WECCR_COMMAND_TOGGLE_VEG 0x00000002
  160. #define SIS_WECCR_COMMAND_TOGGLE_MEG 0x00000003
  161. #define SIS_WECCR_COMMAND_TOGGLE_VEG_MEG 0x00000004
  162. /* Wave Engine Volume Control Register */
  163. #define SIS_WEVCR 0xa4
  164. #define SIS_WEVCR_LEFT_MUSIC_ATTENUATION_MASK 0xff000000
  165. #define SIS_WEVCR_RIGHT_MUSIC_ATTENUATION_MASK 0x00ff0000
  166. #define SIS_WEVCR_LEFT_WAVE_ATTENUATION_MASK 0x0000ff00
  167. #define SIS_WEVCR_RIGHT_WAVE_ATTENUATION_MASK 0x000000ff
  168. /* Wave Engine Interrupt Status Registers */
  169. #define SIS_WEISR_A 0xa8
  170. #define SIS_WEISR_B 0xac
  171. /* Playback DMA parameters (parameter RAM) */
  172. #define SIS_PLAY_DMA_OFFSET 0x0000
  173. #define SIS_PLAY_DMA_SIZE 0x10
  174. #define SIS_PLAY_DMA_ADDR(addr, num) \
  175. ((num * SIS_PLAY_DMA_SIZE) + (addr) + SIS_PLAY_DMA_OFFSET)
  176. #define SIS_PLAY_DMA_FORMAT_CSO 0x00
  177. #define SIS_PLAY_DMA_FORMAT_UNSIGNED 0x00080000
  178. #define SIS_PLAY_DMA_FORMAT_8BIT 0x00040000
  179. #define SIS_PLAY_DMA_FORMAT_MONO 0x00020000
  180. #define SIS_PLAY_DMA_CSO_MASK 0x0000ffff
  181. #define SIS_PLAY_DMA_BASE 0x04
  182. #define SIS_PLAY_DMA_CONTROL 0x08
  183. #define SIS_PLAY_DMA_STOP_AT_SSO 0x04000000
  184. #define SIS_PLAY_DMA_RELEASE 0x02000000
  185. #define SIS_PLAY_DMA_LOOP 0x01000000
  186. #define SIS_PLAY_DMA_INTR_AT_SSO 0x00080000
  187. #define SIS_PLAY_DMA_INTR_AT_ESO 0x00040000
  188. #define SIS_PLAY_DMA_INTR_AT_LEO 0x00020000
  189. #define SIS_PLAY_DMA_INTR_AT_MLP 0x00010000
  190. #define SIS_PLAY_DMA_LEO_MASK 0x0000ffff
  191. #define SIS_PLAY_DMA_SSO_ESO 0x0c
  192. #define SIS_PLAY_DMA_SSO_MASK 0xffff0000
  193. #define SIS_PLAY_DMA_ESO_MASK 0x0000ffff
  194. /* Capture DMA parameters (parameter RAM) */
  195. #define SIS_CAPTURE_DMA_OFFSET 0x0800
  196. #define SIS_CAPTURE_DMA_SIZE 0x10
  197. #define SIS_CAPTURE_DMA_ADDR(addr, num) \
  198. ((num * SIS_CAPTURE_DMA_SIZE) + (addr) + SIS_CAPTURE_DMA_OFFSET)
  199. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_0 0
  200. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_1 1
  201. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_2 2
  202. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_3 3
  203. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_4 4
  204. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_5 5
  205. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_6 6
  206. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_7 7
  207. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_8 8
  208. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_9 9
  209. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_10 10
  210. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_11 11
  211. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_12 12
  212. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_13 13
  213. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_14 14
  214. #define SIS_CAPTURE_CHAN_MIXER_ROUTE_BACK_15 15
  215. #define SIS_CAPTURE_CHAN_AC97_PCM_IN 16
  216. #define SIS_CAPTURE_CHAN_AC97_MIC_IN 17
  217. #define SIS_CAPTURE_CHAN_AC97_LINE1_IN 18
  218. #define SIS_CAPTURE_CHAN_AC97_LINE2_IN 19
  219. #define SIS_CAPTURE_CHAN_AC97_HANDSE_IN 20
  220. #define SIS_CAPTURE_DMA_FORMAT_CSO 0x00
  221. #define SIS_CAPTURE_DMA_MONO_MODE_MASK 0xc0000000
  222. #define SIS_CAPTURE_DMA_MONO_MODE_AVG 0x00000000
  223. #define SIS_CAPTURE_DMA_MONO_MODE_LEFT 0x40000000
  224. #define SIS_CAPTURE_DMA_MONO_MODE_RIGHT 0x80000000
  225. #define SIS_CAPTURE_DMA_FORMAT_UNSIGNED 0x00080000
  226. #define SIS_CAPTURE_DMA_FORMAT_8BIT 0x00040000
  227. #define SIS_CAPTURE_DMA_FORMAT_MONO 0x00020000
  228. #define SIS_CAPTURE_DMA_CSO_MASK 0x0000ffff
  229. #define SIS_CAPTURE_DMA_BASE 0x04
  230. #define SIS_CAPTURE_DMA_CONTROL 0x08
  231. #define SIS_CAPTURE_DMA_STOP_AT_SSO 0x04000000
  232. #define SIS_CAPTURE_DMA_RELEASE 0x02000000
  233. #define SIS_CAPTURE_DMA_LOOP 0x01000000
  234. #define SIS_CAPTURE_DMA_INTR_AT_LEO 0x00020000
  235. #define SIS_CAPTURE_DMA_INTR_AT_MLP 0x00010000
  236. #define SIS_CAPTURE_DMA_LEO_MASK 0x0000ffff
  237. #define SIS_CAPTURE_DMA_RESERVED 0x0c
  238. /* Mixer routing list start pointer (parameter RAM) */
  239. #define SIS_MIXER_START_OFFSET 0x1000
  240. #define SIS_MIXER_START_SIZE 0x04
  241. #define SIS_MIXER_START_ADDR(addr, num) \
  242. ((num * SIS_MIXER_START_SIZE) + (addr) + SIS_MIXER_START_OFFSET)
  243. #define SIS_MIXER_START_MASK 0x0000007f
  244. /* Mixer routing table (parameter RAM) */
  245. #define SIS_MIXER_OFFSET 0x1400
  246. #define SIS_MIXER_SIZE 0x04
  247. #define SIS_MIXER_ADDR(addr, num) \
  248. ((num * SIS_MIXER_SIZE) + (addr) + SIS_MIXER_OFFSET)
  249. #define SIS_MIXER_RIGHT_ATTENUTATION_MASK 0xff000000
  250. #define SIS_MIXER_RIGHT_NO_ATTEN 0xff000000
  251. #define SIS_MIXER_LEFT_ATTENUTATION_MASK 0x00ff0000
  252. #define SIS_MIXER_LEFT_NO_ATTEN 0x00ff0000
  253. #define SIS_MIXER_NEXT_ENTRY_MASK 0x00007f00
  254. #define SIS_MIXER_NEXT_ENTRY_NONE 0x00000000
  255. #define SIS_MIXER_DEST_MASK 0x0000007f
  256. #define SIS_MIXER_DEST_0 0x00000020
  257. #define SIS_MIXER_DEST_1 0x00000021
  258. #define SIS_MIXER_DEST_2 0x00000022
  259. #define SIS_MIXER_DEST_3 0x00000023
  260. #define SIS_MIXER_DEST_4 0x00000024
  261. #define SIS_MIXER_DEST_5 0x00000025
  262. #define SIS_MIXER_DEST_6 0x00000026
  263. #define SIS_MIXER_DEST_7 0x00000027
  264. #define SIS_MIXER_DEST_8 0x00000028
  265. #define SIS_MIXER_DEST_9 0x00000029
  266. #define SIS_MIXER_DEST_10 0x0000002a
  267. #define SIS_MIXER_DEST_11 0x0000002b
  268. #define SIS_MIXER_DEST_12 0x0000002c
  269. #define SIS_MIXER_DEST_13 0x0000002d
  270. #define SIS_MIXER_DEST_14 0x0000002e
  271. #define SIS_MIXER_DEST_15 0x0000002f
  272. /* Wave Engine Control Parameters (parameter RAM) */
  273. #define SIS_WAVE_OFFSET 0x2000
  274. #define SIS_WAVE_SIZE 0x40
  275. #define SIS_WAVE_ADDR(addr, num) \
  276. ((num * SIS_WAVE_SIZE) + (addr) + SIS_WAVE_OFFSET)
  277. #define SIS_WAVE_GENERAL 0x00
  278. #define SIS_WAVE_GENERAL_WAVE_VOLUME 0x80000000
  279. #define SIS_WAVE_GENERAL_MUSIC_VOLUME 0x00000000
  280. #define SIS_WAVE_GENERAL_VOLUME_MASK 0x7f000000
  281. #define SIS_WAVE_GENERAL_ARTICULATION 0x04
  282. #define SIS_WAVE_GENERAL_ARTICULATION_DELTA_MASK 0x3fff0000
  283. #define SIS_WAVE_ARTICULATION 0x08
  284. #define SIS_WAVE_TIMER 0x0c
  285. #define SIS_WAVE_GENERATOR 0x10
  286. #define SIS_WAVE_CHANNEL_CONTROL 0x14
  287. #define SIS_WAVE_CHANNEL_CONTROL_FIRST_SAMPLE 0x80000000
  288. #define SIS_WAVE_CHANNEL_CONTROL_AMP_ENABLE 0x40000000
  289. #define SIS_WAVE_CHANNEL_CONTROL_FILTER_ENABLE 0x20000000
  290. #define SIS_WAVE_CHANNEL_CONTROL_INTERPOLATE_ENABLE 0x10000000
  291. #define SIS_WAVE_LFO_EG_CONTROL 0x18
  292. #define SIS_WAVE_LFO_EG_CONTROL_2 0x1c
  293. #define SIS_WAVE_LFO_EG_CONTROL_3 0x20
  294. #define SIS_WAVE_LFO_EG_CONTROL_4 0x24
  295. #endif /* __sis7019_h__ */