bt87x.c 28 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
  4. *
  5. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  6. *
  7. * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
  8. */
  9. #include <linux/init.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/pci.h>
  12. #include <linux/slab.h>
  13. #include <linux/module.h>
  14. #include <linux/bitops.h>
  15. #include <linux/io.h>
  16. #include <sound/core.h>
  17. #include <sound/pcm.h>
  18. #include <sound/pcm_params.h>
  19. #include <sound/control.h>
  20. #include <sound/initval.h>
  21. MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  22. MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
  23. MODULE_LICENSE("GPL");
  24. MODULE_SUPPORTED_DEVICE("{{Brooktree,Bt878},"
  25. "{Brooktree,Bt879}}");
  26. static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
  27. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  28. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  29. static int digital_rate[SNDRV_CARDS]; /* digital input rate */
  30. static bool load_all; /* allow to load cards not the allowlist */
  31. module_param_array(index, int, NULL, 0444);
  32. MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
  33. module_param_array(id, charp, NULL, 0444);
  34. MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
  35. module_param_array(enable, bool, NULL, 0444);
  36. MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
  37. module_param_array(digital_rate, int, NULL, 0444);
  38. MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
  39. module_param(load_all, bool, 0444);
  40. MODULE_PARM_DESC(load_all, "Allow to load cards not on the allowlist");
  41. /* register offsets */
  42. #define REG_INT_STAT 0x100 /* interrupt status */
  43. #define REG_INT_MASK 0x104 /* interrupt mask */
  44. #define REG_GPIO_DMA_CTL 0x10c /* audio control */
  45. #define REG_PACKET_LEN 0x110 /* audio packet lengths */
  46. #define REG_RISC_STRT_ADD 0x114 /* RISC program start address */
  47. #define REG_RISC_COUNT 0x120 /* RISC program counter */
  48. /* interrupt bits */
  49. #define INT_OFLOW (1 << 3) /* audio A/D overflow */
  50. #define INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */
  51. #define INT_FBUS (1 << 12) /* FIFO overrun due to bus access latency */
  52. #define INT_FTRGT (1 << 13) /* FIFO overrun due to target latency */
  53. #define INT_FDSR (1 << 14) /* FIFO data stream resynchronization */
  54. #define INT_PPERR (1 << 15) /* PCI parity error */
  55. #define INT_RIPERR (1 << 16) /* RISC instruction parity error */
  56. #define INT_PABORT (1 << 17) /* PCI master or target abort */
  57. #define INT_OCERR (1 << 18) /* invalid opcode */
  58. #define INT_SCERR (1 << 19) /* sync counter overflow */
  59. #define INT_RISC_EN (1 << 27) /* DMA controller running */
  60. #define INT_RISCS_SHIFT 28 /* RISC status bits */
  61. /* audio control bits */
  62. #define CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */
  63. #define CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */
  64. #define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */
  65. #define CTL_PKTP_8 (1 << 2) /* 8 DWORDs */
  66. #define CTL_PKTP_16 (2 << 2) /* 16 DWORDs */
  67. #define CTL_ACAP_EN (1 << 4) /* enable audio capture */
  68. #define CTL_DA_APP (1 << 5) /* GPIO input */
  69. #define CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */
  70. #define CTL_DA_IOM_DA (1 << 6) /* digital audio input */
  71. #define CTL_DA_SDR_SHIFT 8 /* DDF first stage decimation rate */
  72. #define CTL_DA_SDR_MASK (0xf<< 8)
  73. #define CTL_DA_LMT (1 << 12) /* limit audio data values */
  74. #define CTL_DA_ES2 (1 << 13) /* enable DDF stage 2 */
  75. #define CTL_DA_SBR (1 << 14) /* samples rounded to 8 bits */
  76. #define CTL_DA_DPM (1 << 15) /* data packet mode */
  77. #define CTL_DA_LRD_SHIFT 16 /* ALRCK delay */
  78. #define CTL_DA_MLB (1 << 21) /* MSB/LSB format */
  79. #define CTL_DA_LRI (1 << 22) /* left/right indication */
  80. #define CTL_DA_SCE (1 << 23) /* sample clock edge */
  81. #define CTL_A_SEL_STV (0 << 24) /* TV tuner audio input */
  82. #define CTL_A_SEL_SFM (1 << 24) /* FM audio input */
  83. #define CTL_A_SEL_SML (2 << 24) /* mic/line audio input */
  84. #define CTL_A_SEL_SMXC (3 << 24) /* MUX bypass */
  85. #define CTL_A_SEL_SHIFT 24
  86. #define CTL_A_SEL_MASK (3 << 24)
  87. #define CTL_A_PWRDN (1 << 26) /* analog audio power-down */
  88. #define CTL_A_G2X (1 << 27) /* audio gain boost */
  89. #define CTL_A_GAIN_SHIFT 28 /* audio input gain */
  90. #define CTL_A_GAIN_MASK (0xf<<28)
  91. /* RISC instruction opcodes */
  92. #define RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */
  93. #define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */
  94. #define RISC_SKIP (0x2 << 28) /* skip FIFO data */
  95. #define RISC_JUMP (0x7 << 28) /* jump to address */
  96. #define RISC_SYNC (0x8 << 28) /* synchronize with FIFO */
  97. /* RISC instruction bits */
  98. #define RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */
  99. #define RISC_RESYNC ( 1 << 15) /* disable FDSR errors */
  100. #define RISC_SET_STATUS_SHIFT 16 /* set status bits */
  101. #define RISC_RESET_STATUS_SHIFT 20 /* clear status bits */
  102. #define RISC_IRQ ( 1 << 24) /* interrupt */
  103. #define RISC_EOL ( 1 << 26) /* end of line */
  104. #define RISC_SOL ( 1 << 27) /* start of line */
  105. /* SYNC status bits values */
  106. #define RISC_SYNC_FM1 0x6
  107. #define RISC_SYNC_VRO 0xc
  108. #define ANALOG_CLOCK 1792000
  109. #ifdef CONFIG_SND_BT87X_OVERCLOCK
  110. #define CLOCK_DIV_MIN 1
  111. #else
  112. #define CLOCK_DIV_MIN 4
  113. #endif
  114. #define CLOCK_DIV_MAX 15
  115. #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
  116. INT_RIPERR | INT_PABORT | INT_OCERR)
  117. #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
  118. /* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
  119. #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
  120. /* Cards with configuration information */
  121. enum snd_bt87x_boardid {
  122. SND_BT87X_BOARD_UNKNOWN,
  123. SND_BT87X_BOARD_GENERIC, /* both an & dig interfaces, 32kHz */
  124. SND_BT87X_BOARD_ANALOG, /* board with no external A/D */
  125. SND_BT87X_BOARD_OSPREY2x0,
  126. SND_BT87X_BOARD_OSPREY440,
  127. SND_BT87X_BOARD_AVPHONE98,
  128. };
  129. /* Card configuration */
  130. struct snd_bt87x_board {
  131. int dig_rate; /* Digital input sampling rate */
  132. u32 digital_fmt; /* Register settings for digital input */
  133. unsigned no_analog:1; /* No analog input */
  134. unsigned no_digital:1; /* No digital input */
  135. };
  136. static const struct snd_bt87x_board snd_bt87x_boards[] = {
  137. [SND_BT87X_BOARD_UNKNOWN] = {
  138. .dig_rate = 32000, /* just a guess */
  139. },
  140. [SND_BT87X_BOARD_GENERIC] = {
  141. .dig_rate = 32000,
  142. },
  143. [SND_BT87X_BOARD_ANALOG] = {
  144. .no_digital = 1,
  145. },
  146. [SND_BT87X_BOARD_OSPREY2x0] = {
  147. .dig_rate = 44100,
  148. .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
  149. },
  150. [SND_BT87X_BOARD_OSPREY440] = {
  151. .dig_rate = 32000,
  152. .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
  153. .no_analog = 1,
  154. },
  155. [SND_BT87X_BOARD_AVPHONE98] = {
  156. .dig_rate = 48000,
  157. },
  158. };
  159. struct snd_bt87x {
  160. struct snd_card *card;
  161. struct pci_dev *pci;
  162. struct snd_bt87x_board board;
  163. void __iomem *mmio;
  164. int irq;
  165. spinlock_t reg_lock;
  166. unsigned long opened;
  167. struct snd_pcm_substream *substream;
  168. struct snd_dma_buffer dma_risc;
  169. unsigned int line_bytes;
  170. unsigned int lines;
  171. u32 reg_control;
  172. u32 interrupt_mask;
  173. int current_line;
  174. int pci_parity_errors;
  175. };
  176. enum { DEVICE_DIGITAL, DEVICE_ANALOG };
  177. static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg)
  178. {
  179. return readl(chip->mmio + reg);
  180. }
  181. static inline void snd_bt87x_writel(struct snd_bt87x *chip, u32 reg, u32 value)
  182. {
  183. writel(value, chip->mmio + reg);
  184. }
  185. static int snd_bt87x_create_risc(struct snd_bt87x *chip, struct snd_pcm_substream *substream,
  186. unsigned int periods, unsigned int period_bytes)
  187. {
  188. unsigned int i, offset;
  189. __le32 *risc;
  190. if (chip->dma_risc.area == NULL) {
  191. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
  192. PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
  193. return -ENOMEM;
  194. }
  195. risc = (__le32 *)chip->dma_risc.area;
  196. offset = 0;
  197. *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
  198. *risc++ = cpu_to_le32(0);
  199. for (i = 0; i < periods; ++i) {
  200. u32 rest;
  201. rest = period_bytes;
  202. do {
  203. u32 cmd, len;
  204. unsigned int addr;
  205. len = PAGE_SIZE - (offset % PAGE_SIZE);
  206. if (len > rest)
  207. len = rest;
  208. cmd = RISC_WRITE | len;
  209. if (rest == period_bytes) {
  210. u32 block = i * 16 / periods;
  211. cmd |= RISC_SOL;
  212. cmd |= block << RISC_SET_STATUS_SHIFT;
  213. cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
  214. }
  215. if (len == rest)
  216. cmd |= RISC_EOL | RISC_IRQ;
  217. *risc++ = cpu_to_le32(cmd);
  218. addr = snd_pcm_sgbuf_get_addr(substream, offset);
  219. *risc++ = cpu_to_le32(addr);
  220. offset += len;
  221. rest -= len;
  222. } while (rest > 0);
  223. }
  224. *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
  225. *risc++ = cpu_to_le32(0);
  226. *risc++ = cpu_to_le32(RISC_JUMP);
  227. *risc++ = cpu_to_le32(chip->dma_risc.addr);
  228. chip->line_bytes = period_bytes;
  229. chip->lines = periods;
  230. return 0;
  231. }
  232. static void snd_bt87x_free_risc(struct snd_bt87x *chip)
  233. {
  234. if (chip->dma_risc.area) {
  235. snd_dma_free_pages(&chip->dma_risc);
  236. chip->dma_risc.area = NULL;
  237. }
  238. }
  239. static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status)
  240. {
  241. int pci_status = pci_status_get_and_clear_errors(chip->pci);
  242. if (pci_status != PCI_STATUS_DETECTED_PARITY)
  243. dev_err(chip->card->dev,
  244. "Aieee - PCI error! status %#08x, PCI status %#04x\n",
  245. status & ERROR_INTERRUPTS, pci_status);
  246. else {
  247. dev_err(chip->card->dev,
  248. "Aieee - PCI parity error detected!\n");
  249. /* error 'handling' similar to aic7xxx_pci.c: */
  250. chip->pci_parity_errors++;
  251. if (chip->pci_parity_errors > 20) {
  252. dev_err(chip->card->dev,
  253. "Too many PCI parity errors observed.\n");
  254. dev_err(chip->card->dev,
  255. "Some device on this bus is generating bad parity.\n");
  256. dev_err(chip->card->dev,
  257. "This is an error *observed by*, not *generated by*, this card.\n");
  258. dev_err(chip->card->dev,
  259. "PCI parity error checking has been disabled.\n");
  260. chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR);
  261. snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
  262. }
  263. }
  264. }
  265. static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id)
  266. {
  267. struct snd_bt87x *chip = dev_id;
  268. unsigned int status, irq_status;
  269. status = snd_bt87x_readl(chip, REG_INT_STAT);
  270. irq_status = status & chip->interrupt_mask;
  271. if (!irq_status)
  272. return IRQ_NONE;
  273. snd_bt87x_writel(chip, REG_INT_STAT, irq_status);
  274. if (irq_status & ERROR_INTERRUPTS) {
  275. if (irq_status & (INT_FBUS | INT_FTRGT))
  276. dev_warn(chip->card->dev,
  277. "FIFO overrun, status %#08x\n", status);
  278. if (irq_status & INT_OCERR)
  279. dev_err(chip->card->dev,
  280. "internal RISC error, status %#08x\n", status);
  281. if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT))
  282. snd_bt87x_pci_error(chip, irq_status);
  283. }
  284. if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) {
  285. int current_block, irq_block;
  286. /* assume that exactly one line has been recorded */
  287. chip->current_line = (chip->current_line + 1) % chip->lines;
  288. /* but check if some interrupts have been skipped */
  289. current_block = chip->current_line * 16 / chip->lines;
  290. irq_block = status >> INT_RISCS_SHIFT;
  291. if (current_block != irq_block)
  292. chip->current_line = (irq_block * chip->lines + 15) / 16;
  293. snd_pcm_period_elapsed(chip->substream);
  294. }
  295. return IRQ_HANDLED;
  296. }
  297. static const struct snd_pcm_hardware snd_bt87x_digital_hw = {
  298. .info = SNDRV_PCM_INFO_MMAP |
  299. SNDRV_PCM_INFO_INTERLEAVED |
  300. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  301. SNDRV_PCM_INFO_MMAP_VALID |
  302. SNDRV_PCM_INFO_BATCH,
  303. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  304. .rates = 0, /* set at runtime */
  305. .channels_min = 2,
  306. .channels_max = 2,
  307. .buffer_bytes_max = 255 * 4092,
  308. .period_bytes_min = 32,
  309. .period_bytes_max = 4092,
  310. .periods_min = 2,
  311. .periods_max = 255,
  312. };
  313. static const struct snd_pcm_hardware snd_bt87x_analog_hw = {
  314. .info = SNDRV_PCM_INFO_MMAP |
  315. SNDRV_PCM_INFO_INTERLEAVED |
  316. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  317. SNDRV_PCM_INFO_MMAP_VALID |
  318. SNDRV_PCM_INFO_BATCH,
  319. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
  320. .rates = SNDRV_PCM_RATE_KNOT,
  321. .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
  322. .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
  323. .channels_min = 1,
  324. .channels_max = 1,
  325. .buffer_bytes_max = 255 * 4092,
  326. .period_bytes_min = 32,
  327. .period_bytes_max = 4092,
  328. .periods_min = 2,
  329. .periods_max = 255,
  330. };
  331. static int snd_bt87x_set_digital_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
  332. {
  333. chip->reg_control |= CTL_DA_IOM_DA | CTL_A_PWRDN;
  334. runtime->hw = snd_bt87x_digital_hw;
  335. runtime->hw.rates = snd_pcm_rate_to_rate_bit(chip->board.dig_rate);
  336. runtime->hw.rate_min = chip->board.dig_rate;
  337. runtime->hw.rate_max = chip->board.dig_rate;
  338. return 0;
  339. }
  340. static int snd_bt87x_set_analog_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
  341. {
  342. static const struct snd_ratnum analog_clock = {
  343. .num = ANALOG_CLOCK,
  344. .den_min = CLOCK_DIV_MIN,
  345. .den_max = CLOCK_DIV_MAX,
  346. .den_step = 1
  347. };
  348. static const struct snd_pcm_hw_constraint_ratnums constraint_rates = {
  349. .nrats = 1,
  350. .rats = &analog_clock
  351. };
  352. chip->reg_control &= ~(CTL_DA_IOM_DA | CTL_A_PWRDN);
  353. runtime->hw = snd_bt87x_analog_hw;
  354. return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  355. &constraint_rates);
  356. }
  357. static int snd_bt87x_pcm_open(struct snd_pcm_substream *substream)
  358. {
  359. struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
  360. struct snd_pcm_runtime *runtime = substream->runtime;
  361. int err;
  362. if (test_and_set_bit(0, &chip->opened))
  363. return -EBUSY;
  364. if (substream->pcm->device == DEVICE_DIGITAL)
  365. err = snd_bt87x_set_digital_hw(chip, runtime);
  366. else
  367. err = snd_bt87x_set_analog_hw(chip, runtime);
  368. if (err < 0)
  369. goto _error;
  370. err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
  371. if (err < 0)
  372. goto _error;
  373. chip->substream = substream;
  374. return 0;
  375. _error:
  376. clear_bit(0, &chip->opened);
  377. smp_mb__after_atomic();
  378. return err;
  379. }
  380. static int snd_bt87x_close(struct snd_pcm_substream *substream)
  381. {
  382. struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
  383. spin_lock_irq(&chip->reg_lock);
  384. chip->reg_control |= CTL_A_PWRDN;
  385. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  386. spin_unlock_irq(&chip->reg_lock);
  387. chip->substream = NULL;
  388. clear_bit(0, &chip->opened);
  389. smp_mb__after_atomic();
  390. return 0;
  391. }
  392. static int snd_bt87x_hw_params(struct snd_pcm_substream *substream,
  393. struct snd_pcm_hw_params *hw_params)
  394. {
  395. struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
  396. return snd_bt87x_create_risc(chip, substream,
  397. params_periods(hw_params),
  398. params_period_bytes(hw_params));
  399. }
  400. static int snd_bt87x_hw_free(struct snd_pcm_substream *substream)
  401. {
  402. struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
  403. snd_bt87x_free_risc(chip);
  404. return 0;
  405. }
  406. static int snd_bt87x_prepare(struct snd_pcm_substream *substream)
  407. {
  408. struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
  409. struct snd_pcm_runtime *runtime = substream->runtime;
  410. int decimation;
  411. spin_lock_irq(&chip->reg_lock);
  412. chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
  413. decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
  414. chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
  415. if (runtime->format == SNDRV_PCM_FORMAT_S8)
  416. chip->reg_control |= CTL_DA_SBR;
  417. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  418. spin_unlock_irq(&chip->reg_lock);
  419. return 0;
  420. }
  421. static int snd_bt87x_start(struct snd_bt87x *chip)
  422. {
  423. spin_lock(&chip->reg_lock);
  424. chip->current_line = 0;
  425. chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
  426. snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
  427. snd_bt87x_writel(chip, REG_PACKET_LEN,
  428. chip->line_bytes | (chip->lines << 16));
  429. snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
  430. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  431. spin_unlock(&chip->reg_lock);
  432. return 0;
  433. }
  434. static int snd_bt87x_stop(struct snd_bt87x *chip)
  435. {
  436. spin_lock(&chip->reg_lock);
  437. chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
  438. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  439. snd_bt87x_writel(chip, REG_INT_MASK, 0);
  440. snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
  441. spin_unlock(&chip->reg_lock);
  442. return 0;
  443. }
  444. static int snd_bt87x_trigger(struct snd_pcm_substream *substream, int cmd)
  445. {
  446. struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
  447. switch (cmd) {
  448. case SNDRV_PCM_TRIGGER_START:
  449. return snd_bt87x_start(chip);
  450. case SNDRV_PCM_TRIGGER_STOP:
  451. return snd_bt87x_stop(chip);
  452. default:
  453. return -EINVAL;
  454. }
  455. }
  456. static snd_pcm_uframes_t snd_bt87x_pointer(struct snd_pcm_substream *substream)
  457. {
  458. struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
  459. struct snd_pcm_runtime *runtime = substream->runtime;
  460. return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
  461. }
  462. static const struct snd_pcm_ops snd_bt87x_pcm_ops = {
  463. .open = snd_bt87x_pcm_open,
  464. .close = snd_bt87x_close,
  465. .hw_params = snd_bt87x_hw_params,
  466. .hw_free = snd_bt87x_hw_free,
  467. .prepare = snd_bt87x_prepare,
  468. .trigger = snd_bt87x_trigger,
  469. .pointer = snd_bt87x_pointer,
  470. };
  471. static int snd_bt87x_capture_volume_info(struct snd_kcontrol *kcontrol,
  472. struct snd_ctl_elem_info *info)
  473. {
  474. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  475. info->count = 1;
  476. info->value.integer.min = 0;
  477. info->value.integer.max = 15;
  478. return 0;
  479. }
  480. static int snd_bt87x_capture_volume_get(struct snd_kcontrol *kcontrol,
  481. struct snd_ctl_elem_value *value)
  482. {
  483. struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
  484. value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
  485. return 0;
  486. }
  487. static int snd_bt87x_capture_volume_put(struct snd_kcontrol *kcontrol,
  488. struct snd_ctl_elem_value *value)
  489. {
  490. struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
  491. u32 old_control;
  492. int changed;
  493. spin_lock_irq(&chip->reg_lock);
  494. old_control = chip->reg_control;
  495. chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
  496. | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
  497. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  498. changed = old_control != chip->reg_control;
  499. spin_unlock_irq(&chip->reg_lock);
  500. return changed;
  501. }
  502. static const struct snd_kcontrol_new snd_bt87x_capture_volume = {
  503. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  504. .name = "Capture Volume",
  505. .info = snd_bt87x_capture_volume_info,
  506. .get = snd_bt87x_capture_volume_get,
  507. .put = snd_bt87x_capture_volume_put,
  508. };
  509. #define snd_bt87x_capture_boost_info snd_ctl_boolean_mono_info
  510. static int snd_bt87x_capture_boost_get(struct snd_kcontrol *kcontrol,
  511. struct snd_ctl_elem_value *value)
  512. {
  513. struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
  514. value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
  515. return 0;
  516. }
  517. static int snd_bt87x_capture_boost_put(struct snd_kcontrol *kcontrol,
  518. struct snd_ctl_elem_value *value)
  519. {
  520. struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
  521. u32 old_control;
  522. int changed;
  523. spin_lock_irq(&chip->reg_lock);
  524. old_control = chip->reg_control;
  525. chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
  526. | (value->value.integer.value[0] ? CTL_A_G2X : 0);
  527. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  528. changed = chip->reg_control != old_control;
  529. spin_unlock_irq(&chip->reg_lock);
  530. return changed;
  531. }
  532. static const struct snd_kcontrol_new snd_bt87x_capture_boost = {
  533. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  534. .name = "Capture Boost",
  535. .info = snd_bt87x_capture_boost_info,
  536. .get = snd_bt87x_capture_boost_get,
  537. .put = snd_bt87x_capture_boost_put,
  538. };
  539. static int snd_bt87x_capture_source_info(struct snd_kcontrol *kcontrol,
  540. struct snd_ctl_elem_info *info)
  541. {
  542. static const char *const texts[3] = {"TV Tuner", "FM", "Mic/Line"};
  543. return snd_ctl_enum_info(info, 1, 3, texts);
  544. }
  545. static int snd_bt87x_capture_source_get(struct snd_kcontrol *kcontrol,
  546. struct snd_ctl_elem_value *value)
  547. {
  548. struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
  549. value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
  550. return 0;
  551. }
  552. static int snd_bt87x_capture_source_put(struct snd_kcontrol *kcontrol,
  553. struct snd_ctl_elem_value *value)
  554. {
  555. struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
  556. u32 old_control;
  557. int changed;
  558. spin_lock_irq(&chip->reg_lock);
  559. old_control = chip->reg_control;
  560. chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
  561. | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
  562. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  563. changed = chip->reg_control != old_control;
  564. spin_unlock_irq(&chip->reg_lock);
  565. return changed;
  566. }
  567. static const struct snd_kcontrol_new snd_bt87x_capture_source = {
  568. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  569. .name = "Capture Source",
  570. .info = snd_bt87x_capture_source_info,
  571. .get = snd_bt87x_capture_source_get,
  572. .put = snd_bt87x_capture_source_put,
  573. };
  574. static int snd_bt87x_free(struct snd_bt87x *chip)
  575. {
  576. if (chip->mmio)
  577. snd_bt87x_stop(chip);
  578. if (chip->irq >= 0)
  579. free_irq(chip->irq, chip);
  580. iounmap(chip->mmio);
  581. pci_release_regions(chip->pci);
  582. pci_disable_device(chip->pci);
  583. kfree(chip);
  584. return 0;
  585. }
  586. static int snd_bt87x_dev_free(struct snd_device *device)
  587. {
  588. struct snd_bt87x *chip = device->device_data;
  589. return snd_bt87x_free(chip);
  590. }
  591. static int snd_bt87x_pcm(struct snd_bt87x *chip, int device, char *name)
  592. {
  593. int err;
  594. struct snd_pcm *pcm;
  595. err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
  596. if (err < 0)
  597. return err;
  598. pcm->private_data = chip;
  599. strcpy(pcm->name, name);
  600. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
  601. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  602. &chip->pci->dev,
  603. 128 * 1024,
  604. ALIGN(255 * 4092, 1024));
  605. return 0;
  606. }
  607. static int snd_bt87x_create(struct snd_card *card,
  608. struct pci_dev *pci,
  609. struct snd_bt87x **rchip)
  610. {
  611. struct snd_bt87x *chip;
  612. int err;
  613. static const struct snd_device_ops ops = {
  614. .dev_free = snd_bt87x_dev_free
  615. };
  616. *rchip = NULL;
  617. err = pci_enable_device(pci);
  618. if (err < 0)
  619. return err;
  620. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  621. if (!chip) {
  622. pci_disable_device(pci);
  623. return -ENOMEM;
  624. }
  625. chip->card = card;
  626. chip->pci = pci;
  627. chip->irq = -1;
  628. spin_lock_init(&chip->reg_lock);
  629. if ((err = pci_request_regions(pci, "Bt87x audio")) < 0) {
  630. kfree(chip);
  631. pci_disable_device(pci);
  632. return err;
  633. }
  634. chip->mmio = pci_ioremap_bar(pci, 0);
  635. if (!chip->mmio) {
  636. dev_err(card->dev, "cannot remap io memory\n");
  637. err = -ENOMEM;
  638. goto fail;
  639. }
  640. chip->reg_control = CTL_A_PWRDN | CTL_DA_ES2 |
  641. CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
  642. chip->interrupt_mask = MY_INTERRUPTS;
  643. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  644. snd_bt87x_writel(chip, REG_INT_MASK, 0);
  645. snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
  646. err = request_irq(pci->irq, snd_bt87x_interrupt, IRQF_SHARED,
  647. KBUILD_MODNAME, chip);
  648. if (err < 0) {
  649. dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
  650. goto fail;
  651. }
  652. chip->irq = pci->irq;
  653. card->sync_irq = chip->irq;
  654. pci_set_master(pci);
  655. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
  656. if (err < 0)
  657. goto fail;
  658. *rchip = chip;
  659. return 0;
  660. fail:
  661. snd_bt87x_free(chip);
  662. return err;
  663. }
  664. #define BT_DEVICE(chip, subvend, subdev, id) \
  665. { .vendor = PCI_VENDOR_ID_BROOKTREE, \
  666. .device = chip, \
  667. .subvendor = subvend, .subdevice = subdev, \
  668. .driver_data = SND_BT87X_BOARD_ ## id }
  669. /* driver_data is the card id for that device */
  670. static const struct pci_device_id snd_bt87x_ids[] = {
  671. /* Hauppauge WinTV series */
  672. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0x13eb, GENERIC),
  673. /* Hauppauge WinTV series */
  674. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, 0x0070, 0x13eb, GENERIC),
  675. /* Viewcast Osprey 200 */
  676. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff01, OSPREY2x0),
  677. /* Viewcast Osprey 440 (rate is configurable via gpio) */
  678. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff07, OSPREY440),
  679. /* ATI TV-Wonder */
  680. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1002, 0x0001, GENERIC),
  681. /* Leadtek Winfast tv 2000xp delux */
  682. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x107d, 0x6606, GENERIC),
  683. /* Pinnacle PCTV */
  684. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x11bd, 0x0012, GENERIC),
  685. /* Voodoo TV 200 */
  686. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x121a, 0x3000, GENERIC),
  687. /* Askey Computer Corp. MagicTView'99 */
  688. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x144f, 0x3000, GENERIC),
  689. /* AVerMedia Studio No. 103, 203, ...? */
  690. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1461, 0x0003, AVPHONE98),
  691. /* Prolink PixelView PV-M4900 */
  692. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1554, 0x4011, GENERIC),
  693. /* Pinnacle Studio PCTV rave */
  694. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0xbd11, 0x1200, GENERIC),
  695. { }
  696. };
  697. MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
  698. /* cards known not to have audio
  699. * (DVB cards use the audio function to transfer MPEG data) */
  700. static struct {
  701. unsigned short subvendor, subdevice;
  702. } denylist[] = {
  703. {0x0071, 0x0101}, /* Nebula Electronics DigiTV */
  704. {0x11bd, 0x001c}, /* Pinnacle PCTV Sat */
  705. {0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */
  706. {0x1461, 0x0761}, /* AVermedia AverTV DVB-T */
  707. {0x1461, 0x0771}, /* AVermedia DVB-T 771 */
  708. {0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */
  709. {0x18ac, 0xd500}, /* DVICO FusionHDTV 5 Lite */
  710. {0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */
  711. {0x18ac, 0xdb11}, /* Ultraview DVB-T Lite */
  712. {0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */
  713. {0x7063, 0x2000}, /* pcHDTV HD-2000 TV */
  714. };
  715. static struct pci_driver driver;
  716. /* return the id of the card, or a negative value if it's on the denylist */
  717. static int snd_bt87x_detect_card(struct pci_dev *pci)
  718. {
  719. int i;
  720. const struct pci_device_id *supported;
  721. supported = pci_match_id(snd_bt87x_ids, pci);
  722. if (supported && supported->driver_data > 0)
  723. return supported->driver_data;
  724. for (i = 0; i < ARRAY_SIZE(denylist); ++i)
  725. if (denylist[i].subvendor == pci->subsystem_vendor &&
  726. denylist[i].subdevice == pci->subsystem_device) {
  727. dev_dbg(&pci->dev,
  728. "card %#04x-%#04x:%#04x has no audio\n",
  729. pci->device, pci->subsystem_vendor, pci->subsystem_device);
  730. return -EBUSY;
  731. }
  732. dev_info(&pci->dev, "unknown card %#04x-%#04x:%#04x\n",
  733. pci->device, pci->subsystem_vendor, pci->subsystem_device);
  734. dev_info(&pci->dev, "please mail id, board name, and, "
  735. "if it works, the correct digital_rate option to "
  736. "<alsa-devel@alsa-project.org>\n");
  737. return SND_BT87X_BOARD_UNKNOWN;
  738. }
  739. static int snd_bt87x_probe(struct pci_dev *pci,
  740. const struct pci_device_id *pci_id)
  741. {
  742. static int dev;
  743. struct snd_card *card;
  744. struct snd_bt87x *chip;
  745. int err;
  746. enum snd_bt87x_boardid boardid;
  747. if (!pci_id->driver_data) {
  748. err = snd_bt87x_detect_card(pci);
  749. if (err < 0)
  750. return -ENODEV;
  751. boardid = err;
  752. } else
  753. boardid = pci_id->driver_data;
  754. if (dev >= SNDRV_CARDS)
  755. return -ENODEV;
  756. if (!enable[dev]) {
  757. ++dev;
  758. return -ENOENT;
  759. }
  760. err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
  761. 0, &card);
  762. if (err < 0)
  763. return err;
  764. err = snd_bt87x_create(card, pci, &chip);
  765. if (err < 0)
  766. goto _error;
  767. memcpy(&chip->board, &snd_bt87x_boards[boardid], sizeof(chip->board));
  768. if (!chip->board.no_digital) {
  769. if (digital_rate[dev] > 0)
  770. chip->board.dig_rate = digital_rate[dev];
  771. chip->reg_control |= chip->board.digital_fmt;
  772. err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
  773. if (err < 0)
  774. goto _error;
  775. }
  776. if (!chip->board.no_analog) {
  777. err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
  778. if (err < 0)
  779. goto _error;
  780. err = snd_ctl_add(card, snd_ctl_new1(
  781. &snd_bt87x_capture_volume, chip));
  782. if (err < 0)
  783. goto _error;
  784. err = snd_ctl_add(card, snd_ctl_new1(
  785. &snd_bt87x_capture_boost, chip));
  786. if (err < 0)
  787. goto _error;
  788. err = snd_ctl_add(card, snd_ctl_new1(
  789. &snd_bt87x_capture_source, chip));
  790. if (err < 0)
  791. goto _error;
  792. }
  793. dev_info(card->dev, "bt87x%d: Using board %d, %sanalog, %sdigital "
  794. "(rate %d Hz)\n", dev, boardid,
  795. chip->board.no_analog ? "no " : "",
  796. chip->board.no_digital ? "no " : "", chip->board.dig_rate);
  797. strcpy(card->driver, "Bt87x");
  798. sprintf(card->shortname, "Brooktree Bt%x", pci->device);
  799. sprintf(card->longname, "%s at %#llx, irq %i",
  800. card->shortname, (unsigned long long)pci_resource_start(pci, 0),
  801. chip->irq);
  802. strcpy(card->mixername, "Bt87x");
  803. err = snd_card_register(card);
  804. if (err < 0)
  805. goto _error;
  806. pci_set_drvdata(pci, card);
  807. ++dev;
  808. return 0;
  809. _error:
  810. snd_card_free(card);
  811. return err;
  812. }
  813. static void snd_bt87x_remove(struct pci_dev *pci)
  814. {
  815. snd_card_free(pci_get_drvdata(pci));
  816. }
  817. /* default entries for all Bt87x cards - it's not exported */
  818. /* driver_data is set to 0 to call detection */
  819. static const struct pci_device_id snd_bt87x_default_ids[] = {
  820. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
  821. BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
  822. { }
  823. };
  824. static struct pci_driver driver = {
  825. .name = KBUILD_MODNAME,
  826. .id_table = snd_bt87x_ids,
  827. .probe = snd_bt87x_probe,
  828. .remove = snd_bt87x_remove,
  829. };
  830. static int __init alsa_card_bt87x_init(void)
  831. {
  832. if (load_all)
  833. driver.id_table = snd_bt87x_default_ids;
  834. return pci_register_driver(&driver);
  835. }
  836. static void __exit alsa_card_bt87x_exit(void)
  837. {
  838. pci_unregister_driver(&driver);
  839. }
  840. module_init(alsa_card_bt87x_init)
  841. module_exit(alsa_card_bt87x_exit)