vga.h 14 KB

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  1. /*
  2. * linux/include/video/vga.h -- standard VGA chipset interaction
  3. *
  4. * Copyright 1999 Jeff Garzik <jgarzik@pobox.com>
  5. *
  6. * Copyright history from vga16fb.c:
  7. * Copyright 1999 Ben Pfaff and Petr Vandrovec
  8. * Based on VGA info at http://www.osdever.net/FreeVGA/home.htm
  9. * Based on VESA framebuffer (c) 1998 Gerd Knorr
  10. *
  11. * This file is subject to the terms and conditions of the GNU General
  12. * Public License. See the file COPYING in the main directory of this
  13. * archive for more details.
  14. *
  15. */
  16. #ifndef __linux_video_vga_h__
  17. #define __linux_video_vga_h__
  18. #include <linux/types.h>
  19. #include <linux/io.h>
  20. #include <asm/vga.h>
  21. #include <asm/byteorder.h>
  22. /* Some of the code below is taken from SVGAlib. The original,
  23. unmodified copyright notice for that code is below. */
  24. /* VGAlib version 1.2 - (c) 1993 Tommy Frandsen */
  25. /* */
  26. /* This library is free software; you can redistribute it and/or */
  27. /* modify it without any restrictions. This library is distributed */
  28. /* in the hope that it will be useful, but without any warranty. */
  29. /* Multi-chipset support Copyright 1993 Harm Hanemaayer */
  30. /* partially copyrighted (C) 1993 by Hartmut Schirmer */
  31. /* VGA data register ports */
  32. #define VGA_CRT_DC 0x3D5 /* CRT Controller Data Register - color emulation */
  33. #define VGA_CRT_DM 0x3B5 /* CRT Controller Data Register - mono emulation */
  34. #define VGA_ATT_R 0x3C1 /* Attribute Controller Data Read Register */
  35. #define VGA_ATT_W 0x3C0 /* Attribute Controller Data Write Register */
  36. #define VGA_GFX_D 0x3CF /* Graphics Controller Data Register */
  37. #define VGA_SEQ_D 0x3C5 /* Sequencer Data Register */
  38. #define VGA_MIS_R 0x3CC /* Misc Output Read Register */
  39. #define VGA_MIS_W 0x3C2 /* Misc Output Write Register */
  40. #define VGA_FTC_R 0x3CA /* Feature Control Read Register */
  41. #define VGA_IS1_RC 0x3DA /* Input Status Register 1 - color emulation */
  42. #define VGA_IS1_RM 0x3BA /* Input Status Register 1 - mono emulation */
  43. #define VGA_PEL_D 0x3C9 /* PEL Data Register */
  44. #define VGA_PEL_MSK 0x3C6 /* PEL mask register */
  45. /* EGA-specific registers */
  46. #define EGA_GFX_E0 0x3CC /* Graphics enable processor 0 */
  47. #define EGA_GFX_E1 0x3CA /* Graphics enable processor 1 */
  48. /* VGA index register ports */
  49. #define VGA_CRT_IC 0x3D4 /* CRT Controller Index - color emulation */
  50. #define VGA_CRT_IM 0x3B4 /* CRT Controller Index - mono emulation */
  51. #define VGA_ATT_IW 0x3C0 /* Attribute Controller Index & Data Write Register */
  52. #define VGA_GFX_I 0x3CE /* Graphics Controller Index */
  53. #define VGA_SEQ_I 0x3C4 /* Sequencer Index */
  54. #define VGA_PEL_IW 0x3C8 /* PEL Write Index */
  55. #define VGA_PEL_IR 0x3C7 /* PEL Read Index */
  56. /* standard VGA indexes max counts */
  57. #define VGA_CRT_C 0x19 /* Number of CRT Controller Registers */
  58. #define VGA_ATT_C 0x15 /* Number of Attribute Controller Registers */
  59. #define VGA_GFX_C 0x09 /* Number of Graphics Controller Registers */
  60. #define VGA_SEQ_C 0x05 /* Number of Sequencer Registers */
  61. #define VGA_MIS_C 0x01 /* Number of Misc Output Register */
  62. /* VGA misc register bit masks */
  63. #define VGA_MIS_COLOR 0x01
  64. #define VGA_MIS_ENB_MEM_ACCESS 0x02
  65. #define VGA_MIS_DCLK_28322_720 0x04
  66. #define VGA_MIS_ENB_PLL_LOAD (0x04 | 0x08)
  67. #define VGA_MIS_SEL_HIGH_PAGE 0x20
  68. /* VGA CRT controller register indices */
  69. #define VGA_CRTC_H_TOTAL 0
  70. #define VGA_CRTC_H_DISP 1
  71. #define VGA_CRTC_H_BLANK_START 2
  72. #define VGA_CRTC_H_BLANK_END 3
  73. #define VGA_CRTC_H_SYNC_START 4
  74. #define VGA_CRTC_H_SYNC_END 5
  75. #define VGA_CRTC_V_TOTAL 6
  76. #define VGA_CRTC_OVERFLOW 7
  77. #define VGA_CRTC_PRESET_ROW 8
  78. #define VGA_CRTC_MAX_SCAN 9
  79. #define VGA_CRTC_CURSOR_START 0x0A
  80. #define VGA_CRTC_CURSOR_END 0x0B
  81. #define VGA_CRTC_START_HI 0x0C
  82. #define VGA_CRTC_START_LO 0x0D
  83. #define VGA_CRTC_CURSOR_HI 0x0E
  84. #define VGA_CRTC_CURSOR_LO 0x0F
  85. #define VGA_CRTC_V_SYNC_START 0x10
  86. #define VGA_CRTC_V_SYNC_END 0x11
  87. #define VGA_CRTC_V_DISP_END 0x12
  88. #define VGA_CRTC_OFFSET 0x13
  89. #define VGA_CRTC_UNDERLINE 0x14
  90. #define VGA_CRTC_V_BLANK_START 0x15
  91. #define VGA_CRTC_V_BLANK_END 0x16
  92. #define VGA_CRTC_MODE 0x17
  93. #define VGA_CRTC_LINE_COMPARE 0x18
  94. #define VGA_CRTC_REGS VGA_CRT_C
  95. /* VGA CRT controller bit masks */
  96. #define VGA_CR11_LOCK_CR0_CR7 0x80 /* lock writes to CR0 - CR7 */
  97. #define VGA_CR17_H_V_SIGNALS_ENABLED 0x80
  98. /* VGA attribute controller register indices */
  99. #define VGA_ATC_PALETTE0 0x00
  100. #define VGA_ATC_PALETTE1 0x01
  101. #define VGA_ATC_PALETTE2 0x02
  102. #define VGA_ATC_PALETTE3 0x03
  103. #define VGA_ATC_PALETTE4 0x04
  104. #define VGA_ATC_PALETTE5 0x05
  105. #define VGA_ATC_PALETTE6 0x06
  106. #define VGA_ATC_PALETTE7 0x07
  107. #define VGA_ATC_PALETTE8 0x08
  108. #define VGA_ATC_PALETTE9 0x09
  109. #define VGA_ATC_PALETTEA 0x0A
  110. #define VGA_ATC_PALETTEB 0x0B
  111. #define VGA_ATC_PALETTEC 0x0C
  112. #define VGA_ATC_PALETTED 0x0D
  113. #define VGA_ATC_PALETTEE 0x0E
  114. #define VGA_ATC_PALETTEF 0x0F
  115. #define VGA_ATC_MODE 0x10
  116. #define VGA_ATC_OVERSCAN 0x11
  117. #define VGA_ATC_PLANE_ENABLE 0x12
  118. #define VGA_ATC_PEL 0x13
  119. #define VGA_ATC_COLOR_PAGE 0x14
  120. #define VGA_AR_ENABLE_DISPLAY 0x20
  121. /* VGA sequencer register indices */
  122. #define VGA_SEQ_RESET 0x00
  123. #define VGA_SEQ_CLOCK_MODE 0x01
  124. #define VGA_SEQ_PLANE_WRITE 0x02
  125. #define VGA_SEQ_CHARACTER_MAP 0x03
  126. #define VGA_SEQ_MEMORY_MODE 0x04
  127. /* VGA sequencer register bit masks */
  128. #define VGA_SR01_CHAR_CLK_8DOTS 0x01 /* bit 0: character clocks 8 dots wide are generated */
  129. #define VGA_SR01_SCREEN_OFF 0x20 /* bit 5: Screen is off */
  130. #define VGA_SR02_ALL_PLANES 0x0F /* bits 3-0: enable access to all planes */
  131. #define VGA_SR04_EXT_MEM 0x02 /* bit 1: allows complete mem access to 256K */
  132. #define VGA_SR04_SEQ_MODE 0x04 /* bit 2: directs system to use a sequential addressing mode */
  133. #define VGA_SR04_CHN_4M 0x08 /* bit 3: selects modulo 4 addressing for CPU access to display memory */
  134. /* VGA graphics controller register indices */
  135. #define VGA_GFX_SR_VALUE 0x00
  136. #define VGA_GFX_SR_ENABLE 0x01
  137. #define VGA_GFX_COMPARE_VALUE 0x02
  138. #define VGA_GFX_DATA_ROTATE 0x03
  139. #define VGA_GFX_PLANE_READ 0x04
  140. #define VGA_GFX_MODE 0x05
  141. #define VGA_GFX_MISC 0x06
  142. #define VGA_GFX_COMPARE_MASK 0x07
  143. #define VGA_GFX_BIT_MASK 0x08
  144. /* VGA graphics controller bit masks */
  145. #define VGA_GR06_GRAPHICS_MODE 0x01
  146. /* macro for composing an 8-bit VGA register index and value
  147. * into a single 16-bit quantity */
  148. #define VGA_OUT16VAL(v, r) (((v) << 8) | (r))
  149. /* decide whether we should enable the faster 16-bit VGA register writes */
  150. #ifdef __LITTLE_ENDIAN
  151. #define VGA_OUTW_WRITE
  152. #endif
  153. /* VGA State Save and Restore */
  154. #define VGA_SAVE_FONT0 1 /* save/restore plane 2 fonts */
  155. #define VGA_SAVE_FONT1 2 /* save/restore plane 3 fonts */
  156. #define VGA_SAVE_TEXT 4 /* save/restore plane 0/1 fonts */
  157. #define VGA_SAVE_FONTS 7 /* save/restore all fonts */
  158. #define VGA_SAVE_MODE 8 /* save/restore video mode */
  159. #define VGA_SAVE_CMAP 16 /* save/restore color map/DAC */
  160. struct vgastate {
  161. void __iomem *vgabase; /* mmio base, if supported */
  162. unsigned long membase; /* VGA window base, 0 for default - 0xA000 */
  163. __u32 memsize; /* VGA window size, 0 for default 64K */
  164. __u32 flags; /* what state[s] to save (see VGA_SAVE_*) */
  165. __u32 depth; /* current fb depth, not important */
  166. __u32 num_attr; /* number of att registers, 0 for default */
  167. __u32 num_crtc; /* number of crt registers, 0 for default */
  168. __u32 num_gfx; /* number of gfx registers, 0 for default */
  169. __u32 num_seq; /* number of seq registers, 0 for default */
  170. void *vidstate;
  171. };
  172. extern int save_vga(struct vgastate *state);
  173. extern int restore_vga(struct vgastate *state);
  174. /*
  175. * generic VGA port read/write
  176. */
  177. static inline unsigned char vga_io_r (unsigned short port)
  178. {
  179. return inb_p(port);
  180. }
  181. static inline void vga_io_w (unsigned short port, unsigned char val)
  182. {
  183. outb_p(val, port);
  184. }
  185. static inline void vga_io_w_fast (unsigned short port, unsigned char reg,
  186. unsigned char val)
  187. {
  188. outw(VGA_OUT16VAL (val, reg), port);
  189. }
  190. static inline unsigned char vga_mm_r (void __iomem *regbase, unsigned short port)
  191. {
  192. return readb (regbase + port);
  193. }
  194. static inline void vga_mm_w (void __iomem *regbase, unsigned short port, unsigned char val)
  195. {
  196. writeb (val, regbase + port);
  197. }
  198. static inline void vga_mm_w_fast (void __iomem *regbase, unsigned short port,
  199. unsigned char reg, unsigned char val)
  200. {
  201. writew (VGA_OUT16VAL (val, reg), regbase + port);
  202. }
  203. static inline unsigned char vga_r (void __iomem *regbase, unsigned short port)
  204. {
  205. if (regbase)
  206. return vga_mm_r (regbase, port);
  207. else
  208. return vga_io_r (port);
  209. }
  210. static inline void vga_w (void __iomem *regbase, unsigned short port, unsigned char val)
  211. {
  212. if (regbase)
  213. vga_mm_w (regbase, port, val);
  214. else
  215. vga_io_w (port, val);
  216. }
  217. static inline void vga_w_fast (void __iomem *regbase, unsigned short port,
  218. unsigned char reg, unsigned char val)
  219. {
  220. if (regbase)
  221. vga_mm_w_fast (regbase, port, reg, val);
  222. else
  223. vga_io_w_fast (port, reg, val);
  224. }
  225. /*
  226. * VGA CRTC register read/write
  227. */
  228. static inline unsigned char vga_rcrt (void __iomem *regbase, unsigned char reg)
  229. {
  230. vga_w (regbase, VGA_CRT_IC, reg);
  231. return vga_r (regbase, VGA_CRT_DC);
  232. }
  233. static inline void vga_wcrt (void __iomem *regbase, unsigned char reg, unsigned char val)
  234. {
  235. #ifdef VGA_OUTW_WRITE
  236. vga_w_fast (regbase, VGA_CRT_IC, reg, val);
  237. #else
  238. vga_w (regbase, VGA_CRT_IC, reg);
  239. vga_w (regbase, VGA_CRT_DC, val);
  240. #endif /* VGA_OUTW_WRITE */
  241. }
  242. static inline unsigned char vga_io_rcrt (unsigned char reg)
  243. {
  244. vga_io_w (VGA_CRT_IC, reg);
  245. return vga_io_r (VGA_CRT_DC);
  246. }
  247. static inline void vga_io_wcrt (unsigned char reg, unsigned char val)
  248. {
  249. #ifdef VGA_OUTW_WRITE
  250. vga_io_w_fast (VGA_CRT_IC, reg, val);
  251. #else
  252. vga_io_w (VGA_CRT_IC, reg);
  253. vga_io_w (VGA_CRT_DC, val);
  254. #endif /* VGA_OUTW_WRITE */
  255. }
  256. static inline unsigned char vga_mm_rcrt (void __iomem *regbase, unsigned char reg)
  257. {
  258. vga_mm_w (regbase, VGA_CRT_IC, reg);
  259. return vga_mm_r (regbase, VGA_CRT_DC);
  260. }
  261. static inline void vga_mm_wcrt (void __iomem *regbase, unsigned char reg, unsigned char val)
  262. {
  263. #ifdef VGA_OUTW_WRITE
  264. vga_mm_w_fast (regbase, VGA_CRT_IC, reg, val);
  265. #else
  266. vga_mm_w (regbase, VGA_CRT_IC, reg);
  267. vga_mm_w (regbase, VGA_CRT_DC, val);
  268. #endif /* VGA_OUTW_WRITE */
  269. }
  270. /*
  271. * VGA sequencer register read/write
  272. */
  273. static inline unsigned char vga_rseq (void __iomem *regbase, unsigned char reg)
  274. {
  275. vga_w (regbase, VGA_SEQ_I, reg);
  276. return vga_r (regbase, VGA_SEQ_D);
  277. }
  278. static inline void vga_wseq (void __iomem *regbase, unsigned char reg, unsigned char val)
  279. {
  280. #ifdef VGA_OUTW_WRITE
  281. vga_w_fast (regbase, VGA_SEQ_I, reg, val);
  282. #else
  283. vga_w (regbase, VGA_SEQ_I, reg);
  284. vga_w (regbase, VGA_SEQ_D, val);
  285. #endif /* VGA_OUTW_WRITE */
  286. }
  287. static inline unsigned char vga_io_rseq (unsigned char reg)
  288. {
  289. vga_io_w (VGA_SEQ_I, reg);
  290. return vga_io_r (VGA_SEQ_D);
  291. }
  292. static inline void vga_io_wseq (unsigned char reg, unsigned char val)
  293. {
  294. #ifdef VGA_OUTW_WRITE
  295. vga_io_w_fast (VGA_SEQ_I, reg, val);
  296. #else
  297. vga_io_w (VGA_SEQ_I, reg);
  298. vga_io_w (VGA_SEQ_D, val);
  299. #endif /* VGA_OUTW_WRITE */
  300. }
  301. static inline unsigned char vga_mm_rseq (void __iomem *regbase, unsigned char reg)
  302. {
  303. vga_mm_w (regbase, VGA_SEQ_I, reg);
  304. return vga_mm_r (regbase, VGA_SEQ_D);
  305. }
  306. static inline void vga_mm_wseq (void __iomem *regbase, unsigned char reg, unsigned char val)
  307. {
  308. #ifdef VGA_OUTW_WRITE
  309. vga_mm_w_fast (regbase, VGA_SEQ_I, reg, val);
  310. #else
  311. vga_mm_w (regbase, VGA_SEQ_I, reg);
  312. vga_mm_w (regbase, VGA_SEQ_D, val);
  313. #endif /* VGA_OUTW_WRITE */
  314. }
  315. /*
  316. * VGA graphics controller register read/write
  317. */
  318. static inline unsigned char vga_rgfx (void __iomem *regbase, unsigned char reg)
  319. {
  320. vga_w (regbase, VGA_GFX_I, reg);
  321. return vga_r (regbase, VGA_GFX_D);
  322. }
  323. static inline void vga_wgfx (void __iomem *regbase, unsigned char reg, unsigned char val)
  324. {
  325. #ifdef VGA_OUTW_WRITE
  326. vga_w_fast (regbase, VGA_GFX_I, reg, val);
  327. #else
  328. vga_w (regbase, VGA_GFX_I, reg);
  329. vga_w (regbase, VGA_GFX_D, val);
  330. #endif /* VGA_OUTW_WRITE */
  331. }
  332. static inline unsigned char vga_io_rgfx (unsigned char reg)
  333. {
  334. vga_io_w (VGA_GFX_I, reg);
  335. return vga_io_r (VGA_GFX_D);
  336. }
  337. static inline void vga_io_wgfx (unsigned char reg, unsigned char val)
  338. {
  339. #ifdef VGA_OUTW_WRITE
  340. vga_io_w_fast (VGA_GFX_I, reg, val);
  341. #else
  342. vga_io_w (VGA_GFX_I, reg);
  343. vga_io_w (VGA_GFX_D, val);
  344. #endif /* VGA_OUTW_WRITE */
  345. }
  346. static inline unsigned char vga_mm_rgfx (void __iomem *regbase, unsigned char reg)
  347. {
  348. vga_mm_w (regbase, VGA_GFX_I, reg);
  349. return vga_mm_r (regbase, VGA_GFX_D);
  350. }
  351. static inline void vga_mm_wgfx (void __iomem *regbase, unsigned char reg, unsigned char val)
  352. {
  353. #ifdef VGA_OUTW_WRITE
  354. vga_mm_w_fast (regbase, VGA_GFX_I, reg, val);
  355. #else
  356. vga_mm_w (regbase, VGA_GFX_I, reg);
  357. vga_mm_w (regbase, VGA_GFX_D, val);
  358. #endif /* VGA_OUTW_WRITE */
  359. }
  360. /*
  361. * VGA attribute controller register read/write
  362. */
  363. static inline unsigned char vga_rattr (void __iomem *regbase, unsigned char reg)
  364. {
  365. vga_w (regbase, VGA_ATT_IW, reg);
  366. return vga_r (regbase, VGA_ATT_R);
  367. }
  368. static inline void vga_wattr (void __iomem *regbase, unsigned char reg, unsigned char val)
  369. {
  370. vga_w (regbase, VGA_ATT_IW, reg);
  371. vga_w (regbase, VGA_ATT_W, val);
  372. }
  373. static inline unsigned char vga_io_rattr (unsigned char reg)
  374. {
  375. vga_io_w (VGA_ATT_IW, reg);
  376. return vga_io_r (VGA_ATT_R);
  377. }
  378. static inline void vga_io_wattr (unsigned char reg, unsigned char val)
  379. {
  380. vga_io_w (VGA_ATT_IW, reg);
  381. vga_io_w (VGA_ATT_W, val);
  382. }
  383. static inline unsigned char vga_mm_rattr (void __iomem *regbase, unsigned char reg)
  384. {
  385. vga_mm_w (regbase, VGA_ATT_IW, reg);
  386. return vga_mm_r (regbase, VGA_ATT_R);
  387. }
  388. static inline void vga_mm_wattr (void __iomem *regbase, unsigned char reg, unsigned char val)
  389. {
  390. vga_mm_w (regbase, VGA_ATT_IW, reg);
  391. vga_mm_w (regbase, VGA_ATT_W, val);
  392. }
  393. #endif /* __linux_video_vga_h__ */