sh_mobile_lcdc.h 6.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef __ASM_SH_MOBILE_LCDC_H__
  3. #define __ASM_SH_MOBILE_LCDC_H__
  4. #include <linux/fb.h>
  5. /* Register definitions */
  6. #define _LDDCKR 0x410
  7. #define LDDCKR_ICKSEL_BUS (0 << 16)
  8. #define LDDCKR_ICKSEL_MIPI (1 << 16)
  9. #define LDDCKR_ICKSEL_HDMI (2 << 16)
  10. #define LDDCKR_ICKSEL_EXT (3 << 16)
  11. #define LDDCKR_ICKSEL_MASK (7 << 16)
  12. #define LDDCKR_MOSEL (1 << 6)
  13. #define _LDDCKSTPR 0x414
  14. #define _LDINTR 0x468
  15. #define LDINTR_FE (1 << 10)
  16. #define LDINTR_VSE (1 << 9)
  17. #define LDINTR_VEE (1 << 8)
  18. #define LDINTR_FS (1 << 2)
  19. #define LDINTR_VSS (1 << 1)
  20. #define LDINTR_VES (1 << 0)
  21. #define LDINTR_STATUS_MASK (0xff << 0)
  22. #define _LDSR 0x46c
  23. #define LDSR_MSS (1 << 10)
  24. #define LDSR_MRS (1 << 8)
  25. #define LDSR_AS (1 << 1)
  26. #define _LDCNT1R 0x470
  27. #define LDCNT1R_DE (1 << 0)
  28. #define _LDCNT2R 0x474
  29. #define LDCNT2R_BR (1 << 8)
  30. #define LDCNT2R_MD (1 << 3)
  31. #define LDCNT2R_SE (1 << 2)
  32. #define LDCNT2R_ME (1 << 1)
  33. #define LDCNT2R_DO (1 << 0)
  34. #define _LDRCNTR 0x478
  35. #define LDRCNTR_SRS (1 << 17)
  36. #define LDRCNTR_SRC (1 << 16)
  37. #define LDRCNTR_MRS (1 << 1)
  38. #define LDRCNTR_MRC (1 << 0)
  39. #define _LDDDSR 0x47c
  40. #define LDDDSR_LS (1 << 2)
  41. #define LDDDSR_WS (1 << 1)
  42. #define LDDDSR_BS (1 << 0)
  43. #define LDMT1R_VPOL (1 << 28)
  44. #define LDMT1R_HPOL (1 << 27)
  45. #define LDMT1R_DWPOL (1 << 26)
  46. #define LDMT1R_DIPOL (1 << 25)
  47. #define LDMT1R_DAPOL (1 << 24)
  48. #define LDMT1R_HSCNT (1 << 17)
  49. #define LDMT1R_DWCNT (1 << 16)
  50. #define LDMT1R_IFM (1 << 12)
  51. #define LDMT1R_MIFTYP_RGB8 (0x0 << 0)
  52. #define LDMT1R_MIFTYP_RGB9 (0x4 << 0)
  53. #define LDMT1R_MIFTYP_RGB12A (0x5 << 0)
  54. #define LDMT1R_MIFTYP_RGB12B (0x6 << 0)
  55. #define LDMT1R_MIFTYP_RGB16 (0x7 << 0)
  56. #define LDMT1R_MIFTYP_RGB18 (0xa << 0)
  57. #define LDMT1R_MIFTYP_RGB24 (0xb << 0)
  58. #define LDMT1R_MIFTYP_YCBCR (0xf << 0)
  59. #define LDMT1R_MIFTYP_SYS8A (0x0 << 0)
  60. #define LDMT1R_MIFTYP_SYS8B (0x1 << 0)
  61. #define LDMT1R_MIFTYP_SYS8C (0x2 << 0)
  62. #define LDMT1R_MIFTYP_SYS8D (0x3 << 0)
  63. #define LDMT1R_MIFTYP_SYS9 (0x4 << 0)
  64. #define LDMT1R_MIFTYP_SYS12 (0x5 << 0)
  65. #define LDMT1R_MIFTYP_SYS16A (0x7 << 0)
  66. #define LDMT1R_MIFTYP_SYS16B (0x8 << 0)
  67. #define LDMT1R_MIFTYP_SYS16C (0x9 << 0)
  68. #define LDMT1R_MIFTYP_SYS18 (0xa << 0)
  69. #define LDMT1R_MIFTYP_SYS24 (0xb << 0)
  70. #define LDMT1R_MIFTYP_MASK (0xf << 0)
  71. #define LDDFR_CF1 (1 << 18)
  72. #define LDDFR_CF0 (1 << 17)
  73. #define LDDFR_CC (1 << 16)
  74. #define LDDFR_YF_420 (0 << 8)
  75. #define LDDFR_YF_422 (1 << 8)
  76. #define LDDFR_YF_444 (2 << 8)
  77. #define LDDFR_YF_MASK (3 << 8)
  78. #define LDDFR_PKF_ARGB32 (0x00 << 0)
  79. #define LDDFR_PKF_RGB16 (0x03 << 0)
  80. #define LDDFR_PKF_RGB24 (0x0b << 0)
  81. #define LDDFR_PKF_MASK (0x1f << 0)
  82. #define LDSM1R_OS (1 << 0)
  83. #define LDSM2R_OSTRG (1 << 0)
  84. #define LDPMR_LPS (3 << 0)
  85. #define _LDDWD0R 0x800
  86. #define LDDWDxR_WDACT (1 << 28)
  87. #define LDDWDxR_RSW (1 << 24)
  88. #define _LDDRDR 0x840
  89. #define LDDRDR_RSR (1 << 24)
  90. #define LDDRDR_DRD_MASK (0x3ffff << 0)
  91. #define _LDDWAR 0x900
  92. #define LDDWAR_WA (1 << 0)
  93. #define _LDDRAR 0x904
  94. #define LDDRAR_RA (1 << 0)
  95. enum {
  96. RGB8 = LDMT1R_MIFTYP_RGB8, /* 24bpp, 8:8:8 */
  97. RGB9 = LDMT1R_MIFTYP_RGB9, /* 18bpp, 9:9 */
  98. RGB12A = LDMT1R_MIFTYP_RGB12A, /* 24bpp, 12:12 */
  99. RGB12B = LDMT1R_MIFTYP_RGB12B, /* 12bpp */
  100. RGB16 = LDMT1R_MIFTYP_RGB16, /* 16bpp */
  101. RGB18 = LDMT1R_MIFTYP_RGB18, /* 18bpp */
  102. RGB24 = LDMT1R_MIFTYP_RGB24, /* 24bpp */
  103. YUV422 = LDMT1R_MIFTYP_YCBCR, /* 16bpp */
  104. SYS8A = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8A, /* 24bpp, 8:8:8 */
  105. SYS8B = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8B, /* 18bpp, 8:8:2 */
  106. SYS8C = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8C, /* 18bpp, 2:8:8 */
  107. SYS8D = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8D, /* 16bpp, 8:8 */
  108. SYS9 = LDMT1R_IFM | LDMT1R_MIFTYP_SYS9, /* 18bpp, 9:9 */
  109. SYS12 = LDMT1R_IFM | LDMT1R_MIFTYP_SYS12, /* 24bpp, 12:12 */
  110. SYS16A = LDMT1R_IFM | LDMT1R_MIFTYP_SYS16A, /* 16bpp */
  111. SYS16B = LDMT1R_IFM | LDMT1R_MIFTYP_SYS16B, /* 18bpp, 16:2 */
  112. SYS16C = LDMT1R_IFM | LDMT1R_MIFTYP_SYS16C, /* 18bpp, 2:16 */
  113. SYS18 = LDMT1R_IFM | LDMT1R_MIFTYP_SYS18, /* 18bpp */
  114. SYS24 = LDMT1R_IFM | LDMT1R_MIFTYP_SYS24, /* 24bpp */
  115. };
  116. enum { LCDC_CHAN_DISABLED = 0,
  117. LCDC_CHAN_MAINLCD,
  118. LCDC_CHAN_SUBLCD };
  119. enum { LCDC_CLK_BUS, LCDC_CLK_PERIPHERAL, LCDC_CLK_EXTERNAL };
  120. #define LCDC_FLAGS_DWPOL (1 << 0) /* Rising edge dot clock data latch */
  121. #define LCDC_FLAGS_DIPOL (1 << 1) /* Active low display enable polarity */
  122. #define LCDC_FLAGS_DAPOL (1 << 2) /* Active low display data polarity */
  123. #define LCDC_FLAGS_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */
  124. #define LCDC_FLAGS_DWCNT (1 << 4) /* Disable dotclock during blanking */
  125. struct sh_mobile_lcdc_sys_bus_cfg {
  126. unsigned long ldmt2r;
  127. unsigned long ldmt3r;
  128. unsigned long deferred_io_msec;
  129. };
  130. struct sh_mobile_lcdc_sys_bus_ops {
  131. void (*write_index)(void *handle, unsigned long data);
  132. void (*write_data)(void *handle, unsigned long data);
  133. unsigned long (*read_data)(void *handle);
  134. };
  135. struct sh_mobile_lcdc_panel_cfg {
  136. unsigned long width; /* Panel width in mm */
  137. unsigned long height; /* Panel height in mm */
  138. int (*setup_sys)(void *sys_ops_handle,
  139. struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
  140. void (*start_transfer)(void *sys_ops_handle,
  141. struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
  142. void (*display_on)(void);
  143. void (*display_off)(void);
  144. };
  145. /* backlight info */
  146. struct sh_mobile_lcdc_bl_info {
  147. const char *name;
  148. int max_brightness;
  149. int (*set_brightness)(int brightness);
  150. };
  151. struct sh_mobile_lcdc_overlay_cfg {
  152. int fourcc;
  153. unsigned int max_xres;
  154. unsigned int max_yres;
  155. };
  156. struct sh_mobile_lcdc_chan_cfg {
  157. int chan;
  158. int fourcc;
  159. int colorspace;
  160. int interface_type; /* selects RGBn or SYSn I/F, see above */
  161. int clock_divider;
  162. unsigned long flags; /* LCDC_FLAGS_... */
  163. const struct fb_videomode *lcd_modes;
  164. int num_modes;
  165. struct sh_mobile_lcdc_panel_cfg panel_cfg;
  166. struct sh_mobile_lcdc_bl_info bl_info;
  167. struct sh_mobile_lcdc_sys_bus_cfg sys_bus_cfg; /* only for SYSn I/F */
  168. struct platform_device *tx_dev; /* HDMI/DSI transmitter device */
  169. };
  170. struct sh_mobile_lcdc_info {
  171. int clock_source;
  172. struct sh_mobile_lcdc_chan_cfg ch[2];
  173. struct sh_mobile_lcdc_overlay_cfg overlays[4];
  174. };
  175. #endif /* __ASM_SH_MOBILE_LCDC_H__ */