samsung_fimd.h 17 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /* include/video/samsung_fimd.h
  3. *
  4. * Copyright 2008 Openmoko, Inc.
  5. * Copyright 2008 Simtec Electronics
  6. * http://armlinux.simtec.co.uk/
  7. * Ben Dooks <ben@simtec.co.uk>
  8. *
  9. * S3C Platform - new-style fimd and framebuffer register definitions
  10. *
  11. * This is the register set for the fimd and new style framebuffer interface
  12. * found from the S3C2443 onwards into the S3C2416, S3C2450, the
  13. * S3C64XX series such as the S3C6400 and S3C6410, and Exynos series.
  14. */
  15. /* VIDCON0 */
  16. #define VIDCON0 0x00
  17. #define VIDCON0_DSI_EN (1 << 30)
  18. #define VIDCON0_INTERLACE (1 << 29)
  19. #define VIDCON0_VIDOUT_MASK (0x7 << 26)
  20. #define VIDCON0_VIDOUT_SHIFT 26
  21. #define VIDCON0_VIDOUT_RGB (0x0 << 26)
  22. #define VIDCON0_VIDOUT_TV (0x1 << 26)
  23. #define VIDCON0_VIDOUT_I80_LDI0 (0x2 << 26)
  24. #define VIDCON0_VIDOUT_I80_LDI1 (0x3 << 26)
  25. #define VIDCON0_VIDOUT_WB_RGB (0x4 << 26)
  26. #define VIDCON0_VIDOUT_WB_I80_LDI0 (0x6 << 26)
  27. #define VIDCON0_VIDOUT_WB_I80_LDI1 (0x7 << 26)
  28. #define VIDCON0_L1_DATA_MASK (0x7 << 23)
  29. #define VIDCON0_L1_DATA_SHIFT 23
  30. #define VIDCON0_L1_DATA_16BPP (0x0 << 23)
  31. #define VIDCON0_L1_DATA_18BPP16 (0x1 << 23)
  32. #define VIDCON0_L1_DATA_18BPP9 (0x2 << 23)
  33. #define VIDCON0_L1_DATA_24BPP (0x3 << 23)
  34. #define VIDCON0_L1_DATA_18BPP (0x4 << 23)
  35. #define VIDCON0_L1_DATA_16BPP8 (0x5 << 23)
  36. #define VIDCON0_L0_DATA_MASK (0x7 << 20)
  37. #define VIDCON0_L0_DATA_SHIFT 20
  38. #define VIDCON0_L0_DATA_16BPP (0x0 << 20)
  39. #define VIDCON0_L0_DATA_18BPP16 (0x1 << 20)
  40. #define VIDCON0_L0_DATA_18BPP9 (0x2 << 20)
  41. #define VIDCON0_L0_DATA_24BPP (0x3 << 20)
  42. #define VIDCON0_L0_DATA_18BPP (0x4 << 20)
  43. #define VIDCON0_L0_DATA_16BPP8 (0x5 << 20)
  44. #define VIDCON0_PNRMODE_MASK (0x3 << 17)
  45. #define VIDCON0_PNRMODE_SHIFT 17
  46. #define VIDCON0_PNRMODE_RGB (0x0 << 17)
  47. #define VIDCON0_PNRMODE_BGR (0x1 << 17)
  48. #define VIDCON0_PNRMODE_SERIAL_RGB (0x2 << 17)
  49. #define VIDCON0_PNRMODE_SERIAL_BGR (0x3 << 17)
  50. #define VIDCON0_CLKVALUP (1 << 16)
  51. #define VIDCON0_CLKVAL_F_MASK (0xff << 6)
  52. #define VIDCON0_CLKVAL_F_SHIFT 6
  53. #define VIDCON0_CLKVAL_F_LIMIT 0xff
  54. #define VIDCON0_CLKVAL_F(_x) ((_x) << 6)
  55. #define VIDCON0_VLCKFREE (1 << 5)
  56. #define VIDCON0_CLKDIR (1 << 4)
  57. #define VIDCON0_CLKSEL_MASK (0x3 << 2)
  58. #define VIDCON0_CLKSEL_SHIFT 2
  59. #define VIDCON0_CLKSEL_HCLK (0x0 << 2)
  60. #define VIDCON0_CLKSEL_LCD (0x1 << 2)
  61. #define VIDCON0_CLKSEL_27M (0x3 << 2)
  62. #define VIDCON0_ENVID (1 << 1)
  63. #define VIDCON0_ENVID_F (1 << 0)
  64. #define VIDCON1 0x04
  65. #define VIDCON1_LINECNT_MASK (0x7ff << 16)
  66. #define VIDCON1_LINECNT_SHIFT 16
  67. #define VIDCON1_LINECNT_GET(_v) (((_v) >> 16) & 0x7ff)
  68. #define VIDCON1_FSTATUS_EVEN (1 << 15)
  69. #define VIDCON1_VSTATUS_MASK (0x3 << 13)
  70. #define VIDCON1_VSTATUS_SHIFT 13
  71. #define VIDCON1_VSTATUS_VSYNC (0x0 << 13)
  72. #define VIDCON1_VSTATUS_BACKPORCH (0x1 << 13)
  73. #define VIDCON1_VSTATUS_ACTIVE (0x2 << 13)
  74. #define VIDCON1_VSTATUS_FRONTPORCH (0x3 << 13)
  75. #define VIDCON1_VCLK_MASK (0x3 << 9)
  76. #define VIDCON1_VCLK_HOLD (0x0 << 9)
  77. #define VIDCON1_VCLK_RUN (0x1 << 9)
  78. #define VIDCON1_INV_VCLK (1 << 7)
  79. #define VIDCON1_INV_HSYNC (1 << 6)
  80. #define VIDCON1_INV_VSYNC (1 << 5)
  81. #define VIDCON1_INV_VDEN (1 << 4)
  82. /* VIDCON2 */
  83. #define VIDCON2 0x08
  84. #define VIDCON2_EN601 (1 << 23)
  85. #define VIDCON2_TVFMTSEL_SW (1 << 14)
  86. #define VIDCON2_TVFMTSEL1_MASK (0x3 << 12)
  87. #define VIDCON2_TVFMTSEL1_SHIFT 12
  88. #define VIDCON2_TVFMTSEL1_RGB (0x0 << 12)
  89. #define VIDCON2_TVFMTSEL1_YUV422 (0x1 << 12)
  90. #define VIDCON2_TVFMTSEL1_YUV444 (0x2 << 12)
  91. #define VIDCON2_ORGYCbCr (1 << 8)
  92. #define VIDCON2_YUVORDCrCb (1 << 7)
  93. /* PRTCON (S3C6410)
  94. * Might not be present in the S3C6410 documentation,
  95. * but tests prove it's there almost for sure; shouldn't hurt in any case.
  96. */
  97. #define PRTCON 0x0c
  98. #define PRTCON_PROTECT (1 << 11)
  99. /* VIDTCON0 */
  100. #define VIDTCON0 0x10
  101. #define VIDTCON0_VBPDE_MASK (0xff << 24)
  102. #define VIDTCON0_VBPDE_SHIFT 24
  103. #define VIDTCON0_VBPDE_LIMIT 0xff
  104. #define VIDTCON0_VBPDE(_x) ((_x) << 24)
  105. #define VIDTCON0_VBPD_MASK (0xff << 16)
  106. #define VIDTCON0_VBPD_SHIFT 16
  107. #define VIDTCON0_VBPD_LIMIT 0xff
  108. #define VIDTCON0_VBPD(_x) ((_x) << 16)
  109. #define VIDTCON0_VFPD_MASK (0xff << 8)
  110. #define VIDTCON0_VFPD_SHIFT 8
  111. #define VIDTCON0_VFPD_LIMIT 0xff
  112. #define VIDTCON0_VFPD(_x) ((_x) << 8)
  113. #define VIDTCON0_VSPW_MASK (0xff << 0)
  114. #define VIDTCON0_VSPW_SHIFT 0
  115. #define VIDTCON0_VSPW_LIMIT 0xff
  116. #define VIDTCON0_VSPW(_x) ((_x) << 0)
  117. /* VIDTCON1 */
  118. #define VIDTCON1 0x14
  119. #define VIDTCON1_VFPDE_MASK (0xff << 24)
  120. #define VIDTCON1_VFPDE_SHIFT 24
  121. #define VIDTCON1_VFPDE_LIMIT 0xff
  122. #define VIDTCON1_VFPDE(_x) ((_x) << 24)
  123. #define VIDTCON1_HBPD_MASK (0xff << 16)
  124. #define VIDTCON1_HBPD_SHIFT 16
  125. #define VIDTCON1_HBPD_LIMIT 0xff
  126. #define VIDTCON1_HBPD(_x) ((_x) << 16)
  127. #define VIDTCON1_HFPD_MASK (0xff << 8)
  128. #define VIDTCON1_HFPD_SHIFT 8
  129. #define VIDTCON1_HFPD_LIMIT 0xff
  130. #define VIDTCON1_HFPD(_x) ((_x) << 8)
  131. #define VIDTCON1_HSPW_MASK (0xff << 0)
  132. #define VIDTCON1_HSPW_SHIFT 0
  133. #define VIDTCON1_HSPW_LIMIT 0xff
  134. #define VIDTCON1_HSPW(_x) ((_x) << 0)
  135. #define VIDTCON2 0x18
  136. #define VIDTCON2_LINEVAL_E(_x) ((((_x) & 0x800) >> 11) << 23)
  137. #define VIDTCON2_LINEVAL_MASK (0x7ff << 11)
  138. #define VIDTCON2_LINEVAL_SHIFT 11
  139. #define VIDTCON2_LINEVAL_LIMIT 0x7ff
  140. #define VIDTCON2_LINEVAL(_x) (((_x) & 0x7ff) << 11)
  141. #define VIDTCON2_HOZVAL_E(_x) ((((_x) & 0x800) >> 11) << 22)
  142. #define VIDTCON2_HOZVAL_MASK (0x7ff << 0)
  143. #define VIDTCON2_HOZVAL_SHIFT 0
  144. #define VIDTCON2_HOZVAL_LIMIT 0x7ff
  145. #define VIDTCON2_HOZVAL(_x) (((_x) & 0x7ff) << 0)
  146. /* WINCONx */
  147. #define WINCON(_win) (0x20 + ((_win) * 4))
  148. #define WINCONx_CSCCON_EQ601 (0x0 << 28)
  149. #define WINCONx_CSCCON_EQ709 (0x1 << 28)
  150. #define WINCONx_CSCWIDTH_MASK (0x3 << 26)
  151. #define WINCONx_CSCWIDTH_SHIFT 26
  152. #define WINCONx_CSCWIDTH_WIDE (0x0 << 26)
  153. #define WINCONx_CSCWIDTH_NARROW (0x3 << 26)
  154. #define WINCONx_ENLOCAL (1 << 22)
  155. #define WINCONx_BUFSTATUS (1 << 21)
  156. #define WINCONx_BUFSEL (1 << 20)
  157. #define WINCONx_BUFAUTOEN (1 << 19)
  158. #define WINCONx_BITSWP (1 << 18)
  159. #define WINCONx_BYTSWP (1 << 17)
  160. #define WINCONx_HAWSWP (1 << 16)
  161. #define WINCONx_WSWP (1 << 15)
  162. #define WINCONx_YCbCr (1 << 13)
  163. #define WINCONx_BURSTLEN_MASK (0x3 << 9)
  164. #define WINCONx_BURSTLEN_SHIFT 9
  165. #define WINCONx_BURSTLEN_16WORD (0x0 << 9)
  166. #define WINCONx_BURSTLEN_8WORD (0x1 << 9)
  167. #define WINCONx_BURSTLEN_4WORD (0x2 << 9)
  168. #define WINCONx_ENWIN (1 << 0)
  169. #define WINCONx_BLEND_MODE_MASK (0xc2)
  170. #define WINCON0_BPPMODE_MASK (0xf << 2)
  171. #define WINCON0_BPPMODE_SHIFT 2
  172. #define WINCON0_BPPMODE_1BPP (0x0 << 2)
  173. #define WINCON0_BPPMODE_2BPP (0x1 << 2)
  174. #define WINCON0_BPPMODE_4BPP (0x2 << 2)
  175. #define WINCON0_BPPMODE_8BPP_PALETTE (0x3 << 2)
  176. #define WINCON0_BPPMODE_16BPP_565 (0x5 << 2)
  177. #define WINCON0_BPPMODE_16BPP_1555 (0x7 << 2)
  178. #define WINCON0_BPPMODE_18BPP_666 (0x8 << 2)
  179. #define WINCON0_BPPMODE_24BPP_888 (0xb << 2)
  180. #define WINCON1_LOCALSEL_CAMIF (1 << 23)
  181. #define WINCON1_ALPHA_MUL (1 << 7)
  182. #define WINCON1_BLD_PIX (1 << 6)
  183. #define WINCON1_BPPMODE_MASK (0xf << 2)
  184. #define WINCON1_BPPMODE_SHIFT 2
  185. #define WINCON1_BPPMODE_1BPP (0x0 << 2)
  186. #define WINCON1_BPPMODE_2BPP (0x1 << 2)
  187. #define WINCON1_BPPMODE_4BPP (0x2 << 2)
  188. #define WINCON1_BPPMODE_8BPP_PALETTE (0x3 << 2)
  189. #define WINCON1_BPPMODE_8BPP_1232 (0x4 << 2)
  190. #define WINCON1_BPPMODE_16BPP_565 (0x5 << 2)
  191. #define WINCON1_BPPMODE_16BPP_A1555 (0x6 << 2)
  192. #define WINCON1_BPPMODE_16BPP_I1555 (0x7 << 2)
  193. #define WINCON1_BPPMODE_18BPP_666 (0x8 << 2)
  194. #define WINCON1_BPPMODE_18BPP_A1665 (0x9 << 2)
  195. #define WINCON1_BPPMODE_19BPP_A1666 (0xa << 2)
  196. #define WINCON1_BPPMODE_24BPP_888 (0xb << 2)
  197. #define WINCON1_BPPMODE_24BPP_A1887 (0xc << 2)
  198. #define WINCON1_BPPMODE_25BPP_A1888 (0xd << 2)
  199. #define WINCON1_BPPMODE_28BPP_A4888 (0xd << 2)
  200. #define WINCON1_ALPHA_SEL (1 << 1)
  201. /* S5PV210 */
  202. #define SHADOWCON 0x34
  203. #define SHADOWCON_WINx_PROTECT(_win) (1 << (10 + (_win)))
  204. /* DMA channels (all windows) */
  205. #define SHADOWCON_CHx_ENABLE(_win) (1 << (_win))
  206. /* Local input channels (windows 0-2) */
  207. #define SHADOWCON_CHx_LOCAL_ENABLE(_win) (1 << (5 + (_win)))
  208. /* VIDOSDx */
  209. #define VIDOSD_BASE 0x40
  210. #define VIDOSDxA_TOPLEFT_X_E(_x) ((((_x) & 0x800) >> 11) << 23)
  211. #define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11)
  212. #define VIDOSDxA_TOPLEFT_X_SHIFT 11
  213. #define VIDOSDxA_TOPLEFT_X_LIMIT 0x7ff
  214. #define VIDOSDxA_TOPLEFT_X(_x) (((_x) & 0x7ff) << 11)
  215. #define VIDOSDxA_TOPLEFT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22)
  216. #define VIDOSDxA_TOPLEFT_Y_MASK (0x7ff << 0)
  217. #define VIDOSDxA_TOPLEFT_Y_SHIFT 0
  218. #define VIDOSDxA_TOPLEFT_Y_LIMIT 0x7ff
  219. #define VIDOSDxA_TOPLEFT_Y(_x) (((_x) & 0x7ff) << 0)
  220. #define VIDOSDxB_BOTRIGHT_X_E(_x) ((((_x) & 0x800) >> 11) << 23)
  221. #define VIDOSDxB_BOTRIGHT_X_MASK (0x7ff << 11)
  222. #define VIDOSDxB_BOTRIGHT_X_SHIFT 11
  223. #define VIDOSDxB_BOTRIGHT_X_LIMIT 0x7ff
  224. #define VIDOSDxB_BOTRIGHT_X(_x) (((_x) & 0x7ff) << 11)
  225. #define VIDOSDxB_BOTRIGHT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22)
  226. #define VIDOSDxB_BOTRIGHT_Y_MASK (0x7ff << 0)
  227. #define VIDOSDxB_BOTRIGHT_Y_SHIFT 0
  228. #define VIDOSDxB_BOTRIGHT_Y_LIMIT 0x7ff
  229. #define VIDOSDxB_BOTRIGHT_Y(_x) (((_x) & 0x7ff) << 0)
  230. /* For VIDOSD[1..4]C */
  231. #define VIDISD14C_ALPHA0_R(_x) ((_x) << 20)
  232. #define VIDISD14C_ALPHA0_G_MASK (0xf << 16)
  233. #define VIDISD14C_ALPHA0_G_SHIFT 16
  234. #define VIDISD14C_ALPHA0_G_LIMIT 0xf
  235. #define VIDISD14C_ALPHA0_G(_x) ((_x) << 16)
  236. #define VIDISD14C_ALPHA0_B_MASK (0xf << 12)
  237. #define VIDISD14C_ALPHA0_B_SHIFT 12
  238. #define VIDISD14C_ALPHA0_B_LIMIT 0xf
  239. #define VIDISD14C_ALPHA0_B(_x) ((_x) << 12)
  240. #define VIDISD14C_ALPHA1_R_MASK (0xf << 8)
  241. #define VIDISD14C_ALPHA1_R_SHIFT 8
  242. #define VIDISD14C_ALPHA1_R_LIMIT 0xf
  243. #define VIDISD14C_ALPHA1_R(_x) ((_x) << 8)
  244. #define VIDISD14C_ALPHA1_G_MASK (0xf << 4)
  245. #define VIDISD14C_ALPHA1_G_SHIFT 4
  246. #define VIDISD14C_ALPHA1_G_LIMIT 0xf
  247. #define VIDISD14C_ALPHA1_G(_x) ((_x) << 4)
  248. #define VIDISD14C_ALPHA1_B_MASK (0xf << 0)
  249. #define VIDISD14C_ALPHA1_B_SHIFT 0
  250. #define VIDISD14C_ALPHA1_B_LIMIT 0xf
  251. #define VIDISD14C_ALPHA1_B(_x) ((_x) << 0)
  252. #define VIDW_ALPHA 0x021c
  253. #define VIDW_ALPHA_R(_x) ((_x) << 16)
  254. #define VIDW_ALPHA_G(_x) ((_x) << 8)
  255. #define VIDW_ALPHA_B(_x) ((_x) << 0)
  256. /* Video buffer addresses */
  257. #define VIDW_BUF_START(_buff) (0xA0 + ((_buff) * 8))
  258. #define VIDW_BUF_START_S(_buff) (0x40A0 + ((_buff) * 8))
  259. #define VIDW_BUF_START1(_buff) (0xA4 + ((_buff) * 8))
  260. #define VIDW_BUF_END(_buff) (0xD0 + ((_buff) * 8))
  261. #define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8))
  262. #define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4))
  263. #define VIDW_BUF_SIZE_OFFSET_E(_x) ((((_x) & 0x2000) >> 13) << 27)
  264. #define VIDW_BUF_SIZE_OFFSET_MASK (0x1fff << 13)
  265. #define VIDW_BUF_SIZE_OFFSET_SHIFT 13
  266. #define VIDW_BUF_SIZE_OFFSET_LIMIT 0x1fff
  267. #define VIDW_BUF_SIZE_OFFSET(_x) (((_x) & 0x1fff) << 13)
  268. #define VIDW_BUF_SIZE_PAGEWIDTH_E(_x) ((((_x) & 0x2000) >> 13) << 26)
  269. #define VIDW_BUF_SIZE_PAGEWIDTH_MASK (0x1fff << 0)
  270. #define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT 0
  271. #define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT 0x1fff
  272. #define VIDW_BUF_SIZE_PAGEWIDTH(_x) (((_x) & 0x1fff) << 0)
  273. /* Interrupt controls and status */
  274. #define VIDINTCON0 0x130
  275. #define VIDINTCON0_FIFOINTERVAL_MASK (0x3f << 20)
  276. #define VIDINTCON0_FIFOINTERVAL_SHIFT 20
  277. #define VIDINTCON0_FIFOINTERVAL_LIMIT 0x3f
  278. #define VIDINTCON0_FIFOINTERVAL(_x) ((_x) << 20)
  279. #define VIDINTCON0_INT_SYSMAINCON (1 << 19)
  280. #define VIDINTCON0_INT_SYSSUBCON (1 << 18)
  281. #define VIDINTCON0_INT_I80IFDONE (1 << 17)
  282. #define VIDINTCON0_FRAMESEL0_MASK (0x3 << 15)
  283. #define VIDINTCON0_FRAMESEL0_SHIFT 15
  284. #define VIDINTCON0_FRAMESEL0_BACKPORCH (0x0 << 15)
  285. #define VIDINTCON0_FRAMESEL0_VSYNC (0x1 << 15)
  286. #define VIDINTCON0_FRAMESEL0_ACTIVE (0x2 << 15)
  287. #define VIDINTCON0_FRAMESEL0_FRONTPORCH (0x3 << 15)
  288. #define VIDINTCON0_FRAMESEL1 (1 << 13)
  289. #define VIDINTCON0_FRAMESEL1_MASK (0x3 << 13)
  290. #define VIDINTCON0_FRAMESEL1_NONE (0x0 << 13)
  291. #define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 13)
  292. #define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 13)
  293. #define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 13)
  294. #define VIDINTCON0_INT_FRAME (1 << 12)
  295. #define VIDINTCON0_FIFIOSEL_MASK (0x7f << 5)
  296. #define VIDINTCON0_FIFIOSEL_SHIFT 5
  297. #define VIDINTCON0_FIFIOSEL_WINDOW0 (0x1 << 5)
  298. #define VIDINTCON0_FIFIOSEL_WINDOW1 (0x2 << 5)
  299. #define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5)
  300. #define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5)
  301. #define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5)
  302. #define VIDINTCON0_FIFOLEVEL_MASK (0x7 << 2)
  303. #define VIDINTCON0_FIFOLEVEL_SHIFT 2
  304. #define VIDINTCON0_FIFOLEVEL_TO25PC (0x0 << 2)
  305. #define VIDINTCON0_FIFOLEVEL_TO50PC (0x1 << 2)
  306. #define VIDINTCON0_FIFOLEVEL_TO75PC (0x2 << 2)
  307. #define VIDINTCON0_FIFOLEVEL_EMPTY (0x3 << 2)
  308. #define VIDINTCON0_FIFOLEVEL_FULL (0x4 << 2)
  309. #define VIDINTCON0_INT_FIFO_MASK (0x3 << 0)
  310. #define VIDINTCON0_INT_FIFO_SHIFT 0
  311. #define VIDINTCON0_INT_ENABLE (1 << 0)
  312. #define VIDINTCON1 0x134
  313. #define VIDINTCON1_INT_I80 (1 << 2)
  314. #define VIDINTCON1_INT_FRAME (1 << 1)
  315. #define VIDINTCON1_INT_FIFO (1 << 0)
  316. /* Window colour-key control registers */
  317. #define WKEYCON 0x140
  318. #define WKEYCON0 0x00
  319. #define WKEYCON1 0x04
  320. #define WxKEYCON0_KEYBL_EN (1 << 26)
  321. #define WxKEYCON0_KEYEN_F (1 << 25)
  322. #define WxKEYCON0_DIRCON (1 << 24)
  323. #define WxKEYCON0_COMPKEY_MASK (0xffffff << 0)
  324. #define WxKEYCON0_COMPKEY_SHIFT 0
  325. #define WxKEYCON0_COMPKEY_LIMIT 0xffffff
  326. #define WxKEYCON0_COMPKEY(_x) ((_x) << 0)
  327. #define WxKEYCON1_COLVAL_MASK (0xffffff << 0)
  328. #define WxKEYCON1_COLVAL_SHIFT 0
  329. #define WxKEYCON1_COLVAL_LIMIT 0xffffff
  330. #define WxKEYCON1_COLVAL(_x) ((_x) << 0)
  331. /* Dithering control */
  332. #define DITHMODE 0x170
  333. #define DITHMODE_R_POS_MASK (0x3 << 5)
  334. #define DITHMODE_R_POS_SHIFT 5
  335. #define DITHMODE_R_POS_8BIT (0x0 << 5)
  336. #define DITHMODE_R_POS_6BIT (0x1 << 5)
  337. #define DITHMODE_R_POS_5BIT (0x2 << 5)
  338. #define DITHMODE_G_POS_MASK (0x3 << 3)
  339. #define DITHMODE_G_POS_SHIFT 3
  340. #define DITHMODE_G_POS_8BIT (0x0 << 3)
  341. #define DITHMODE_G_POS_6BIT (0x1 << 3)
  342. #define DITHMODE_G_POS_5BIT (0x2 << 3)
  343. #define DITHMODE_B_POS_MASK (0x3 << 1)
  344. #define DITHMODE_B_POS_SHIFT 1
  345. #define DITHMODE_B_POS_8BIT (0x0 << 1)
  346. #define DITHMODE_B_POS_6BIT (0x1 << 1)
  347. #define DITHMODE_B_POS_5BIT (0x2 << 1)
  348. #define DITHMODE_DITH_EN (1 << 0)
  349. /* Window blanking (MAP) */
  350. #define WINxMAP(_win) (0x180 + ((_win) * 4))
  351. #define WINxMAP_MAP (1 << 24)
  352. #define WINxMAP_MAP_COLOUR_MASK (0xffffff << 0)
  353. #define WINxMAP_MAP_COLOUR_SHIFT 0
  354. #define WINxMAP_MAP_COLOUR_LIMIT 0xffffff
  355. #define WINxMAP_MAP_COLOUR(_x) ((_x) << 0)
  356. /* Winodw palette control */
  357. #define WPALCON 0x1A0
  358. #define WPALCON_PAL_UPDATE (1 << 9)
  359. #define WPALCON_W4PAL_16BPP_A555 (1 << 8)
  360. #define WPALCON_W3PAL_16BPP_A555 (1 << 7)
  361. #define WPALCON_W2PAL_16BPP_A555 (1 << 6)
  362. #define WPALCON_W1PAL_MASK (0x7 << 3)
  363. #define WPALCON_W1PAL_SHIFT 3
  364. #define WPALCON_W1PAL_25BPP_A888 (0x0 << 3)
  365. #define WPALCON_W1PAL_24BPP (0x1 << 3)
  366. #define WPALCON_W1PAL_19BPP_A666 (0x2 << 3)
  367. #define WPALCON_W1PAL_18BPP_A665 (0x3 << 3)
  368. #define WPALCON_W1PAL_18BPP (0x4 << 3)
  369. #define WPALCON_W1PAL_16BPP_A555 (0x5 << 3)
  370. #define WPALCON_W1PAL_16BPP_565 (0x6 << 3)
  371. #define WPALCON_W0PAL_MASK (0x7 << 0)
  372. #define WPALCON_W0PAL_SHIFT 0
  373. #define WPALCON_W0PAL_25BPP_A888 (0x0 << 0)
  374. #define WPALCON_W0PAL_24BPP (0x1 << 0)
  375. #define WPALCON_W0PAL_19BPP_A666 (0x2 << 0)
  376. #define WPALCON_W0PAL_18BPP_A665 (0x3 << 0)
  377. #define WPALCON_W0PAL_18BPP (0x4 << 0)
  378. #define WPALCON_W0PAL_16BPP_A555 (0x5 << 0)
  379. #define WPALCON_W0PAL_16BPP_565 (0x6 << 0)
  380. /* Blending equation control */
  381. #define BLENDEQx(_win) (0x244 + ((_win - 1) * 4))
  382. #define BLENDEQ_ZERO 0x0
  383. #define BLENDEQ_ONE 0x1
  384. #define BLENDEQ_ALPHA_A 0x2
  385. #define BLENDEQ_ONE_MINUS_ALPHA_A 0x3
  386. #define BLENDEQ_ALPHA0 0x6
  387. #define BLENDEQ_B_FUNC_F(_x) (_x << 6)
  388. #define BLENDEQ_A_FUNC_F(_x) (_x << 0)
  389. #define BLENDCON 0x260
  390. #define BLENDCON_NEW_MASK (1 << 0)
  391. #define BLENDCON_NEW_8BIT_ALPHA_VALUE (1 << 0)
  392. #define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0)
  393. /* Display port clock control */
  394. #define DP_MIE_CLKCON 0x27c
  395. #define DP_MIE_CLK_DISABLE 0x0
  396. #define DP_MIE_CLK_DP_ENABLE 0x2
  397. #define DP_MIE_CLK_MIE_ENABLE 0x3
  398. /* Notes on per-window bpp settings
  399. *
  400. * Value Win0 Win1 Win2 Win3 Win 4
  401. * 0000 1(P) 1(P) 1(P) 1(P) 1(P)
  402. * 0001 2(P) 2(P) 2(P) 2(P) 2(P)
  403. * 0010 4(P) 4(P) 4(P) 4(P) -none-
  404. * 0011 8(P) 8(P) -none- -none- -none-
  405. * 0100 -none- 8(A232) 8(A232) -none- -none-
  406. * 0101 16(565) 16(565) 16(565) 16(565) 16(565)
  407. * 0110 -none- 16(A555) 16(A555) 16(A555) 16(A555)
  408. * 0111 16(I555) 16(I565) 16(I555) 16(I555) 16(I555)
  409. * 1000 18(666) 18(666) 18(666) 18(666) 18(666)
  410. * 1001 -none- 18(A665) 18(A665) 18(A665) 16(A665)
  411. * 1010 -none- 19(A666) 19(A666) 19(A666) 19(A666)
  412. * 1011 24(888) 24(888) 24(888) 24(888) 24(888)
  413. * 1100 -none- 24(A887) 24(A887) 24(A887) 24(A887)
  414. * 1101 -none- 25(A888) 25(A888) 25(A888) 25(A888)
  415. * 1110 -none- -none- -none- -none- -none-
  416. * 1111 -none- -none- -none- -none- -none-
  417. */
  418. /* FIMD Version 8 register offset definitions */
  419. #define FIMD_V8_VIDTCON0 0x20010
  420. #define FIMD_V8_VIDTCON1 0x20014
  421. #define FIMD_V8_VIDTCON2 0x20018
  422. #define FIMD_V8_VIDTCON3 0x2001C
  423. #define FIMD_V8_VIDCON1 0x20004