via-core.h 6.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright 1998-2009 VIA Technologies, Inc. All Rights Reserved.
  4. * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
  5. * Copyright 2009-2010 Jonathan Corbet <corbet@lwn.net>
  6. * Copyright 2010 Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
  7. */
  8. #ifndef __VIA_CORE_H__
  9. #define __VIA_CORE_H__
  10. #include <linux/types.h>
  11. #include <linux/io.h>
  12. #include <linux/spinlock.h>
  13. #include <linux/pci.h>
  14. /*
  15. * A description of each known serial I2C/GPIO port.
  16. */
  17. enum via_port_type {
  18. VIA_PORT_NONE = 0,
  19. VIA_PORT_I2C,
  20. VIA_PORT_GPIO,
  21. };
  22. enum via_port_mode {
  23. VIA_MODE_OFF = 0,
  24. VIA_MODE_I2C, /* Used as I2C port */
  25. VIA_MODE_GPIO, /* Two GPIO ports */
  26. };
  27. enum viafb_i2c_adap {
  28. VIA_PORT_26 = 0,
  29. VIA_PORT_31,
  30. VIA_PORT_25,
  31. VIA_PORT_2C,
  32. VIA_PORT_3D,
  33. };
  34. #define VIAFB_NUM_PORTS 5
  35. struct via_port_cfg {
  36. enum via_port_type type;
  37. enum via_port_mode mode;
  38. u16 io_port;
  39. u8 ioport_index;
  40. };
  41. /*
  42. * Allow subdevs to register suspend/resume hooks.
  43. */
  44. struct viafb_pm_hooks {
  45. struct list_head list;
  46. int (*suspend)(void *private);
  47. int (*resume)(void *private);
  48. void *private;
  49. };
  50. void viafb_pm_register(struct viafb_pm_hooks *hooks);
  51. void viafb_pm_unregister(struct viafb_pm_hooks *hooks);
  52. /*
  53. * This is the global viafb "device" containing stuff needed by
  54. * all subdevs.
  55. */
  56. struct viafb_dev {
  57. struct pci_dev *pdev;
  58. int chip_type;
  59. struct via_port_cfg *port_cfg;
  60. /*
  61. * Spinlock for access to device registers. Not yet
  62. * globally used.
  63. */
  64. spinlock_t reg_lock;
  65. /*
  66. * The framebuffer MMIO region. Little, if anything, touches
  67. * this memory directly, and certainly nothing outside of the
  68. * framebuffer device itself. We *do* have to be able to allocate
  69. * chunks of this memory for other devices, though.
  70. */
  71. unsigned long fbmem_start;
  72. long fbmem_len;
  73. void __iomem *fbmem;
  74. #if defined(CONFIG_VIDEO_VIA_CAMERA) || defined(CONFIG_VIDEO_VIA_CAMERA_MODULE)
  75. long camera_fbmem_offset;
  76. long camera_fbmem_size;
  77. #endif
  78. /*
  79. * The MMIO region for device registers.
  80. */
  81. unsigned long engine_start;
  82. unsigned long engine_len;
  83. void __iomem *engine_mmio;
  84. };
  85. /*
  86. * Interrupt management.
  87. */
  88. void viafb_irq_enable(u32 mask);
  89. void viafb_irq_disable(u32 mask);
  90. /*
  91. * The global interrupt control register and its bits.
  92. */
  93. #define VDE_INTERRUPT 0x200 /* Video interrupt flags/masks */
  94. #define VDE_I_DVISENSE 0x00000001 /* DVI sense int status */
  95. #define VDE_I_VBLANK 0x00000002 /* Vertical blank status */
  96. #define VDE_I_MCCFI 0x00000004 /* MCE compl. frame int status */
  97. #define VDE_I_VSYNC 0x00000008 /* VGA VSYNC int status */
  98. #define VDE_I_DMA0DDONE 0x00000010 /* DMA 0 descr done */
  99. #define VDE_I_DMA0TDONE 0x00000020 /* DMA 0 transfer done */
  100. #define VDE_I_DMA1DDONE 0x00000040 /* DMA 1 descr done */
  101. #define VDE_I_DMA1TDONE 0x00000080 /* DMA 1 transfer done */
  102. #define VDE_I_C1AV 0x00000100 /* Cap Eng 1 act vid end */
  103. #define VDE_I_HQV0 0x00000200 /* First HQV engine */
  104. #define VDE_I_HQV1 0x00000400 /* Second HQV engine */
  105. #define VDE_I_HQV1EN 0x00000800 /* Second HQV engine enable */
  106. #define VDE_I_C0AV 0x00001000 /* Cap Eng 0 act vid end */
  107. #define VDE_I_C0VBI 0x00002000 /* Cap Eng 0 VBI end */
  108. #define VDE_I_C1VBI 0x00004000 /* Cap Eng 1 VBI end */
  109. #define VDE_I_VSYNC2 0x00008000 /* Sec. Disp. VSYNC */
  110. #define VDE_I_DVISNSEN 0x00010000 /* DVI sense enable */
  111. #define VDE_I_VSYNC2EN 0x00020000 /* Sec Disp VSYNC enable */
  112. #define VDE_I_MCCFIEN 0x00040000 /* MC comp frame int mask enable */
  113. #define VDE_I_VSYNCEN 0x00080000 /* VSYNC enable */
  114. #define VDE_I_DMA0DDEN 0x00100000 /* DMA 0 descr done enable */
  115. #define VDE_I_DMA0TDEN 0x00200000 /* DMA 0 trans done enable */
  116. #define VDE_I_DMA1DDEN 0x00400000 /* DMA 1 descr done enable */
  117. #define VDE_I_DMA1TDEN 0x00800000 /* DMA 1 trans done enable */
  118. #define VDE_I_C1AVEN 0x01000000 /* cap 1 act vid end enable */
  119. #define VDE_I_HQV0EN 0x02000000 /* First hqv engine enable */
  120. #define VDE_I_C1VBIEN 0x04000000 /* Cap 1 VBI end enable */
  121. #define VDE_I_LVDSSI 0x08000000 /* LVDS sense interrupt */
  122. #define VDE_I_C0AVEN 0x10000000 /* Cap 0 act vid end enable */
  123. #define VDE_I_C0VBIEN 0x20000000 /* Cap 0 VBI end enable */
  124. #define VDE_I_LVDSSIEN 0x40000000 /* LVDS Sense enable */
  125. #define VDE_I_ENABLE 0x80000000 /* Global interrupt enable */
  126. #if defined(CONFIG_VIDEO_VIA_CAMERA) || defined(CONFIG_VIDEO_VIA_CAMERA_MODULE)
  127. /*
  128. * DMA management.
  129. */
  130. int viafb_request_dma(void);
  131. void viafb_release_dma(void);
  132. /* void viafb_dma_copy_out(unsigned int offset, dma_addr_t paddr, int len); */
  133. int viafb_dma_copy_out_sg(unsigned int offset, struct scatterlist *sg, int nsg);
  134. /*
  135. * DMA Controller registers.
  136. */
  137. #define VDMA_MR0 0xe00 /* Mod reg 0 */
  138. #define VDMA_MR_CHAIN 0x01 /* Chaining mode */
  139. #define VDMA_MR_TDIE 0x02 /* Transfer done int enable */
  140. #define VDMA_CSR0 0xe04 /* Control/status */
  141. #define VDMA_C_ENABLE 0x01 /* DMA Enable */
  142. #define VDMA_C_START 0x02 /* Start a transfer */
  143. #define VDMA_C_ABORT 0x04 /* Abort a transfer */
  144. #define VDMA_C_DONE 0x08 /* Transfer is done */
  145. #define VDMA_MARL0 0xe20 /* Mem addr low */
  146. #define VDMA_MARH0 0xe24 /* Mem addr high */
  147. #define VDMA_DAR0 0xe28 /* Device address */
  148. #define VDMA_DQWCR0 0xe2c /* Count (16-byte) */
  149. #define VDMA_TMR0 0xe30 /* Tile mode reg */
  150. #define VDMA_DPRL0 0xe34 /* Not sure */
  151. #define VDMA_DPR_IN 0x08 /* Inbound transfer to FB */
  152. #define VDMA_DPRH0 0xe38
  153. #define VDMA_PMR0 (0xe00 + 0x134) /* Pitch mode */
  154. /*
  155. * Useful stuff that probably belongs somewhere global.
  156. */
  157. #define VGA_WIDTH 640
  158. #define VGA_HEIGHT 480
  159. #endif /* CONFIG_VIDEO_VIA_CAMERA */
  160. /*
  161. * Indexed port operations. Note that these are all multi-op
  162. * functions; every invocation will be racy if you're not holding
  163. * reg_lock.
  164. */
  165. #define VIAStatus 0x3DA /* Non-indexed port */
  166. #define VIACR 0x3D4
  167. #define VIASR 0x3C4
  168. #define VIAGR 0x3CE
  169. #define VIAAR 0x3C0
  170. static inline u8 via_read_reg(u16 port, u8 index)
  171. {
  172. outb(index, port);
  173. return inb(port + 1);
  174. }
  175. static inline void via_write_reg(u16 port, u8 index, u8 data)
  176. {
  177. outb(index, port);
  178. outb(data, port + 1);
  179. }
  180. static inline void via_write_reg_mask(u16 port, u8 index, u8 data, u8 mask)
  181. {
  182. u8 old;
  183. outb(index, port);
  184. old = inb(port + 1);
  185. outb((data & mask) | (old & ~mask), port + 1);
  186. }
  187. #define VIA_MISC_REG_READ 0x03CC
  188. #define VIA_MISC_REG_WRITE 0x03C2
  189. static inline void via_write_misc_reg_mask(u8 data, u8 mask)
  190. {
  191. u8 old = inb(VIA_MISC_REG_READ);
  192. outb((data & mask) | (old & ~mask), VIA_MISC_REG_WRITE);
  193. }
  194. #endif /* __VIA_CORE_H__ */