sdla.h 6.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * INET An implementation of the TCP/IP protocol suite for the LINUX
  4. * operating system. INET is implemented using the BSD Socket
  5. * interface as the means of communication with the user level.
  6. *
  7. * Global definitions for the Frame relay interface.
  8. *
  9. * Version: @(#)if_ifrad.h 0.20 13 Apr 96
  10. *
  11. * Author: Mike McLagan <mike.mclagan@linux.org>
  12. *
  13. * Changes:
  14. * 0.15 Mike McLagan Structure packing
  15. *
  16. * 0.20 Mike McLagan New flags for S508 buffer handling
  17. */
  18. #ifndef SDLA_H
  19. #define SDLA_H
  20. #include <uapi/linux/sdla.h>
  21. /* important Z80 window addresses */
  22. #define SDLA_CONTROL_WND 0xE000
  23. #define SDLA_502_CMD_BUF 0xEF60
  24. #define SDLA_502_RCV_BUF 0xA900
  25. #define SDLA_502_TXN_AVAIL 0xFFF1
  26. #define SDLA_502_RCV_AVAIL 0xFFF2
  27. #define SDLA_502_EVENT_FLAGS 0xFFF3
  28. #define SDLA_502_MDM_STATUS 0xFFF4
  29. #define SDLA_502_IRQ_INTERFACE 0xFFFD
  30. #define SDLA_502_IRQ_PERMISSION 0xFFFE
  31. #define SDLA_502_DATA_OFS 0x0010
  32. #define SDLA_508_CMD_BUF 0xE000
  33. #define SDLA_508_TXBUF_INFO 0xF100
  34. #define SDLA_508_RXBUF_INFO 0xF120
  35. #define SDLA_508_EVENT_FLAGS 0xF003
  36. #define SDLA_508_MDM_STATUS 0xF004
  37. #define SDLA_508_IRQ_INTERFACE 0xF010
  38. #define SDLA_508_IRQ_PERMISSION 0xF011
  39. #define SDLA_508_TSE_OFFSET 0xF012
  40. /* Event flags */
  41. #define SDLA_EVENT_STATUS 0x01
  42. #define SDLA_EVENT_DLCI_STATUS 0x02
  43. #define SDLA_EVENT_BAD_DLCI 0x04
  44. #define SDLA_EVENT_LINK_DOWN 0x40
  45. /* IRQ Trigger flags */
  46. #define SDLA_INTR_RX 0x01
  47. #define SDLA_INTR_TX 0x02
  48. #define SDLA_INTR_MODEM 0x04
  49. #define SDLA_INTR_COMPLETE 0x08
  50. #define SDLA_INTR_STATUS 0x10
  51. #define SDLA_INTR_TIMER 0x20
  52. /* DLCI status bits */
  53. #define SDLA_DLCI_DELETED 0x01
  54. #define SDLA_DLCI_ACTIVE 0x02
  55. #define SDLA_DLCI_WAITING 0x04
  56. #define SDLA_DLCI_NEW 0x08
  57. #define SDLA_DLCI_INCLUDED 0x40
  58. /* valid command codes */
  59. #define SDLA_INFORMATION_WRITE 0x01
  60. #define SDLA_INFORMATION_READ 0x02
  61. #define SDLA_ISSUE_IN_CHANNEL_SIGNAL 0x03
  62. #define SDLA_SET_DLCI_CONFIGURATION 0x10
  63. #define SDLA_READ_DLCI_CONFIGURATION 0x11
  64. #define SDLA_DISABLE_COMMUNICATIONS 0x12
  65. #define SDLA_ENABLE_COMMUNICATIONS 0x13
  66. #define SDLA_READ_DLC_STATUS 0x14
  67. #define SDLA_READ_DLC_STATISTICS 0x15
  68. #define SDLA_FLUSH_DLC_STATISTICS 0x16
  69. #define SDLA_LIST_ACTIVE_DLCI 0x17
  70. #define SDLA_FLUSH_INFORMATION_BUFFERS 0x18
  71. #define SDLA_ADD_DLCI 0x20
  72. #define SDLA_DELETE_DLCI 0x21
  73. #define SDLA_ACTIVATE_DLCI 0x22
  74. #define SDLA_DEACTIVATE_DLCI 0x23
  75. #define SDLA_READ_MODEM_STATUS 0x30
  76. #define SDLA_SET_MODEM_STATUS 0x31
  77. #define SDLA_READ_COMMS_ERR_STATS 0x32
  78. #define SDLA_FLUSH_COMMS_ERR_STATS 0x33
  79. #define SDLA_READ_CODE_VERSION 0x40
  80. #define SDLA_SET_IRQ_TRIGGER 0x50
  81. #define SDLA_GET_IRQ_TRIGGER 0x51
  82. /* In channel signal types */
  83. #define SDLA_ICS_LINK_VERIFY 0x02
  84. #define SDLA_ICS_STATUS_ENQ 0x03
  85. /* modem status flags */
  86. #define SDLA_MODEM_DTR_HIGH 0x01
  87. #define SDLA_MODEM_RTS_HIGH 0x02
  88. #define SDLA_MODEM_DCD_HIGH 0x08
  89. #define SDLA_MODEM_CTS_HIGH 0x20
  90. /* used for RET_MODEM interpretation */
  91. #define SDLA_MODEM_DCD_LOW 0x01
  92. #define SDLA_MODEM_CTS_LOW 0x02
  93. /* return codes */
  94. #define SDLA_RET_OK 0x00
  95. #define SDLA_RET_COMMUNICATIONS 0x01
  96. #define SDLA_RET_CHANNEL_INACTIVE 0x02
  97. #define SDLA_RET_DLCI_INACTIVE 0x03
  98. #define SDLA_RET_DLCI_CONFIG 0x04
  99. #define SDLA_RET_BUF_TOO_BIG 0x05
  100. #define SDLA_RET_NO_DATA 0x05
  101. #define SDLA_RET_BUF_OVERSIZE 0x06
  102. #define SDLA_RET_CIR_OVERFLOW 0x07
  103. #define SDLA_RET_NO_BUFS 0x08
  104. #define SDLA_RET_TIMEOUT 0x0A
  105. #define SDLA_RET_MODEM 0x10
  106. #define SDLA_RET_CHANNEL_OFF 0x11
  107. #define SDLA_RET_CHANNEL_ON 0x12
  108. #define SDLA_RET_DLCI_STATUS 0x13
  109. #define SDLA_RET_DLCI_UNKNOWN 0x14
  110. #define SDLA_RET_COMMAND_INVALID 0x1F
  111. /* Configuration flags */
  112. #define SDLA_DIRECT_RECV 0x0080
  113. #define SDLA_TX_NO_EXCEPT 0x0020
  114. #define SDLA_NO_ICF_MSGS 0x1000
  115. #define SDLA_TX50_RX50 0x0000
  116. #define SDLA_TX70_RX30 0x2000
  117. #define SDLA_TX30_RX70 0x4000
  118. /* IRQ selection flags */
  119. #define SDLA_IRQ_RECEIVE 0x01
  120. #define SDLA_IRQ_TRANSMIT 0x02
  121. #define SDLA_IRQ_MODEM_STAT 0x04
  122. #define SDLA_IRQ_COMMAND 0x08
  123. #define SDLA_IRQ_CHANNEL 0x10
  124. #define SDLA_IRQ_TIMER 0x20
  125. /* definitions for PC memory mapping */
  126. #define SDLA_8K_WINDOW 0x01
  127. #define SDLA_S502_SEG_A 0x10
  128. #define SDLA_S502_SEG_C 0x20
  129. #define SDLA_S502_SEG_D 0x00
  130. #define SDLA_S502_SEG_E 0x30
  131. #define SDLA_S507_SEG_A 0x00
  132. #define SDLA_S507_SEG_B 0x40
  133. #define SDLA_S507_SEG_C 0x80
  134. #define SDLA_S507_SEG_E 0xC0
  135. #define SDLA_S508_SEG_A 0x00
  136. #define SDLA_S508_SEG_C 0x10
  137. #define SDLA_S508_SEG_D 0x08
  138. #define SDLA_S508_SEG_E 0x18
  139. /* SDLA adapter port constants */
  140. #define SDLA_IO_EXTENTS 0x04
  141. #define SDLA_REG_CONTROL 0x00
  142. #define SDLA_REG_PC_WINDOW 0x01 /* offset for PC window select latch */
  143. #define SDLA_REG_Z80_WINDOW 0x02 /* offset for Z80 window select latch */
  144. #define SDLA_REG_Z80_CONTROL 0x03 /* offset for Z80 control latch */
  145. #define SDLA_S502_STS 0x00 /* status reg for 502, 502E, 507 */
  146. #define SDLA_S508_GNRL 0x00 /* general purp. reg for 508 */
  147. #define SDLA_S508_STS 0x01 /* status reg for 508 */
  148. #define SDLA_S508_IDR 0x02 /* ID reg for 508 */
  149. /* control register flags */
  150. #define SDLA_S502A_START 0x00 /* start the CPU */
  151. #define SDLA_S502A_INTREQ 0x02
  152. #define SDLA_S502A_INTEN 0x04
  153. #define SDLA_S502A_HALT 0x08 /* halt the CPU */
  154. #define SDLA_S502A_NMI 0x10 /* issue an NMI to the CPU */
  155. #define SDLA_S502E_CPUEN 0x01
  156. #define SDLA_S502E_ENABLE 0x02
  157. #define SDLA_S502E_INTACK 0x04
  158. #define SDLA_S507_ENABLE 0x01
  159. #define SDLA_S507_IRQ3 0x00
  160. #define SDLA_S507_IRQ4 0x20
  161. #define SDLA_S507_IRQ5 0x40
  162. #define SDLA_S507_IRQ7 0x60
  163. #define SDLA_S507_IRQ10 0x80
  164. #define SDLA_S507_IRQ11 0xA0
  165. #define SDLA_S507_IRQ12 0xC0
  166. #define SDLA_S507_IRQ15 0xE0
  167. #define SDLA_HALT 0x00
  168. #define SDLA_CPUEN 0x02
  169. #define SDLA_MEMEN 0x04
  170. #define SDLA_S507_EPROMWR 0x08
  171. #define SDLA_S507_EPROMCLK 0x10
  172. #define SDLA_S508_INTRQ 0x08
  173. #define SDLA_S508_INTEN 0x10
  174. struct sdla_cmd {
  175. char opp_flag;
  176. char cmd;
  177. short length;
  178. char retval;
  179. short dlci;
  180. char flags;
  181. short rxlost_int;
  182. long rxlost_app;
  183. char reserve[2];
  184. char data[SDLA_MAX_DATA]; /* transfer data buffer */
  185. } __attribute__((packed));
  186. struct intr_info {
  187. char flags;
  188. short txlen;
  189. char irq;
  190. char flags2;
  191. short timeout;
  192. } __attribute__((packed));
  193. /* found in the 508's control window at RXBUF_INFO */
  194. struct buf_info {
  195. unsigned short rse_num;
  196. unsigned long rse_base;
  197. unsigned long rse_next;
  198. unsigned long buf_base;
  199. unsigned short reserved;
  200. unsigned long buf_top;
  201. } __attribute__((packed));
  202. /* structure pointed to by rse_base in RXBUF_INFO struct */
  203. struct buf_entry {
  204. char opp_flag;
  205. short length;
  206. short dlci;
  207. char flags;
  208. short timestamp;
  209. short reserved[2];
  210. long buf_addr;
  211. } __attribute__((packed));
  212. #endif