bcm63xx_pmb.h 2.1 KB

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  1. /*
  2. * Broadcom BCM63xx Processor Monitor Bus shared routines (SMP and reset)
  3. *
  4. * Copyright (C) 2015, Broadcom Corporation
  5. * Author: Florian Fainelli <f.fainelli@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation version 2.
  10. *
  11. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  12. * kind, whether express or implied; without even the implied warranty
  13. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #ifndef __BCM63XX_PMB_H
  17. #define __BCM63XX_PMB_H
  18. #include <linux/io.h>
  19. #include <linux/types.h>
  20. #include <linux/delay.h>
  21. #include <linux/err.h>
  22. /* PMB Master controller register */
  23. #define PMB_CTRL 0x00
  24. #define PMC_PMBM_START (1 << 31)
  25. #define PMC_PMBM_TIMEOUT (1 << 30)
  26. #define PMC_PMBM_SLAVE_ERR (1 << 29)
  27. #define PMC_PMBM_BUSY (1 << 28)
  28. #define PMC_PMBM_READ (0 << 20)
  29. #define PMC_PMBM_WRITE (1 << 20)
  30. #define PMB_WR_DATA 0x04
  31. #define PMB_TIMEOUT 0x08
  32. #define PMB_RD_DATA 0x0C
  33. #define PMB_BUS_ID_SHIFT 8
  34. /* Perform the low-level PMB master operation, shared between reads and
  35. * writes.
  36. */
  37. static inline int __bpcm_do_op(void __iomem *master, unsigned int addr,
  38. u32 off, u32 op)
  39. {
  40. unsigned int timeout = 1000;
  41. u32 cmd;
  42. cmd = (PMC_PMBM_START | op | (addr & 0xff) << 12 | off);
  43. writel(cmd, master + PMB_CTRL);
  44. do {
  45. cmd = readl(master + PMB_CTRL);
  46. if (!(cmd & PMC_PMBM_START))
  47. return 0;
  48. if (cmd & PMC_PMBM_SLAVE_ERR)
  49. return -EIO;
  50. if (cmd & PMC_PMBM_TIMEOUT)
  51. return -ETIMEDOUT;
  52. udelay(1);
  53. } while (timeout-- > 0);
  54. return -ETIMEDOUT;
  55. }
  56. static inline int bpcm_rd(void __iomem *master, unsigned int addr,
  57. u32 off, u32 *val)
  58. {
  59. int ret = 0;
  60. ret = __bpcm_do_op(master, addr, off >> 2, PMC_PMBM_READ);
  61. *val = readl(master + PMB_RD_DATA);
  62. return ret;
  63. }
  64. static inline int bpcm_wr(void __iomem *master, unsigned int addr,
  65. u32 off, u32 val)
  66. {
  67. int ret = 0;
  68. writel(val, master + PMB_WR_DATA);
  69. ret = __bpcm_do_op(master, addr, off >> 2, PMC_PMBM_WRITE);
  70. return ret;
  71. }
  72. #endif /* __BCM63XX_PMB_H */