msi.h 15 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef LINUX_MSI_H
  3. #define LINUX_MSI_H
  4. #include <linux/kobject.h>
  5. #include <linux/list.h>
  6. struct msi_msg {
  7. u32 address_lo; /* low 32 bits of msi message address */
  8. u32 address_hi; /* high 32 bits of msi message address */
  9. u32 data; /* 16 bits of msi message data */
  10. };
  11. extern int pci_msi_ignore_mask;
  12. /* Helper functions */
  13. struct irq_data;
  14. struct msi_desc;
  15. struct pci_dev;
  16. struct platform_msi_priv_data;
  17. void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
  18. #ifdef CONFIG_GENERIC_MSI_IRQ
  19. void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
  20. #else
  21. static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
  22. {
  23. }
  24. #endif
  25. typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
  26. struct msi_msg *msg);
  27. /**
  28. * platform_msi_desc - Platform device specific msi descriptor data
  29. * @msi_priv_data: Pointer to platform private data
  30. * @msi_index: The index of the MSI descriptor for multi MSI
  31. */
  32. struct platform_msi_desc {
  33. struct platform_msi_priv_data *msi_priv_data;
  34. u16 msi_index;
  35. };
  36. /**
  37. * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data
  38. * @msi_index: The index of the MSI descriptor
  39. */
  40. struct fsl_mc_msi_desc {
  41. u16 msi_index;
  42. };
  43. /**
  44. * ti_sci_inta_msi_desc - TISCI based INTA specific msi descriptor data
  45. * @dev_index: TISCI device index
  46. */
  47. struct ti_sci_inta_msi_desc {
  48. u16 dev_index;
  49. };
  50. /**
  51. * struct msi_desc - Descriptor structure for MSI based interrupts
  52. * @list: List head for management
  53. * @irq: The base interrupt number
  54. * @nvec_used: The number of vectors used
  55. * @dev: Pointer to the device which uses this descriptor
  56. * @msg: The last set MSI message cached for reuse
  57. * @affinity: Optional pointer to a cpu affinity mask for this descriptor
  58. *
  59. * @write_msi_msg: Callback that may be called when the MSI message
  60. * address or data changes
  61. * @write_msi_msg_data: Data parameter for the callback.
  62. *
  63. * @masked: [PCI MSI/X] Mask bits
  64. * @is_msix: [PCI MSI/X] True if MSI-X
  65. * @multiple: [PCI MSI/X] log2 num of messages allocated
  66. * @multi_cap: [PCI MSI/X] log2 num of messages supported
  67. * @maskbit: [PCI MSI/X] Mask-Pending bit supported?
  68. * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
  69. * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
  70. * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
  71. * @mask_pos: [PCI MSI] Mask register position
  72. * @mask_base: [PCI MSI-X] Mask register base address
  73. * @platform: [platform] Platform device specific msi descriptor data
  74. * @fsl_mc: [fsl-mc] FSL MC device specific msi descriptor data
  75. * @inta: [INTA] TISCI based INTA specific msi descriptor data
  76. */
  77. struct msi_desc {
  78. /* Shared device/bus type independent data */
  79. struct list_head list;
  80. unsigned int irq;
  81. unsigned int nvec_used;
  82. struct device *dev;
  83. struct msi_msg msg;
  84. struct irq_affinity_desc *affinity;
  85. #ifdef CONFIG_IRQ_MSI_IOMMU
  86. const void *iommu_cookie;
  87. #endif
  88. void (*write_msi_msg)(struct msi_desc *entry, void *data);
  89. void *write_msi_msg_data;
  90. union {
  91. /* PCI MSI/X specific data */
  92. struct {
  93. u32 masked;
  94. struct {
  95. u8 is_msix : 1;
  96. u8 multiple : 3;
  97. u8 multi_cap : 3;
  98. u8 maskbit : 1;
  99. u8 is_64 : 1;
  100. u8 is_virtual : 1;
  101. u16 entry_nr;
  102. unsigned default_irq;
  103. } msi_attrib;
  104. union {
  105. u8 mask_pos;
  106. void __iomem *mask_base;
  107. };
  108. };
  109. /*
  110. * Non PCI variants add their data structure here. New
  111. * entries need to use a named structure. We want
  112. * proper name spaces for this. The PCI part is
  113. * anonymous for now as it would require an immediate
  114. * tree wide cleanup.
  115. */
  116. struct platform_msi_desc platform;
  117. struct fsl_mc_msi_desc fsl_mc;
  118. struct ti_sci_inta_msi_desc inta;
  119. };
  120. };
  121. /* Helpers to hide struct msi_desc implementation details */
  122. #define msi_desc_to_dev(desc) ((desc)->dev)
  123. #define dev_to_msi_list(dev) (&(dev)->msi_list)
  124. #define first_msi_entry(dev) \
  125. list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
  126. #define for_each_msi_entry(desc, dev) \
  127. list_for_each_entry((desc), dev_to_msi_list((dev)), list)
  128. #define for_each_msi_entry_safe(desc, tmp, dev) \
  129. list_for_each_entry_safe((desc), (tmp), dev_to_msi_list((dev)), list)
  130. #define for_each_msi_vector(desc, __irq, dev) \
  131. for_each_msi_entry((desc), (dev)) \
  132. if ((desc)->irq) \
  133. for (__irq = (desc)->irq; \
  134. __irq < ((desc)->irq + (desc)->nvec_used); \
  135. __irq++)
  136. #ifdef CONFIG_IRQ_MSI_IOMMU
  137. static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc)
  138. {
  139. return desc->iommu_cookie;
  140. }
  141. static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc,
  142. const void *iommu_cookie)
  143. {
  144. desc->iommu_cookie = iommu_cookie;
  145. }
  146. #else
  147. static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc)
  148. {
  149. return NULL;
  150. }
  151. static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc,
  152. const void *iommu_cookie)
  153. {
  154. }
  155. #endif
  156. #ifdef CONFIG_PCI_MSI
  157. #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
  158. #define for_each_pci_msi_entry(desc, pdev) \
  159. for_each_msi_entry((desc), &(pdev)->dev)
  160. struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
  161. void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
  162. void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
  163. #else /* CONFIG_PCI_MSI */
  164. static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
  165. {
  166. return NULL;
  167. }
  168. static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
  169. {
  170. }
  171. #endif /* CONFIG_PCI_MSI */
  172. struct msi_desc *alloc_msi_entry(struct device *dev, int nvec,
  173. const struct irq_affinity_desc *affinity);
  174. void free_msi_entry(struct msi_desc *entry);
  175. void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
  176. void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
  177. u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
  178. u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
  179. void pci_msi_mask_irq(struct irq_data *data);
  180. void pci_msi_unmask_irq(struct irq_data *data);
  181. /*
  182. * The arch hooks to setup up msi irqs. Default functions are implemented
  183. * as weak symbols so that they /can/ be overriden by architecture specific
  184. * code if needed. These hooks must be enabled by the architecture or by
  185. * drivers which depend on them via msi_controller based MSI handling.
  186. *
  187. * If CONFIG_PCI_MSI_ARCH_FALLBACKS is not selected they are replaced by
  188. * stubs with warnings.
  189. */
  190. #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS
  191. int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
  192. void arch_teardown_msi_irq(unsigned int irq);
  193. int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
  194. void arch_teardown_msi_irqs(struct pci_dev *dev);
  195. void default_teardown_msi_irqs(struct pci_dev *dev);
  196. #else
  197. static inline int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  198. {
  199. WARN_ON_ONCE(1);
  200. return -ENODEV;
  201. }
  202. static inline void arch_teardown_msi_irqs(struct pci_dev *dev)
  203. {
  204. WARN_ON_ONCE(1);
  205. }
  206. #endif
  207. /*
  208. * The restore hooks are still available as they are useful even
  209. * for fully irq domain based setups. Courtesy to XEN/X86.
  210. */
  211. void arch_restore_msi_irqs(struct pci_dev *dev);
  212. void default_restore_msi_irqs(struct pci_dev *dev);
  213. struct msi_controller {
  214. struct module *owner;
  215. struct device *dev;
  216. struct device_node *of_node;
  217. struct list_head list;
  218. int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
  219. struct msi_desc *desc);
  220. int (*setup_irqs)(struct msi_controller *chip, struct pci_dev *dev,
  221. int nvec, int type);
  222. void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
  223. };
  224. #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
  225. #include <linux/irqhandler.h>
  226. #include <asm/msi.h>
  227. struct irq_domain;
  228. struct irq_domain_ops;
  229. struct irq_chip;
  230. struct device_node;
  231. struct fwnode_handle;
  232. struct msi_domain_info;
  233. /**
  234. * struct msi_domain_ops - MSI interrupt domain callbacks
  235. * @get_hwirq: Retrieve the resulting hw irq number
  236. * @msi_init: Domain specific init function for MSI interrupts
  237. * @msi_free: Domain specific function to free a MSI interrupts
  238. * @msi_check: Callback for verification of the domain/info/dev data
  239. * @msi_prepare: Prepare the allocation of the interrupts in the domain
  240. * @msi_finish: Optional callback to finalize the allocation
  241. * @set_desc: Set the msi descriptor for an interrupt
  242. * @handle_error: Optional error handler if the allocation fails
  243. * @domain_alloc_irqs: Optional function to override the default allocation
  244. * function.
  245. * @domain_free_irqs: Optional function to override the default free
  246. * function.
  247. *
  248. * @get_hwirq, @msi_init and @msi_free are callbacks used by
  249. * msi_create_irq_domain() and related interfaces
  250. *
  251. * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
  252. * are callbacks used by msi_domain_alloc_irqs() and related
  253. * interfaces which are based on msi_desc.
  254. *
  255. * @domain_alloc_irqs, @domain_free_irqs can be used to override the
  256. * default allocation/free functions (__msi_domain_alloc/free_irqs). This
  257. * is initially for a wrapper around XENs seperate MSI universe which can't
  258. * be wrapped into the regular irq domains concepts by mere mortals. This
  259. * allows to universally use msi_domain_alloc/free_irqs without having to
  260. * special case XEN all over the place.
  261. *
  262. * Contrary to other operations @domain_alloc_irqs and @domain_free_irqs
  263. * are set to the default implementation if NULL and even when
  264. * MSI_FLAG_USE_DEF_DOM_OPS is not set to avoid breaking existing users and
  265. * because these callbacks are obviously mandatory.
  266. *
  267. * This is NOT meant to be abused, but it can be useful to build wrappers
  268. * for specialized MSI irq domains which need extra work before and after
  269. * calling __msi_domain_alloc_irqs()/__msi_domain_free_irqs().
  270. */
  271. struct msi_domain_ops {
  272. irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
  273. msi_alloc_info_t *arg);
  274. int (*msi_init)(struct irq_domain *domain,
  275. struct msi_domain_info *info,
  276. unsigned int virq, irq_hw_number_t hwirq,
  277. msi_alloc_info_t *arg);
  278. void (*msi_free)(struct irq_domain *domain,
  279. struct msi_domain_info *info,
  280. unsigned int virq);
  281. int (*msi_check)(struct irq_domain *domain,
  282. struct msi_domain_info *info,
  283. struct device *dev);
  284. int (*msi_prepare)(struct irq_domain *domain,
  285. struct device *dev, int nvec,
  286. msi_alloc_info_t *arg);
  287. void (*msi_finish)(msi_alloc_info_t *arg, int retval);
  288. void (*set_desc)(msi_alloc_info_t *arg,
  289. struct msi_desc *desc);
  290. int (*handle_error)(struct irq_domain *domain,
  291. struct msi_desc *desc, int error);
  292. int (*domain_alloc_irqs)(struct irq_domain *domain,
  293. struct device *dev, int nvec);
  294. void (*domain_free_irqs)(struct irq_domain *domain,
  295. struct device *dev);
  296. };
  297. /**
  298. * struct msi_domain_info - MSI interrupt domain data
  299. * @flags: Flags to decribe features and capabilities
  300. * @ops: The callback data structure
  301. * @chip: Optional: associated interrupt chip
  302. * @chip_data: Optional: associated interrupt chip data
  303. * @handler: Optional: associated interrupt flow handler
  304. * @handler_data: Optional: associated interrupt flow handler data
  305. * @handler_name: Optional: associated interrupt flow handler name
  306. * @data: Optional: domain specific data
  307. */
  308. struct msi_domain_info {
  309. u32 flags;
  310. struct msi_domain_ops *ops;
  311. struct irq_chip *chip;
  312. void *chip_data;
  313. irq_flow_handler_t handler;
  314. void *handler_data;
  315. const char *handler_name;
  316. void *data;
  317. };
  318. /* Flags for msi_domain_info */
  319. enum {
  320. /*
  321. * Init non implemented ops callbacks with default MSI domain
  322. * callbacks.
  323. */
  324. MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
  325. /*
  326. * Init non implemented chip callbacks with default MSI chip
  327. * callbacks.
  328. */
  329. MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
  330. /* Support multiple PCI MSI interrupts */
  331. MSI_FLAG_MULTI_PCI_MSI = (1 << 2),
  332. /* Support PCI MSIX interrupts */
  333. MSI_FLAG_PCI_MSIX = (1 << 3),
  334. /* Needs early activate, required for PCI */
  335. MSI_FLAG_ACTIVATE_EARLY = (1 << 4),
  336. /*
  337. * Must reactivate when irq is started even when
  338. * MSI_FLAG_ACTIVATE_EARLY has been set.
  339. */
  340. MSI_FLAG_MUST_REACTIVATE = (1 << 5),
  341. /* Is level-triggered capable, using two messages */
  342. MSI_FLAG_LEVEL_CAPABLE = (1 << 6),
  343. };
  344. int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
  345. bool force);
  346. struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
  347. struct msi_domain_info *info,
  348. struct irq_domain *parent);
  349. int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
  350. int nvec);
  351. int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
  352. int nvec);
  353. void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
  354. void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
  355. struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
  356. struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
  357. struct msi_domain_info *info,
  358. struct irq_domain *parent);
  359. int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
  360. irq_write_msi_msg_t write_msi_msg);
  361. void platform_msi_domain_free_irqs(struct device *dev);
  362. /* When an MSI domain is used as an intermediate domain */
  363. int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
  364. int nvec, msi_alloc_info_t *args);
  365. int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
  366. int virq, int nvec, msi_alloc_info_t *args);
  367. struct irq_domain *
  368. __platform_msi_create_device_domain(struct device *dev,
  369. unsigned int nvec,
  370. bool is_tree,
  371. irq_write_msi_msg_t write_msi_msg,
  372. const struct irq_domain_ops *ops,
  373. void *host_data);
  374. #define platform_msi_create_device_domain(dev, nvec, write, ops, data) \
  375. __platform_msi_create_device_domain(dev, nvec, false, write, ops, data)
  376. #define platform_msi_create_device_tree_domain(dev, nvec, write, ops, data) \
  377. __platform_msi_create_device_domain(dev, nvec, true, write, ops, data)
  378. int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
  379. unsigned int nr_irqs);
  380. void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
  381. unsigned int nvec);
  382. void *platform_msi_get_host_data(struct irq_domain *domain);
  383. #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
  384. #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
  385. void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
  386. struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
  387. struct msi_domain_info *info,
  388. struct irq_domain *parent);
  389. int pci_msi_domain_check_cap(struct irq_domain *domain,
  390. struct msi_domain_info *info, struct device *dev);
  391. u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
  392. struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
  393. bool pci_dev_has_special_msi_domain(struct pci_dev *pdev);
  394. #else
  395. static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
  396. {
  397. return NULL;
  398. }
  399. #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
  400. #endif /* LINUX_MSI_H */