host.h 21 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * linux/include/linux/mmc/host.h
  4. *
  5. * Host driver specific definitions.
  6. */
  7. #ifndef LINUX_MMC_HOST_H
  8. #define LINUX_MMC_HOST_H
  9. #include <linux/sched.h>
  10. #include <linux/device.h>
  11. #include <linux/fault-inject.h>
  12. #include <linux/mmc/core.h>
  13. #include <linux/mmc/card.h>
  14. #include <linux/mmc/pm.h>
  15. #include <linux/dma-direction.h>
  16. #include <linux/keyslot-manager.h>
  17. #include <linux/android_kabi.h>
  18. #include <linux/android_vendor.h>
  19. struct mmc_ios {
  20. unsigned int clock; /* clock rate */
  21. unsigned short vdd;
  22. unsigned int power_delay_ms; /* waiting for stable power */
  23. /* vdd stores the bit number of the selected voltage range from below. */
  24. unsigned char bus_mode; /* command output mode */
  25. #define MMC_BUSMODE_OPENDRAIN 1
  26. #define MMC_BUSMODE_PUSHPULL 2
  27. unsigned char chip_select; /* SPI chip select */
  28. #define MMC_CS_DONTCARE 0
  29. #define MMC_CS_HIGH 1
  30. #define MMC_CS_LOW 2
  31. unsigned char power_mode; /* power supply mode */
  32. #define MMC_POWER_OFF 0
  33. #define MMC_POWER_UP 1
  34. #define MMC_POWER_ON 2
  35. #define MMC_POWER_UNDEFINED 3
  36. unsigned char bus_width; /* data bus width */
  37. #define MMC_BUS_WIDTH_1 0
  38. #define MMC_BUS_WIDTH_4 2
  39. #define MMC_BUS_WIDTH_8 3
  40. unsigned char timing; /* timing specification used */
  41. #define MMC_TIMING_LEGACY 0
  42. #define MMC_TIMING_MMC_HS 1
  43. #define MMC_TIMING_SD_HS 2
  44. #define MMC_TIMING_UHS_SDR12 3
  45. #define MMC_TIMING_UHS_SDR25 4
  46. #define MMC_TIMING_UHS_SDR50 5
  47. #define MMC_TIMING_UHS_SDR104 6
  48. #define MMC_TIMING_UHS_DDR50 7
  49. #define MMC_TIMING_MMC_DDR52 8
  50. #define MMC_TIMING_MMC_HS200 9
  51. #define MMC_TIMING_MMC_HS400 10
  52. unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
  53. #define MMC_SIGNAL_VOLTAGE_330 0
  54. #define MMC_SIGNAL_VOLTAGE_180 1
  55. #define MMC_SIGNAL_VOLTAGE_120 2
  56. unsigned char drv_type; /* driver type (A, B, C, D) */
  57. #define MMC_SET_DRIVER_TYPE_B 0
  58. #define MMC_SET_DRIVER_TYPE_A 1
  59. #define MMC_SET_DRIVER_TYPE_C 2
  60. #define MMC_SET_DRIVER_TYPE_D 3
  61. bool enhanced_strobe; /* hs400es selection */
  62. };
  63. struct mmc_host;
  64. struct mmc_host_ops {
  65. /*
  66. * It is optional for the host to implement pre_req and post_req in
  67. * order to support double buffering of requests (prepare one
  68. * request while another request is active).
  69. * pre_req() must always be followed by a post_req().
  70. * To undo a call made to pre_req(), call post_req() with
  71. * a nonzero err condition.
  72. */
  73. void (*post_req)(struct mmc_host *host, struct mmc_request *req,
  74. int err);
  75. void (*pre_req)(struct mmc_host *host, struct mmc_request *req);
  76. void (*request)(struct mmc_host *host, struct mmc_request *req);
  77. /* Submit one request to host in atomic context. */
  78. int (*request_atomic)(struct mmc_host *host,
  79. struct mmc_request *req);
  80. /*
  81. * Avoid calling the next three functions too often or in a "fast
  82. * path", since underlaying controller might implement them in an
  83. * expensive and/or slow way. Also note that these functions might
  84. * sleep, so don't call them in the atomic contexts!
  85. */
  86. /*
  87. * Notes to the set_ios callback:
  88. * ios->clock might be 0. For some controllers, setting 0Hz
  89. * as any other frequency works. However, some controllers
  90. * explicitly need to disable the clock. Otherwise e.g. voltage
  91. * switching might fail because the SDCLK is not really quiet.
  92. */
  93. void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
  94. /*
  95. * Return values for the get_ro callback should be:
  96. * 0 for a read/write card
  97. * 1 for a read-only card
  98. * -ENOSYS when not supported (equal to NULL callback)
  99. * or a negative errno value when something bad happened
  100. */
  101. int (*get_ro)(struct mmc_host *host);
  102. /*
  103. * Return values for the get_cd callback should be:
  104. * 0 for a absent card
  105. * 1 for a present card
  106. * -ENOSYS when not supported (equal to NULL callback)
  107. * or a negative errno value when something bad happened
  108. */
  109. int (*get_cd)(struct mmc_host *host);
  110. void (*enable_sdio_irq)(struct mmc_host *host, int enable);
  111. /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */
  112. void (*ack_sdio_irq)(struct mmc_host *host);
  113. /* optional callback for HC quirks */
  114. void (*init_card)(struct mmc_host *host, struct mmc_card *card);
  115. int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
  116. /* Check if the card is pulling dat[0:3] low */
  117. int (*card_busy)(struct mmc_host *host);
  118. /* The tuning command opcode value is different for SD and eMMC cards */
  119. int (*execute_tuning)(struct mmc_host *host, u32 opcode);
  120. /* Prepare HS400 target operating frequency depending host driver */
  121. int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
  122. /* Prepare switch to DDR during the HS400 init sequence */
  123. int (*hs400_prepare_ddr)(struct mmc_host *host);
  124. /* Prepare for switching from HS400 to HS200 */
  125. void (*hs400_downgrade)(struct mmc_host *host);
  126. /* Complete selection of HS400 */
  127. void (*hs400_complete)(struct mmc_host *host);
  128. /* Prepare enhanced strobe depending host driver */
  129. void (*hs400_enhanced_strobe)(struct mmc_host *host,
  130. struct mmc_ios *ios);
  131. int (*select_drive_strength)(struct mmc_card *card,
  132. unsigned int max_dtr, int host_drv,
  133. int card_drv, int *drv_type);
  134. /* Reset the eMMC card via RST_n */
  135. void (*hw_reset)(struct mmc_host *host);
  136. void (*card_event)(struct mmc_host *host);
  137. /*
  138. * Optional callback to support controllers with HW issues for multiple
  139. * I/O. Returns the number of supported blocks for the request.
  140. */
  141. int (*multi_io_quirk)(struct mmc_card *card,
  142. unsigned int direction, int blk_size);
  143. ANDROID_KABI_RESERVE(1);
  144. ANDROID_KABI_RESERVE(2);
  145. };
  146. struct mmc_cqe_ops {
  147. /* Allocate resources, and make the CQE operational */
  148. int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
  149. /* Free resources, and make the CQE non-operational */
  150. void (*cqe_disable)(struct mmc_host *host);
  151. /*
  152. * Issue a read, write or DCMD request to the CQE. Also deal with the
  153. * effect of ->cqe_off().
  154. */
  155. int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
  156. /* Free resources (e.g. DMA mapping) associated with the request */
  157. void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
  158. /*
  159. * Prepare the CQE and host controller to accept non-CQ commands. There
  160. * is no corresponding ->cqe_on(), instead ->cqe_request() is required
  161. * to deal with that.
  162. */
  163. void (*cqe_off)(struct mmc_host *host);
  164. /*
  165. * Wait for all CQE tasks to complete. Return an error if recovery
  166. * becomes necessary.
  167. */
  168. int (*cqe_wait_for_idle)(struct mmc_host *host);
  169. /*
  170. * Notify CQE that a request has timed out. Return false if the request
  171. * completed or true if a timeout happened in which case indicate if
  172. * recovery is needed.
  173. */
  174. bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
  175. bool *recovery_needed);
  176. /*
  177. * Stop all CQE activity and prepare the CQE and host controller to
  178. * accept recovery commands.
  179. */
  180. void (*cqe_recovery_start)(struct mmc_host *host);
  181. /*
  182. * Clear the queue and call mmc_cqe_request_done() on all requests.
  183. * Requests that errored will have the error set on the mmc_request
  184. * (data->error or cmd->error for DCMD). Requests that did not error
  185. * will have zero data bytes transferred.
  186. */
  187. void (*cqe_recovery_finish)(struct mmc_host *host);
  188. ANDROID_KABI_RESERVE(1);
  189. ANDROID_KABI_RESERVE(2);
  190. };
  191. struct mmc_async_req {
  192. /* active mmc request */
  193. struct mmc_request *mrq;
  194. /*
  195. * Check error status of completed mmc request.
  196. * Returns 0 if success otherwise non zero.
  197. */
  198. enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
  199. };
  200. /**
  201. * struct mmc_slot - MMC slot functions
  202. *
  203. * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
  204. * @handler_priv: MMC/SD-card slot context
  205. *
  206. * Some MMC/SD host controllers implement slot-functions like card and
  207. * write-protect detection natively. However, a large number of controllers
  208. * leave these functions to the CPU. This struct provides a hook to attach
  209. * such slot-function drivers.
  210. */
  211. struct mmc_slot {
  212. int cd_irq;
  213. bool cd_wake_enabled;
  214. ANDROID_OEM_DATA_ARRAY(1, 2);
  215. void *handler_priv;
  216. };
  217. /**
  218. * mmc_context_info - synchronization details for mmc context
  219. * @is_done_rcv wake up reason was done request
  220. * @is_new_req wake up reason was new request
  221. * @is_waiting_last_req mmc context waiting for single running request
  222. * @wait wait queue
  223. */
  224. struct mmc_context_info {
  225. bool is_done_rcv;
  226. bool is_new_req;
  227. bool is_waiting_last_req;
  228. wait_queue_head_t wait;
  229. };
  230. struct regulator;
  231. struct mmc_pwrseq;
  232. struct mmc_supply {
  233. struct regulator *vmmc; /* Card power supply */
  234. struct regulator *vqmmc; /* Optional Vccq supply */
  235. };
  236. struct mmc_ctx {
  237. struct task_struct *task;
  238. };
  239. struct mmc_host {
  240. struct device *parent;
  241. struct device class_dev;
  242. int index;
  243. const struct mmc_host_ops *ops;
  244. struct mmc_pwrseq *pwrseq;
  245. unsigned int f_min;
  246. unsigned int f_max;
  247. unsigned int f_init;
  248. u32 ocr_avail;
  249. u32 ocr_avail_sdio; /* SDIO-specific OCR */
  250. u32 ocr_avail_sd; /* SD-specific OCR */
  251. u32 ocr_avail_mmc; /* MMC-specific OCR */
  252. struct wakeup_source *ws; /* Enable consume of uevents */
  253. u32 max_current_330;
  254. u32 max_current_300;
  255. u32 max_current_180;
  256. #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
  257. #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
  258. #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
  259. #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
  260. #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
  261. #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
  262. #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
  263. #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
  264. #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
  265. #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
  266. #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
  267. #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
  268. #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
  269. #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
  270. #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
  271. #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
  272. #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
  273. u32 caps; /* Host capabilities */
  274. #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
  275. #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
  276. #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
  277. #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
  278. #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
  279. #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
  280. #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
  281. #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
  282. #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
  283. #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
  284. #define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */
  285. #define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */
  286. #define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */
  287. #define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
  288. MMC_CAP_1_2V_DDR)
  289. #define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */
  290. #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */
  291. #define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */
  292. #define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */
  293. #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */
  294. #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */
  295. #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */
  296. #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
  297. MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
  298. MMC_CAP_UHS_DDR50)
  299. #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) /* Synced runtime PM suspends. */
  300. #define MMC_CAP_NEED_RSP_BUSY (1 << 22) /* Commands with R1B can't use R1. */
  301. #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
  302. #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
  303. #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
  304. #define MMC_CAP_DONE_COMPLETE (1 << 27) /* RW reqs can be completed within mmc_request_done() */
  305. #define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */
  306. #define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */
  307. #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
  308. #define MMC_CAP_HW_RESET (1 << 31) /* Reset the eMMC card via RST_n */
  309. u32 caps2; /* More host capabilities */
  310. #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
  311. #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
  312. #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */
  313. #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
  314. #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
  315. #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
  316. MMC_CAP2_HS200_1_2V_SDR)
  317. #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
  318. #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
  319. #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
  320. #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
  321. #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
  322. #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
  323. MMC_CAP2_HS400_1_2V)
  324. #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
  325. #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
  326. #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
  327. #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
  328. #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */
  329. #define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */
  330. #define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */
  331. #define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */
  332. #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */
  333. #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */
  334. #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */
  335. #define MMC_CAP2_MERGE_CAPABLE (1 << 26) /* Host can merge a segment over the segment size */
  336. #ifdef CONFIG_MMC_CRYPTO
  337. #define MMC_CAP2_CRYPTO (1 << 27) /* Host supports inline encryption */
  338. #else
  339. #define MMC_CAP2_CRYPTO 0
  340. #endif
  341. int fixed_drv_type; /* fixed driver type for non-removable media */
  342. mmc_pm_flag_t pm_caps; /* supported pm features */
  343. /* host specific block data */
  344. unsigned int max_seg_size; /* see blk_queue_max_segment_size */
  345. unsigned short max_segs; /* see blk_queue_max_segments */
  346. unsigned short unused;
  347. unsigned int max_req_size; /* maximum number of bytes in one req */
  348. unsigned int max_blk_size; /* maximum size of one mmc block */
  349. unsigned int max_blk_count; /* maximum number of blocks in one req */
  350. unsigned int max_busy_timeout; /* max busy timeout in ms */
  351. /* private data */
  352. spinlock_t lock; /* lock for claim and bus ops */
  353. struct mmc_ios ios; /* current io bus settings */
  354. /* group bitfields together to minimize padding */
  355. unsigned int use_spi_crc:1;
  356. unsigned int claimed:1; /* host exclusively claimed */
  357. unsigned int bus_dead:1; /* bus has been released */
  358. unsigned int doing_init_tune:1; /* initial tuning in progress */
  359. unsigned int can_retune:1; /* re-tuning can be used */
  360. unsigned int doing_retune:1; /* re-tuning in progress */
  361. unsigned int retune_now:1; /* do re-tuning at next req */
  362. unsigned int retune_paused:1; /* re-tuning is temporarily disabled */
  363. unsigned int use_blk_mq:1; /* use blk-mq */
  364. unsigned int retune_crc_disable:1; /* don't trigger retune upon crc */
  365. unsigned int can_dma_map_merge:1; /* merging can be used */
  366. int rescan_disable; /* disable card detection */
  367. int rescan_entered; /* used with nonremovable devices */
  368. int need_retune; /* re-tuning is needed */
  369. int hold_retune; /* hold off re-tuning */
  370. unsigned int retune_period; /* re-tuning period in secs */
  371. struct timer_list retune_timer; /* for periodic re-tuning */
  372. bool trigger_card_event; /* card_event necessary */
  373. struct mmc_card *card; /* device attached to this host */
  374. wait_queue_head_t wq;
  375. struct mmc_ctx *claimer; /* context that has host claimed */
  376. int claim_cnt; /* "claim" nesting count */
  377. struct mmc_ctx default_ctx; /* default context */
  378. struct delayed_work detect;
  379. int detect_change; /* card detect flag */
  380. struct mmc_slot slot;
  381. const struct mmc_bus_ops *bus_ops; /* current bus driver */
  382. unsigned int bus_refs; /* reference counter */
  383. unsigned int sdio_irqs;
  384. struct task_struct *sdio_irq_thread;
  385. struct delayed_work sdio_irq_work;
  386. bool sdio_irq_pending;
  387. atomic_t sdio_irq_thread_abort;
  388. mmc_pm_flag_t pm_flags; /* requested pm features */
  389. struct led_trigger *led; /* activity led */
  390. #ifdef CONFIG_REGULATOR
  391. bool regulator_enabled; /* regulator state */
  392. #endif
  393. struct mmc_supply supply;
  394. struct dentry *debugfs_root;
  395. /* Ongoing data transfer that allows commands during transfer */
  396. struct mmc_request *ongoing_mrq;
  397. #ifdef CONFIG_FAIL_MMC_REQUEST
  398. struct fault_attr fail_mmc_request;
  399. #endif
  400. unsigned int actual_clock; /* Actual HC clock rate */
  401. unsigned int slotno; /* used for sdio acpi binding */
  402. int dsr_req; /* DSR value is valid */
  403. u32 dsr; /* optional driver stage (DSR) value */
  404. /* Command Queue Engine (CQE) support */
  405. const struct mmc_cqe_ops *cqe_ops;
  406. void *cqe_private;
  407. int cqe_qdepth;
  408. bool cqe_enabled;
  409. bool cqe_on;
  410. /* Inline encryption support */
  411. #ifdef CONFIG_MMC_CRYPTO
  412. struct blk_keyslot_manager ksm;
  413. #endif
  414. /* Host Software Queue support */
  415. bool hsq_enabled;
  416. ANDROID_KABI_RESERVE(1);
  417. ANDROID_KABI_RESERVE(2);
  418. ANDROID_VENDOR_DATA(1);
  419. ANDROID_OEM_DATA(1);
  420. unsigned long private[] ____cacheline_aligned;
  421. };
  422. struct device_node;
  423. struct mmc_host *mmc_alloc_host(int extra, struct device *);
  424. int mmc_add_host(struct mmc_host *);
  425. void mmc_remove_host(struct mmc_host *);
  426. void mmc_free_host(struct mmc_host *);
  427. int mmc_of_parse(struct mmc_host *host);
  428. int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
  429. static inline void *mmc_priv(struct mmc_host *host)
  430. {
  431. return (void *)host->private;
  432. }
  433. static inline struct mmc_host *mmc_from_priv(void *priv)
  434. {
  435. return container_of(priv, struct mmc_host, private);
  436. }
  437. #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
  438. #define mmc_dev(x) ((x)->parent)
  439. #define mmc_classdev(x) (&(x)->class_dev)
  440. #define mmc_hostname(x) (dev_name(&(x)->class_dev))
  441. void mmc_detect_change(struct mmc_host *, unsigned long delay);
  442. void mmc_request_done(struct mmc_host *, struct mmc_request *);
  443. void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
  444. void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
  445. /*
  446. * May be called from host driver's system/runtime suspend/resume callbacks,
  447. * to know if SDIO IRQs has been claimed.
  448. */
  449. static inline bool sdio_irq_claimed(struct mmc_host *host)
  450. {
  451. return host->sdio_irqs > 0;
  452. }
  453. static inline void mmc_signal_sdio_irq(struct mmc_host *host)
  454. {
  455. host->ops->enable_sdio_irq(host, 0);
  456. host->sdio_irq_pending = true;
  457. if (host->sdio_irq_thread)
  458. wake_up_process(host->sdio_irq_thread);
  459. }
  460. void sdio_signal_irq(struct mmc_host *host);
  461. #ifdef CONFIG_REGULATOR
  462. int mmc_regulator_set_ocr(struct mmc_host *mmc,
  463. struct regulator *supply,
  464. unsigned short vdd_bit);
  465. int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
  466. #else
  467. static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
  468. struct regulator *supply,
  469. unsigned short vdd_bit)
  470. {
  471. return 0;
  472. }
  473. static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
  474. struct mmc_ios *ios)
  475. {
  476. return -EINVAL;
  477. }
  478. #endif
  479. int mmc_regulator_get_supply(struct mmc_host *mmc);
  480. static inline int mmc_card_is_removable(struct mmc_host *host)
  481. {
  482. return !(host->caps & MMC_CAP_NONREMOVABLE);
  483. }
  484. static inline int mmc_card_keep_power(struct mmc_host *host)
  485. {
  486. return host->pm_flags & MMC_PM_KEEP_POWER;
  487. }
  488. static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
  489. {
  490. return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
  491. }
  492. /* TODO: Move to private header */
  493. static inline int mmc_card_hs(struct mmc_card *card)
  494. {
  495. return card->host->ios.timing == MMC_TIMING_SD_HS ||
  496. card->host->ios.timing == MMC_TIMING_MMC_HS;
  497. }
  498. /* TODO: Move to private header */
  499. static inline int mmc_card_uhs(struct mmc_card *card)
  500. {
  501. return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
  502. card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
  503. }
  504. void mmc_retune_timer_stop(struct mmc_host *host);
  505. static inline void mmc_retune_needed(struct mmc_host *host)
  506. {
  507. if (host->can_retune)
  508. host->need_retune = 1;
  509. }
  510. static inline bool mmc_can_retune(struct mmc_host *host)
  511. {
  512. return host->can_retune == 1;
  513. }
  514. static inline bool mmc_doing_retune(struct mmc_host *host)
  515. {
  516. return host->doing_retune == 1;
  517. }
  518. static inline bool mmc_doing_tune(struct mmc_host *host)
  519. {
  520. return host->doing_retune == 1 || host->doing_init_tune == 1;
  521. }
  522. static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
  523. {
  524. return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
  525. }
  526. int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
  527. int mmc_abort_tuning(struct mmc_host *host, u32 opcode);
  528. #endif /* LINUX_MMC_HOST_H */