microchipphy.h 2.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright (C) 2015 Microchip Technology
  4. */
  5. #ifndef _MICROCHIPPHY_H
  6. #define _MICROCHIPPHY_H
  7. #define LAN88XX_INT_MASK (0x19)
  8. #define LAN88XX_INT_MASK_MDINTPIN_EN_ (0x8000)
  9. #define LAN88XX_INT_MASK_SPEED_CHANGE_ (0x4000)
  10. #define LAN88XX_INT_MASK_LINK_CHANGE_ (0x2000)
  11. #define LAN88XX_INT_MASK_FDX_CHANGE_ (0x1000)
  12. #define LAN88XX_INT_MASK_AUTONEG_ERR_ (0x0800)
  13. #define LAN88XX_INT_MASK_AUTONEG_DONE_ (0x0400)
  14. #define LAN88XX_INT_MASK_POE_DETECT_ (0x0200)
  15. #define LAN88XX_INT_MASK_SYMBOL_ERR_ (0x0100)
  16. #define LAN88XX_INT_MASK_FAST_LINK_FAIL_ (0x0080)
  17. #define LAN88XX_INT_MASK_WOL_EVENT_ (0x0040)
  18. #define LAN88XX_INT_MASK_EXTENDED_INT_ (0x0020)
  19. #define LAN88XX_INT_MASK_RESERVED_ (0x0010)
  20. #define LAN88XX_INT_MASK_FALSE_CARRIER_ (0x0008)
  21. #define LAN88XX_INT_MASK_LINK_SPEED_DS_ (0x0004)
  22. #define LAN88XX_INT_MASK_MASTER_SLAVE_DONE_ (0x0002)
  23. #define LAN88XX_INT_MASK_RX__ER_ (0x0001)
  24. #define LAN88XX_INT_STS (0x1A)
  25. #define LAN88XX_INT_STS_INT_ACTIVE_ (0x8000)
  26. #define LAN88XX_INT_STS_SPEED_CHANGE_ (0x4000)
  27. #define LAN88XX_INT_STS_LINK_CHANGE_ (0x2000)
  28. #define LAN88XX_INT_STS_FDX_CHANGE_ (0x1000)
  29. #define LAN88XX_INT_STS_AUTONEG_ERR_ (0x0800)
  30. #define LAN88XX_INT_STS_AUTONEG_DONE_ (0x0400)
  31. #define LAN88XX_INT_STS_POE_DETECT_ (0x0200)
  32. #define LAN88XX_INT_STS_SYMBOL_ERR_ (0x0100)
  33. #define LAN88XX_INT_STS_FAST_LINK_FAIL_ (0x0080)
  34. #define LAN88XX_INT_STS_WOL_EVENT_ (0x0040)
  35. #define LAN88XX_INT_STS_EXTENDED_INT_ (0x0020)
  36. #define LAN88XX_INT_STS_RESERVED_ (0x0010)
  37. #define LAN88XX_INT_STS_FALSE_CARRIER_ (0x0008)
  38. #define LAN88XX_INT_STS_LINK_SPEED_DS_ (0x0004)
  39. #define LAN88XX_INT_STS_MASTER_SLAVE_DONE_ (0x0002)
  40. #define LAN88XX_INT_STS_RX_ER_ (0x0001)
  41. #define LAN88XX_EXT_PAGE_ACCESS (0x1F)
  42. #define LAN88XX_EXT_PAGE_SPACE_0 (0x0000)
  43. #define LAN88XX_EXT_PAGE_SPACE_1 (0x0001)
  44. #define LAN88XX_EXT_PAGE_SPACE_2 (0x0002)
  45. /* Extended Register Page 1 space */
  46. #define LAN88XX_EXT_MODE_CTRL (0x13)
  47. #define LAN88XX_EXT_MODE_CTRL_MDIX_MASK_ (0x000C)
  48. #define LAN88XX_EXT_MODE_CTRL_AUTO_MDIX_ (0x0000)
  49. #define LAN88XX_EXT_MODE_CTRL_MDI_ (0x0008)
  50. #define LAN88XX_EXT_MODE_CTRL_MDI_X_ (0x000C)
  51. /* MMD 3 Registers */
  52. #define LAN88XX_MMD3_CHIP_ID (32877)
  53. #define LAN88XX_MMD3_CHIP_REV (32878)
  54. /* Registers specific to the LAN7800/LAN7850 embedded phy */
  55. #define LAN78XX_PHY_LED_MODE_SELECT (0x1D)
  56. /* DSP registers */
  57. #define PHY_ARDENNES_MMD_DEV_3_PHY_CFG (0x806A)
  58. #define PHY_ARDENNES_MMD_DEV_3_PHY_CFG_ZD_DLY_EN_ (0x2000)
  59. #define LAN88XX_EXT_PAGE_ACCESS_TR (0x52B5)
  60. #define LAN88XX_EXT_PAGE_TR_CR 16
  61. #define LAN88XX_EXT_PAGE_TR_LOW_DATA 17
  62. #define LAN88XX_EXT_PAGE_TR_HIGH_DATA 18
  63. #endif /* _MICROCHIPPHY_H */