mbus.h 3.1 KB

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  1. /*
  2. * Marvell MBUS common definitions.
  3. *
  4. * Copyright (C) 2008 Marvell Semiconductor
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #ifndef __LINUX_MBUS_H
  11. #define __LINUX_MBUS_H
  12. #include <linux/errno.h>
  13. struct resource;
  14. struct mbus_dram_target_info
  15. {
  16. /*
  17. * The 4-bit MBUS target ID of the DRAM controller.
  18. */
  19. u8 mbus_dram_target_id;
  20. /*
  21. * The base address, size, and MBUS attribute ID for each
  22. * of the possible DRAM chip selects. Peripherals are
  23. * required to support at least 4 decode windows.
  24. */
  25. int num_cs;
  26. struct mbus_dram_window {
  27. u8 cs_index;
  28. u8 mbus_attr;
  29. u64 base;
  30. u64 size;
  31. } cs[4];
  32. };
  33. /* Flags for PCI/PCIe address decoding regions */
  34. #define MVEBU_MBUS_PCI_IO 0x1
  35. #define MVEBU_MBUS_PCI_MEM 0x2
  36. #define MVEBU_MBUS_PCI_WA 0x3
  37. /*
  38. * Magic value that explicits that we don't need a remapping-capable
  39. * address decoding window.
  40. */
  41. #define MVEBU_MBUS_NO_REMAP (0xffffffff)
  42. /* Maximum size of a mbus window name */
  43. #define MVEBU_MBUS_MAX_WINNAME_SZ 32
  44. /*
  45. * The Marvell mbus is to be found only on SOCs from the Orion family
  46. * at the moment. Provide a dummy stub for other architectures.
  47. */
  48. #ifdef CONFIG_PLAT_ORION
  49. extern const struct mbus_dram_target_info *mv_mbus_dram_info(void);
  50. extern const struct mbus_dram_target_info *mv_mbus_dram_info_nooverlap(void);
  51. int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target,
  52. u8 *attr);
  53. #else
  54. static inline const struct mbus_dram_target_info *mv_mbus_dram_info(void)
  55. {
  56. return NULL;
  57. }
  58. static inline const struct mbus_dram_target_info *mv_mbus_dram_info_nooverlap(void)
  59. {
  60. return NULL;
  61. }
  62. static inline int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size,
  63. u8 *target, u8 *attr)
  64. {
  65. /*
  66. * On all ARM32 MVEBU platforms with MBus support, this stub
  67. * function will not get called. The real function from the
  68. * MBus driver is called instead. ARM64 MVEBU platforms like
  69. * the Armada 3700 could use the mv_xor device driver which calls
  70. * into this function
  71. */
  72. return -EINVAL;
  73. }
  74. #endif
  75. #ifdef CONFIG_MVEBU_MBUS
  76. int mvebu_mbus_save_cpu_target(u32 __iomem *store_addr);
  77. void mvebu_mbus_get_pcie_mem_aperture(struct resource *res);
  78. void mvebu_mbus_get_pcie_io_aperture(struct resource *res);
  79. int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr);
  80. int mvebu_mbus_add_window_remap_by_id(unsigned int target,
  81. unsigned int attribute,
  82. phys_addr_t base, size_t size,
  83. phys_addr_t remap);
  84. int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute,
  85. phys_addr_t base, size_t size);
  86. int mvebu_mbus_del_window(phys_addr_t base, size_t size);
  87. int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
  88. size_t mbus_size, phys_addr_t sdram_phys_base,
  89. size_t sdram_size);
  90. int mvebu_mbus_dt_init(bool is_coherent);
  91. #else
  92. static inline int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target,
  93. u8 *attr)
  94. {
  95. return -EINVAL;
  96. }
  97. #endif /* CONFIG_MVEBU_MBUS */
  98. #endif /* __LINUX_MBUS_H */