stratix10-smc.h 11 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2017-2018, Intel Corporation
  4. */
  5. #ifndef __STRATIX10_SMC_H
  6. #define __STRATIX10_SMC_H
  7. #include <linux/arm-smccc.h>
  8. #include <linux/bitops.h>
  9. /**
  10. * This file defines the Secure Monitor Call (SMC) message protocol used for
  11. * service layer driver in normal world (EL1) to communicate with secure
  12. * monitor software in Secure Monitor Exception Level 3 (EL3).
  13. *
  14. * This file is shared with secure firmware (FW) which is out of kernel tree.
  15. *
  16. * An ARM SMC instruction takes a function identifier and up to 6 64-bit
  17. * register values as arguments, and can return up to 4 64-bit register
  18. * value. The operation of the secure monitor is determined by the parameter
  19. * values passed in through registers.
  20. *
  21. * EL1 and EL3 communicates pointer as physical address rather than the
  22. * virtual address.
  23. *
  24. * Functions specified by ARM SMC Calling convention:
  25. *
  26. * FAST call executes atomic operations, returns when the requested operation
  27. * has completed.
  28. * STD call starts a operation which can be preempted by a non-secure
  29. * interrupt. The call can return before the requested operation has
  30. * completed.
  31. *
  32. * a0..a7 is used as register names in the descriptions below, on arm32
  33. * that translates to r0..r7 and on arm64 to w0..w7.
  34. */
  35. /**
  36. * @func_num: function ID
  37. */
  38. #define INTEL_SIP_SMC_STD_CALL_VAL(func_num) \
  39. ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, ARM_SMCCC_SMC_64, \
  40. ARM_SMCCC_OWNER_SIP, (func_num))
  41. #define INTEL_SIP_SMC_FAST_CALL_VAL(func_num) \
  42. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_64, \
  43. ARM_SMCCC_OWNER_SIP, (func_num))
  44. /**
  45. * Return values in INTEL_SIP_SMC_* call
  46. *
  47. * INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION:
  48. * Secure monitor software doesn't recognize the request.
  49. *
  50. * INTEL_SIP_SMC_STATUS_OK:
  51. * Secure monitor software accepts the service client's request.
  52. *
  53. * INTEL_SIP_SMC_STATUS_BUSY:
  54. * Secure monitor software is still processing service client's request.
  55. *
  56. * INTEL_SIP_SMC_STATUS_REJECTED:
  57. * Secure monitor software reject the service client's request.
  58. *
  59. * INTEL_SIP_SMC_STATUS_ERROR:
  60. * There is error during the process of service request.
  61. *
  62. * INTEL_SIP_SMC_RSU_ERROR:
  63. * There is error during the process of remote status update request.
  64. */
  65. #define INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION 0xFFFFFFFF
  66. #define INTEL_SIP_SMC_STATUS_OK 0x0
  67. #define INTEL_SIP_SMC_STATUS_BUSY 0x1
  68. #define INTEL_SIP_SMC_STATUS_REJECTED 0x2
  69. #define INTEL_SIP_SMC_STATUS_ERROR 0x4
  70. #define INTEL_SIP_SMC_RSU_ERROR 0x7
  71. /**
  72. * Request INTEL_SIP_SMC_FPGA_CONFIG_START
  73. *
  74. * Sync call used by service driver at EL1 to request the FPGA in EL3 to
  75. * be prepare to receive a new configuration.
  76. *
  77. * Call register usage:
  78. * a0: INTEL_SIP_SMC_FPGA_CONFIG_START.
  79. * a1: flag for full or partial configuration. 0 for full and 1 for partial
  80. * configuration.
  81. * a2-7: not used.
  82. *
  83. * Return status:
  84. * a0: INTEL_SIP_SMC_STATUS_OK, or INTEL_SIP_SMC_STATUS_ERROR.
  85. * a1-3: not used.
  86. */
  87. #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START 1
  88. #define INTEL_SIP_SMC_FPGA_CONFIG_START \
  89. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START)
  90. /**
  91. * Request INTEL_SIP_SMC_FPGA_CONFIG_WRITE
  92. *
  93. * Async call used by service driver at EL1 to provide FPGA configuration data
  94. * to secure world.
  95. *
  96. * Call register usage:
  97. * a0: INTEL_SIP_SMC_FPGA_CONFIG_WRITE.
  98. * a1: 64bit physical address of the configuration data memory block
  99. * a2: Size of configuration data block.
  100. * a3-7: not used.
  101. *
  102. * Return status:
  103. * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or
  104. * INTEL_SIP_SMC_STATUS_ERROR.
  105. * a1: 64bit physical address of 1st completed memory block if any completed
  106. * block, otherwise zero value.
  107. * a2: 64bit physical address of 2nd completed memory block if any completed
  108. * block, otherwise zero value.
  109. * a3: 64bit physical address of 3rd completed memory block if any completed
  110. * block, otherwise zero value.
  111. */
  112. #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE 2
  113. #define INTEL_SIP_SMC_FPGA_CONFIG_WRITE \
  114. INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE)
  115. /**
  116. * Request INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE
  117. *
  118. * Sync call used by service driver at EL1 to track the completed write
  119. * transactions. This request is called after INTEL_SIP_SMC_FPGA_CONFIG_WRITE
  120. * call returns INTEL_SIP_SMC_STATUS_BUSY.
  121. *
  122. * Call register usage:
  123. * a0: INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE.
  124. * a1-7: not used.
  125. *
  126. * Return status:
  127. * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FPGA_BUSY or
  128. * INTEL_SIP_SMC_STATUS_ERROR.
  129. * a1: 64bit physical address of 1st completed memory block.
  130. * a2: 64bit physical address of 2nd completed memory block if
  131. * any completed block, otherwise zero value.
  132. * a3: 64bit physical address of 3rd completed memory block if
  133. * any completed block, otherwise zero value.
  134. */
  135. #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE 3
  136. #define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE \
  137. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
  138. /**
  139. * Request INTEL_SIP_SMC_FPGA_CONFIG_ISDONE
  140. *
  141. * Sync call used by service driver at EL1 to inform secure world that all
  142. * data are sent, to check whether or not the secure world had completed
  143. * the FPGA configuration process.
  144. *
  145. * Call register usage:
  146. * a0: INTEL_SIP_SMC_FPGA_CONFIG_ISDONE.
  147. * a1-7: not used.
  148. *
  149. * Return status:
  150. * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or
  151. * INTEL_SIP_SMC_STATUS_ERROR.
  152. * a1-3: not used.
  153. */
  154. #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE 4
  155. #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE \
  156. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE)
  157. /**
  158. * Request INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM
  159. *
  160. * Sync call used by service driver at EL1 to query the physical address of
  161. * memory block reserved by secure monitor software.
  162. *
  163. * Call register usage:
  164. * a0:INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM.
  165. * a1-7: not used.
  166. *
  167. * Return status:
  168. * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
  169. * a1: start of physical address of reserved memory block.
  170. * a2: size of reserved memory block.
  171. * a3: not used.
  172. */
  173. #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM 5
  174. #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM \
  175. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM)
  176. /**
  177. * Request INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK
  178. *
  179. * For SMC loop-back mode only, used for internal integration, debugging
  180. * or troubleshooting.
  181. *
  182. * Call register usage:
  183. * a0: INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK.
  184. * a1-7: not used.
  185. *
  186. * Return status:
  187. * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
  188. * a1-3: not used.
  189. */
  190. #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK 6
  191. #define INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK \
  192. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK)
  193. /**
  194. * Request INTEL_SIP_SMC_REG_READ
  195. *
  196. * Read a protected register at EL3
  197. *
  198. * Call register usage:
  199. * a0: INTEL_SIP_SMC_REG_READ.
  200. * a1: register address.
  201. * a2-7: not used.
  202. *
  203. * Return status:
  204. * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
  205. * a1: value in the register
  206. * a2-3: not used.
  207. */
  208. #define INTEL_SIP_SMC_FUNCID_REG_READ 7
  209. #define INTEL_SIP_SMC_REG_READ \
  210. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_READ)
  211. /**
  212. * Request INTEL_SIP_SMC_REG_WRITE
  213. *
  214. * Write a protected register at EL3
  215. *
  216. * Call register usage:
  217. * a0: INTEL_SIP_SMC_REG_WRITE.
  218. * a1: register address
  219. * a2: value to program into register.
  220. * a3-7: not used.
  221. *
  222. * Return status:
  223. * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
  224. * a1-3: not used.
  225. */
  226. #define INTEL_SIP_SMC_FUNCID_REG_WRITE 8
  227. #define INTEL_SIP_SMC_REG_WRITE \
  228. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_WRITE)
  229. /**
  230. * Request INTEL_SIP_SMC_FUNCID_REG_UPDATE
  231. *
  232. * Update one or more bits in a protected register at EL3 using a
  233. * read-modify-write operation.
  234. *
  235. * Call register usage:
  236. * a0: INTEL_SIP_SMC_REG_UPDATE.
  237. * a1: register address
  238. * a2: write Mask.
  239. * a3: value to write.
  240. * a4-7: not used.
  241. *
  242. * Return status:
  243. * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
  244. * a1-3: Not used.
  245. */
  246. #define INTEL_SIP_SMC_FUNCID_REG_UPDATE 9
  247. #define INTEL_SIP_SMC_REG_UPDATE \
  248. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_UPDATE)
  249. /**
  250. * Request INTEL_SIP_SMC_RSU_STATUS
  251. *
  252. * Request remote status update boot log, call is synchronous.
  253. *
  254. * Call register usage:
  255. * a0 INTEL_SIP_SMC_RSU_STATUS
  256. * a1-7 not used
  257. *
  258. * Return status
  259. * a0: Current Image
  260. * a1: Last Failing Image
  261. * a2: Version | State
  262. * a3: Error details | Error location
  263. *
  264. * Or
  265. *
  266. * a0: INTEL_SIP_SMC_RSU_ERROR
  267. */
  268. #define INTEL_SIP_SMC_FUNCID_RSU_STATUS 11
  269. #define INTEL_SIP_SMC_RSU_STATUS \
  270. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_STATUS)
  271. /**
  272. * Request INTEL_SIP_SMC_RSU_UPDATE
  273. *
  274. * Request to set the offset of the bitstream to boot after reboot, call
  275. * is synchronous.
  276. *
  277. * Call register usage:
  278. * a0 INTEL_SIP_SMC_RSU_UPDATE
  279. * a1 64bit physical address of the configuration data memory in flash
  280. * a2-7 not used
  281. *
  282. * Return status
  283. * a0 INTEL_SIP_SMC_STATUS_OK
  284. */
  285. #define INTEL_SIP_SMC_FUNCID_RSU_UPDATE 12
  286. #define INTEL_SIP_SMC_RSU_UPDATE \
  287. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE)
  288. /**
  289. * Request INTEL_SIP_SMC_ECC_DBE
  290. *
  291. * Sync call used by service driver at EL1 to alert EL3 that a Double
  292. * Bit ECC error has occurred.
  293. *
  294. * Call register usage:
  295. * a0 INTEL_SIP_SMC_ECC_DBE
  296. * a1 SysManager Double Bit Error value
  297. * a2-7 not used
  298. *
  299. * Return status
  300. * a0 INTEL_SIP_SMC_STATUS_OK
  301. */
  302. #define INTEL_SIP_SMC_FUNCID_ECC_DBE 13
  303. #define INTEL_SIP_SMC_ECC_DBE \
  304. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE)
  305. #endif
  306. /**
  307. * Request INTEL_SIP_SMC_RSU_NOTIFY
  308. *
  309. * Sync call used by service driver at EL1 to report hard processor
  310. * system execution stage to firmware
  311. *
  312. * Call register usage:
  313. * a0 INTEL_SIP_SMC_RSU_NOTIFY
  314. * a1 32bit value representing hard processor system execution stage
  315. * a2-7 not used
  316. *
  317. * Return status
  318. * a0 INTEL_SIP_SMC_STATUS_OK
  319. */
  320. #define INTEL_SIP_SMC_FUNCID_RSU_NOTIFY 14
  321. #define INTEL_SIP_SMC_RSU_NOTIFY \
  322. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_NOTIFY)
  323. /**
  324. * Request INTEL_SIP_SMC_RSU_RETRY_COUNTER
  325. *
  326. * Sync call used by service driver at EL1 to query RSU retry counter
  327. *
  328. * Call register usage:
  329. * a0 INTEL_SIP_SMC_RSU_RETRY_COUNTER
  330. * a1-7 not used
  331. *
  332. * Return status
  333. * a0 INTEL_SIP_SMC_STATUS_OK
  334. * a1 the retry counter
  335. *
  336. * Or
  337. *
  338. * a0 INTEL_SIP_SMC_RSU_ERROR
  339. */
  340. #define INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER 15
  341. #define INTEL_SIP_SMC_RSU_RETRY_COUNTER \
  342. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER)
  343. /**
  344. * Request INTEL_SIP_SMC_RSU_DCMF_VERSION
  345. *
  346. * Sync call used by service driver at EL1 to query DCMF (Decision
  347. * Configuration Management Firmware) version from FW
  348. *
  349. * Call register usage:
  350. * a0 INTEL_SIP_SMC_RSU_DCMF_VERSION
  351. * a1-7 not used
  352. *
  353. * Return status
  354. * a0 INTEL_SIP_SMC_STATUS_OK
  355. * a1 dcmf1 | dcmf0
  356. * a2 dcmf3 | dcmf2
  357. *
  358. * Or
  359. *
  360. * a0 INTEL_SIP_SMC_RSU_ERROR
  361. */
  362. #define INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION 16
  363. #define INTEL_SIP_SMC_RSU_DCMF_VERSION \
  364. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION)
  365. /**
  366. * Request INTEL_SIP_SMC_RSU_MAX_RETRY
  367. *
  368. * Sync call used by service driver at EL1 to query max retry value from FW
  369. *
  370. * Call register usage:
  371. * a0 INTEL_SIP_SMC_RSU_MAX_RETRY
  372. * a1-7 not used
  373. *
  374. * Return status
  375. * a0 INTEL_SIP_SMC_STATUS_OK
  376. * a1 max retry value
  377. *
  378. * Or
  379. * a0 INTEL_SIP_SMC_RSU_ERROR
  380. */
  381. #define INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY 18
  382. #define INTEL_SIP_SMC_RSU_MAX_RETRY \
  383. INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY)