dmar.h 7.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2006, Intel Corporation.
  4. *
  5. * Copyright (C) Ashok Raj <ashok.raj@intel.com>
  6. * Copyright (C) Shaohua Li <shaohua.li@intel.com>
  7. */
  8. #ifndef __DMAR_H__
  9. #define __DMAR_H__
  10. #include <linux/acpi.h>
  11. #include <linux/types.h>
  12. #include <linux/msi.h>
  13. #include <linux/irqreturn.h>
  14. #include <linux/rwsem.h>
  15. #include <linux/rculist.h>
  16. struct acpi_dmar_header;
  17. #ifdef CONFIG_X86
  18. # define DMAR_UNITS_SUPPORTED MAX_IO_APICS
  19. #else
  20. # define DMAR_UNITS_SUPPORTED 64
  21. #endif
  22. /* DMAR Flags */
  23. #define DMAR_INTR_REMAP 0x1
  24. #define DMAR_X2APIC_OPT_OUT 0x2
  25. #define DMAR_PLATFORM_OPT_IN 0x4
  26. struct intel_iommu;
  27. struct dmar_dev_scope {
  28. struct device __rcu *dev;
  29. u8 bus;
  30. u8 devfn;
  31. };
  32. #ifdef CONFIG_DMAR_TABLE
  33. extern struct acpi_table_header *dmar_tbl;
  34. struct dmar_drhd_unit {
  35. struct list_head list; /* list of drhd units */
  36. struct acpi_dmar_header *hdr; /* ACPI header */
  37. u64 reg_base_addr; /* register base address*/
  38. struct dmar_dev_scope *devices;/* target device array */
  39. int devices_cnt; /* target device count */
  40. u16 segment; /* PCI domain */
  41. u8 ignored:1; /* ignore drhd */
  42. u8 include_all:1;
  43. u8 gfx_dedicated:1; /* graphic dedicated */
  44. struct intel_iommu *iommu;
  45. };
  46. struct dmar_pci_path {
  47. u8 bus;
  48. u8 device;
  49. u8 function;
  50. };
  51. struct dmar_pci_notify_info {
  52. struct pci_dev *dev;
  53. unsigned long event;
  54. int bus;
  55. u16 seg;
  56. u16 level;
  57. struct dmar_pci_path path[];
  58. } __attribute__((packed));
  59. extern struct rw_semaphore dmar_global_lock;
  60. extern struct list_head dmar_drhd_units;
  61. #define for_each_drhd_unit(drhd) \
  62. list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
  63. dmar_rcu_check())
  64. #define for_each_active_drhd_unit(drhd) \
  65. list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
  66. dmar_rcu_check()) \
  67. if (drhd->ignored) {} else
  68. #define for_each_active_iommu(i, drhd) \
  69. list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
  70. dmar_rcu_check()) \
  71. if (i=drhd->iommu, drhd->ignored) {} else
  72. #define for_each_iommu(i, drhd) \
  73. list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
  74. dmar_rcu_check()) \
  75. if (i=drhd->iommu, 0) {} else
  76. static inline bool dmar_rcu_check(void)
  77. {
  78. return rwsem_is_locked(&dmar_global_lock) ||
  79. system_state == SYSTEM_BOOTING;
  80. }
  81. #define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check())
  82. #define for_each_dev_scope(devs, cnt, i, tmp) \
  83. for ((i) = 0; ((tmp) = (i) < (cnt) ? \
  84. dmar_rcu_dereference((devs)[(i)].dev) : NULL, (i) < (cnt)); \
  85. (i)++)
  86. #define for_each_active_dev_scope(devs, cnt, i, tmp) \
  87. for_each_dev_scope((devs), (cnt), (i), (tmp)) \
  88. if (!(tmp)) { continue; } else
  89. extern int dmar_table_init(void);
  90. extern int dmar_dev_scope_init(void);
  91. extern void dmar_register_bus_notifier(void);
  92. extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
  93. struct dmar_dev_scope **devices, u16 segment);
  94. extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
  95. extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt);
  96. extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
  97. void *start, void*end, u16 segment,
  98. struct dmar_dev_scope *devices,
  99. int devices_cnt);
  100. extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
  101. u16 segment, struct dmar_dev_scope *devices,
  102. int count);
  103. /* Intel IOMMU detection */
  104. extern int detect_intel_iommu(void);
  105. extern int enable_drhd_fault_handling(void);
  106. extern int dmar_device_add(acpi_handle handle);
  107. extern int dmar_device_remove(acpi_handle handle);
  108. static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg)
  109. {
  110. return 0;
  111. }
  112. #ifdef CONFIG_INTEL_IOMMU
  113. extern int iommu_detected, no_iommu;
  114. extern int intel_iommu_init(void);
  115. extern void intel_iommu_shutdown(void);
  116. extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg);
  117. extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg);
  118. extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg);
  119. extern int dmar_release_one_atsr(struct acpi_dmar_header *hdr, void *arg);
  120. extern int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
  121. extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
  122. #else /* !CONFIG_INTEL_IOMMU: */
  123. static inline int intel_iommu_init(void) { return -ENODEV; }
  124. static inline void intel_iommu_shutdown(void) { }
  125. #define dmar_parse_one_rmrr dmar_res_noop
  126. #define dmar_parse_one_atsr dmar_res_noop
  127. #define dmar_check_one_atsr dmar_res_noop
  128. #define dmar_release_one_atsr dmar_res_noop
  129. static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
  130. {
  131. return 0;
  132. }
  133. static inline int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
  134. {
  135. return 0;
  136. }
  137. #endif /* CONFIG_INTEL_IOMMU */
  138. #ifdef CONFIG_IRQ_REMAP
  139. extern int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
  140. #else /* CONFIG_IRQ_REMAP */
  141. static inline int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
  142. { return 0; }
  143. #endif /* CONFIG_IRQ_REMAP */
  144. extern bool dmar_platform_optin(void);
  145. #else /* CONFIG_DMAR_TABLE */
  146. static inline int dmar_device_add(void *handle)
  147. {
  148. return 0;
  149. }
  150. static inline int dmar_device_remove(void *handle)
  151. {
  152. return 0;
  153. }
  154. static inline bool dmar_platform_optin(void)
  155. {
  156. return false;
  157. }
  158. #endif /* CONFIG_DMAR_TABLE */
  159. struct irte {
  160. union {
  161. /* Shared between remapped and posted mode*/
  162. struct {
  163. __u64 present : 1, /* 0 */
  164. fpd : 1, /* 1 */
  165. __res0 : 6, /* 2 - 6 */
  166. avail : 4, /* 8 - 11 */
  167. __res1 : 3, /* 12 - 14 */
  168. pst : 1, /* 15 */
  169. vector : 8, /* 16 - 23 */
  170. __res2 : 40; /* 24 - 63 */
  171. };
  172. /* Remapped mode */
  173. struct {
  174. __u64 r_present : 1, /* 0 */
  175. r_fpd : 1, /* 1 */
  176. dst_mode : 1, /* 2 */
  177. redir_hint : 1, /* 3 */
  178. trigger_mode : 1, /* 4 */
  179. dlvry_mode : 3, /* 5 - 7 */
  180. r_avail : 4, /* 8 - 11 */
  181. r_res0 : 4, /* 12 - 15 */
  182. r_vector : 8, /* 16 - 23 */
  183. r_res1 : 8, /* 24 - 31 */
  184. dest_id : 32; /* 32 - 63 */
  185. };
  186. /* Posted mode */
  187. struct {
  188. __u64 p_present : 1, /* 0 */
  189. p_fpd : 1, /* 1 */
  190. p_res0 : 6, /* 2 - 7 */
  191. p_avail : 4, /* 8 - 11 */
  192. p_res1 : 2, /* 12 - 13 */
  193. p_urgent : 1, /* 14 */
  194. p_pst : 1, /* 15 */
  195. p_vector : 8, /* 16 - 23 */
  196. p_res2 : 14, /* 24 - 37 */
  197. pda_l : 26; /* 38 - 63 */
  198. };
  199. __u64 low;
  200. };
  201. union {
  202. /* Shared between remapped and posted mode*/
  203. struct {
  204. __u64 sid : 16, /* 64 - 79 */
  205. sq : 2, /* 80 - 81 */
  206. svt : 2, /* 82 - 83 */
  207. __res3 : 44; /* 84 - 127 */
  208. };
  209. /* Posted mode*/
  210. struct {
  211. __u64 p_sid : 16, /* 64 - 79 */
  212. p_sq : 2, /* 80 - 81 */
  213. p_svt : 2, /* 82 - 83 */
  214. p_res3 : 12, /* 84 - 95 */
  215. pda_h : 32; /* 96 - 127 */
  216. };
  217. __u64 high;
  218. };
  219. };
  220. static inline void dmar_copy_shared_irte(struct irte *dst, struct irte *src)
  221. {
  222. dst->present = src->present;
  223. dst->fpd = src->fpd;
  224. dst->avail = src->avail;
  225. dst->pst = src->pst;
  226. dst->vector = src->vector;
  227. dst->sid = src->sid;
  228. dst->sq = src->sq;
  229. dst->svt = src->svt;
  230. }
  231. #define PDA_LOW_BIT 26
  232. #define PDA_HIGH_BIT 32
  233. /* Can't use the common MSI interrupt functions
  234. * since DMAR is not a pci device
  235. */
  236. struct irq_data;
  237. extern void dmar_msi_unmask(struct irq_data *data);
  238. extern void dmar_msi_mask(struct irq_data *data);
  239. extern void dmar_msi_read(int irq, struct msi_msg *msg);
  240. extern void dmar_msi_write(int irq, struct msi_msg *msg);
  241. extern int dmar_set_interrupt(struct intel_iommu *iommu);
  242. extern irqreturn_t dmar_fault(int irq, void *dev_id);
  243. extern int dmar_alloc_hwirq(int id, int node, void *arg);
  244. extern void dmar_free_hwirq(int irq);
  245. #endif /* __DMAR_H__ */