cyclades.h 10 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* $Revision: 3.0 $$Date: 1998/11/02 14:20:59 $
  3. * linux/include/linux/cyclades.h
  4. *
  5. * This file was initially written by
  6. * Randolph Bentson <bentson@grieg.seaslug.org> and is maintained by
  7. * Ivan Passos <ivan@cyclades.com>.
  8. *
  9. * This file contains the general definitions for the cyclades.c driver
  10. *$Log: cyclades.h,v $
  11. *Revision 3.1 2002/01/29 11:36:16 henrique
  12. *added throttle field on struct cyclades_port to indicate whether the
  13. *port is throttled or not
  14. *
  15. *Revision 3.1 2000/04/19 18:52:52 ivan
  16. *converted address fields to unsigned long and added fields for physical
  17. *addresses on cyclades_card structure;
  18. *
  19. *Revision 3.0 1998/11/02 14:20:59 ivan
  20. *added nports field on cyclades_card structure;
  21. *
  22. *Revision 2.5 1998/08/03 16:57:01 ivan
  23. *added cyclades_idle_stats structure;
  24. *
  25. *Revision 2.4 1998/06/01 12:09:53 ivan
  26. *removed closing_wait2 from cyclades_port structure;
  27. *
  28. *Revision 2.3 1998/03/16 18:01:12 ivan
  29. *changes in the cyclades_port structure to get it closer to the
  30. *standard serial port structure;
  31. *added constants for new ioctls;
  32. *
  33. *Revision 2.2 1998/02/17 16:50:00 ivan
  34. *changes in the cyclades_port structure (addition of shutdown_wait and
  35. *chip_rev variables);
  36. *added constants for new ioctls and for CD1400 rev. numbers.
  37. *
  38. *Revision 2.1 1997/10/24 16:03:00 ivan
  39. *added rflow (which allows enabling the CD1400 special flow control
  40. *feature) and rtsdtr_inv (which allows DTR/RTS pin inversion) to
  41. *cyclades_port structure;
  42. *added Alpha support
  43. *
  44. *Revision 2.0 1997/06/30 10:30:00 ivan
  45. *added some new doorbell command constants related to IOCTLW and
  46. *UART error signaling
  47. *
  48. *Revision 1.8 1997/06/03 15:30:00 ivan
  49. *added constant ZFIRM_HLT
  50. *added constant CyPCI_Ze_win ( = 2 * Cy_PCI_Zwin)
  51. *
  52. *Revision 1.7 1997/03/26 10:30:00 daniel
  53. *new entries at the end of cyclades_port struct to reallocate
  54. *variables illegally allocated within card memory.
  55. *
  56. *Revision 1.6 1996/09/09 18:35:30 bentson
  57. *fold in changes for Cyclom-Z -- including structures for
  58. *communicating with board as well modest changes to original
  59. *structures to support new features.
  60. *
  61. *Revision 1.5 1995/11/13 21:13:31 bentson
  62. *changes suggested by Michael Chastain <mec@duracef.shout.net>
  63. *to support use of this file in non-kernel applications
  64. *
  65. *
  66. */
  67. #ifndef _LINUX_CYCLADES_H
  68. #define _LINUX_CYCLADES_H
  69. #include <uapi/linux/cyclades.h>
  70. /* Per card data structure */
  71. struct cyclades_card {
  72. void __iomem *base_addr;
  73. union {
  74. void __iomem *p9050;
  75. struct RUNTIME_9060 __iomem *p9060;
  76. } ctl_addr;
  77. struct BOARD_CTRL __iomem *board_ctrl; /* cyz specific */
  78. int irq;
  79. unsigned int num_chips; /* 0 if card absent, -1 if Z/PCI, else Y */
  80. unsigned int first_line; /* minor number of first channel on card */
  81. unsigned int nports; /* Number of ports in the card */
  82. int bus_index; /* address shift - 0 for ISA, 1 for PCI */
  83. int intr_enabled; /* FW Interrupt flag - 0 disabled, 1 enabled */
  84. u32 hw_ver;
  85. spinlock_t card_lock;
  86. struct cyclades_port *ports;
  87. };
  88. /***************************************
  89. * Memory access functions/macros *
  90. * (required to support Alpha systems) *
  91. ***************************************/
  92. #define cy_writeb(port,val) do { writeb((val), (port)); mb(); } while (0)
  93. #define cy_writew(port,val) do { writew((val), (port)); mb(); } while (0)
  94. #define cy_writel(port,val) do { writel((val), (port)); mb(); } while (0)
  95. /*
  96. * Statistics counters
  97. */
  98. struct cyclades_icount {
  99. __u32 cts, dsr, rng, dcd, tx, rx;
  100. __u32 frame, parity, overrun, brk;
  101. __u32 buf_overrun;
  102. };
  103. /*
  104. * This is our internal structure for each serial port's state.
  105. *
  106. * Many fields are paralleled by the structure used by the serial_struct
  107. * structure.
  108. *
  109. * For definitions of the flags field, see tty.h
  110. */
  111. struct cyclades_port {
  112. int magic;
  113. struct tty_port port;
  114. struct cyclades_card *card;
  115. union {
  116. struct {
  117. void __iomem *base_addr;
  118. } cyy;
  119. struct {
  120. struct CH_CTRL __iomem *ch_ctrl;
  121. struct BUF_CTRL __iomem *buf_ctrl;
  122. } cyz;
  123. } u;
  124. int line;
  125. int flags; /* defined in tty.h */
  126. int type; /* UART type */
  127. int read_status_mask;
  128. int ignore_status_mask;
  129. int timeout;
  130. int xmit_fifo_size;
  131. int cor1,cor2,cor3,cor4,cor5;
  132. int tbpr,tco,rbpr,rco;
  133. int baud;
  134. int rflow;
  135. int rtsdtr_inv;
  136. int chip_rev;
  137. int custom_divisor;
  138. u8 x_char; /* to be pushed out ASAP */
  139. int breakon;
  140. int breakoff;
  141. int xmit_head;
  142. int xmit_tail;
  143. int xmit_cnt;
  144. int default_threshold;
  145. int default_timeout;
  146. unsigned long rflush_count;
  147. struct cyclades_monitor mon;
  148. struct cyclades_idle_stats idle_stats;
  149. struct cyclades_icount icount;
  150. struct completion shutdown_wait;
  151. int throttle;
  152. #ifdef CONFIG_CYZ_INTR
  153. struct timer_list rx_full_timer;
  154. #endif
  155. };
  156. #define CLOSING_WAIT_DELAY 30*HZ
  157. #define CY_CLOSING_WAIT_NONE ASYNC_CLOSING_WAIT_NONE
  158. #define CY_CLOSING_WAIT_INF ASYNC_CLOSING_WAIT_INF
  159. #define CyMAX_CHIPS_PER_CARD 8
  160. #define CyMAX_CHAR_FIFO 12
  161. #define CyPORTS_PER_CHIP 4
  162. #define CD1400_MAX_SPEED 115200
  163. #define CyISA_Ywin 0x2000
  164. #define CyPCI_Ywin 0x4000
  165. #define CyPCI_Yctl 0x80
  166. #define CyPCI_Zctl CTRL_WINDOW_SIZE
  167. #define CyPCI_Zwin 0x80000
  168. #define CyPCI_Ze_win (2 * CyPCI_Zwin)
  169. #define PCI_DEVICE_ID_MASK 0x06
  170. /**** CD1400 registers ****/
  171. #define CD1400_REV_G 0x46
  172. #define CD1400_REV_J 0x48
  173. #define CyRegSize 0x0400
  174. #define Cy_HwReset 0x1400
  175. #define Cy_ClrIntr 0x1800
  176. #define Cy_EpldRev 0x1e00
  177. /* Global Registers */
  178. #define CyGFRCR (0x40*2)
  179. #define CyRevE (44)
  180. #define CyCAR (0x68*2)
  181. #define CyCHAN_0 (0x00)
  182. #define CyCHAN_1 (0x01)
  183. #define CyCHAN_2 (0x02)
  184. #define CyCHAN_3 (0x03)
  185. #define CyGCR (0x4B*2)
  186. #define CyCH0_SERIAL (0x00)
  187. #define CyCH0_PARALLEL (0x80)
  188. #define CySVRR (0x67*2)
  189. #define CySRModem (0x04)
  190. #define CySRTransmit (0x02)
  191. #define CySRReceive (0x01)
  192. #define CyRICR (0x44*2)
  193. #define CyTICR (0x45*2)
  194. #define CyMICR (0x46*2)
  195. #define CyICR0 (0x00)
  196. #define CyICR1 (0x01)
  197. #define CyICR2 (0x02)
  198. #define CyICR3 (0x03)
  199. #define CyRIR (0x6B*2)
  200. #define CyTIR (0x6A*2)
  201. #define CyMIR (0x69*2)
  202. #define CyIRDirEq (0x80)
  203. #define CyIRBusy (0x40)
  204. #define CyIRUnfair (0x20)
  205. #define CyIRContext (0x1C)
  206. #define CyIRChannel (0x03)
  207. #define CyPPR (0x7E*2)
  208. #define CyCLOCK_20_1MS (0x27)
  209. #define CyCLOCK_25_1MS (0x31)
  210. #define CyCLOCK_25_5MS (0xf4)
  211. #define CyCLOCK_60_1MS (0x75)
  212. #define CyCLOCK_60_2MS (0xea)
  213. /* Virtual Registers */
  214. #define CyRIVR (0x43*2)
  215. #define CyTIVR (0x42*2)
  216. #define CyMIVR (0x41*2)
  217. #define CyIVRMask (0x07)
  218. #define CyIVRRxEx (0x07)
  219. #define CyIVRRxOK (0x03)
  220. #define CyIVRTxOK (0x02)
  221. #define CyIVRMdmOK (0x01)
  222. #define CyTDR (0x63*2)
  223. #define CyRDSR (0x62*2)
  224. #define CyTIMEOUT (0x80)
  225. #define CySPECHAR (0x70)
  226. #define CyBREAK (0x08)
  227. #define CyPARITY (0x04)
  228. #define CyFRAME (0x02)
  229. #define CyOVERRUN (0x01)
  230. #define CyMISR (0x4C*2)
  231. /* see CyMCOR_ and CyMSVR_ for bits*/
  232. #define CyEOSRR (0x60*2)
  233. /* Channel Registers */
  234. #define CyLIVR (0x18*2)
  235. #define CyMscsr (0x01)
  236. #define CyTdsr (0x02)
  237. #define CyRgdsr (0x03)
  238. #define CyRedsr (0x07)
  239. #define CyCCR (0x05*2)
  240. /* Format 1 */
  241. #define CyCHAN_RESET (0x80)
  242. #define CyCHIP_RESET (0x81)
  243. #define CyFlushTransFIFO (0x82)
  244. /* Format 2 */
  245. #define CyCOR_CHANGE (0x40)
  246. #define CyCOR1ch (0x02)
  247. #define CyCOR2ch (0x04)
  248. #define CyCOR3ch (0x08)
  249. /* Format 3 */
  250. #define CySEND_SPEC_1 (0x21)
  251. #define CySEND_SPEC_2 (0x22)
  252. #define CySEND_SPEC_3 (0x23)
  253. #define CySEND_SPEC_4 (0x24)
  254. /* Format 4 */
  255. #define CyCHAN_CTL (0x10)
  256. #define CyDIS_RCVR (0x01)
  257. #define CyENB_RCVR (0x02)
  258. #define CyDIS_XMTR (0x04)
  259. #define CyENB_XMTR (0x08)
  260. #define CySRER (0x06*2)
  261. #define CyMdmCh (0x80)
  262. #define CyRxData (0x10)
  263. #define CyTxRdy (0x04)
  264. #define CyTxMpty (0x02)
  265. #define CyNNDT (0x01)
  266. #define CyCOR1 (0x08*2)
  267. #define CyPARITY_NONE (0x00)
  268. #define CyPARITY_0 (0x20)
  269. #define CyPARITY_1 (0xA0)
  270. #define CyPARITY_E (0x40)
  271. #define CyPARITY_O (0xC0)
  272. #define Cy_1_STOP (0x00)
  273. #define Cy_1_5_STOP (0x04)
  274. #define Cy_2_STOP (0x08)
  275. #define Cy_5_BITS (0x00)
  276. #define Cy_6_BITS (0x01)
  277. #define Cy_7_BITS (0x02)
  278. #define Cy_8_BITS (0x03)
  279. #define CyCOR2 (0x09*2)
  280. #define CyIXM (0x80)
  281. #define CyTxIBE (0x40)
  282. #define CyETC (0x20)
  283. #define CyAUTO_TXFL (0x60)
  284. #define CyLLM (0x10)
  285. #define CyRLM (0x08)
  286. #define CyRtsAO (0x04)
  287. #define CyCtsAE (0x02)
  288. #define CyDsrAE (0x01)
  289. #define CyCOR3 (0x0A*2)
  290. #define CySPL_CH_DRANGE (0x80) /* special character detect range */
  291. #define CySPL_CH_DET1 (0x40) /* enable special character detection
  292. on SCHR4-SCHR3 */
  293. #define CyFL_CTRL_TRNSP (0x20) /* Flow Control Transparency */
  294. #define CySPL_CH_DET2 (0x10) /* Enable special character detection
  295. on SCHR2-SCHR1 */
  296. #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
  297. #define CyCOR4 (0x1E*2)
  298. #define CyCOR5 (0x1F*2)
  299. #define CyCCSR (0x0B*2)
  300. #define CyRxEN (0x80)
  301. #define CyRxFloff (0x40)
  302. #define CyRxFlon (0x20)
  303. #define CyTxEN (0x08)
  304. #define CyTxFloff (0x04)
  305. #define CyTxFlon (0x02)
  306. #define CyRDCR (0x0E*2)
  307. #define CySCHR1 (0x1A*2)
  308. #define CySCHR2 (0x1B*2)
  309. #define CySCHR3 (0x1C*2)
  310. #define CySCHR4 (0x1D*2)
  311. #define CySCRL (0x22*2)
  312. #define CySCRH (0x23*2)
  313. #define CyLNC (0x24*2)
  314. #define CyMCOR1 (0x15*2)
  315. #define CyMCOR2 (0x16*2)
  316. #define CyRTPR (0x21*2)
  317. #define CyMSVR1 (0x6C*2)
  318. #define CyMSVR2 (0x6D*2)
  319. #define CyANY_DELTA (0xF0)
  320. #define CyDSR (0x80)
  321. #define CyCTS (0x40)
  322. #define CyRI (0x20)
  323. #define CyDCD (0x10)
  324. #define CyDTR (0x02)
  325. #define CyRTS (0x01)
  326. #define CyPVSR (0x6F*2)
  327. #define CyRBPR (0x78*2)
  328. #define CyRCOR (0x7C*2)
  329. #define CyTBPR (0x72*2)
  330. #define CyTCOR (0x76*2)
  331. /* Custom Registers */
  332. #define CyPLX_VER (0x3400)
  333. #define PLX_9050 0x0b
  334. #define PLX_9060 0x0c
  335. #define PLX_9080 0x0d
  336. /***************************************************************************/
  337. #endif /* _LINUX_CYCLADES_H */