qcom,gcc-msm8660.h 3.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2013, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef _DT_BINDINGS_RESET_MSM_GCC_8660_H
  6. #define _DT_BINDINGS_RESET_MSM_GCC_8660_H
  7. #define AFAB_CORE_RESET 0
  8. #define SCSS_SYS_RESET 1
  9. #define SCSS_SYS_POR_RESET 2
  10. #define AFAB_SMPSS_S_RESET 3
  11. #define AFAB_SMPSS_M1_RESET 4
  12. #define AFAB_SMPSS_M0_RESET 5
  13. #define AFAB_EBI1_S_RESET 6
  14. #define SFAB_CORE_RESET 7
  15. #define SFAB_ADM0_M0_RESET 8
  16. #define SFAB_ADM0_M1_RESET 9
  17. #define SFAB_ADM0_M2_RESET 10
  18. #define ADM0_C2_RESET 11
  19. #define ADM0_C1_RESET 12
  20. #define ADM0_C0_RESET 13
  21. #define ADM0_PBUS_RESET 14
  22. #define ADM0_RESET 15
  23. #define SFAB_ADM1_M0_RESET 16
  24. #define SFAB_ADM1_M1_RESET 17
  25. #define SFAB_ADM1_M2_RESET 18
  26. #define MMFAB_ADM1_M3_RESET 19
  27. #define ADM1_C3_RESET 20
  28. #define ADM1_C2_RESET 21
  29. #define ADM1_C1_RESET 22
  30. #define ADM1_C0_RESET 23
  31. #define ADM1_PBUS_RESET 24
  32. #define ADM1_RESET 25
  33. #define IMEM0_RESET 26
  34. #define SFAB_LPASS_Q6_RESET 27
  35. #define SFAB_AFAB_M_RESET 28
  36. #define AFAB_SFAB_M0_RESET 29
  37. #define AFAB_SFAB_M1_RESET 30
  38. #define DFAB_CORE_RESET 31
  39. #define SFAB_DFAB_M_RESET 32
  40. #define DFAB_SFAB_M_RESET 33
  41. #define DFAB_SWAY0_RESET 34
  42. #define DFAB_SWAY1_RESET 35
  43. #define DFAB_ARB0_RESET 36
  44. #define DFAB_ARB1_RESET 37
  45. #define PPSS_PROC_RESET 38
  46. #define PPSS_RESET 39
  47. #define PMEM_RESET 40
  48. #define DMA_BAM_RESET 41
  49. #define SIC_RESET 42
  50. #define SPS_TIC_RESET 43
  51. #define CFBP0_RESET 44
  52. #define CFBP1_RESET 45
  53. #define CFBP2_RESET 46
  54. #define EBI2_RESET 47
  55. #define SFAB_CFPB_M_RESET 48
  56. #define CFPB_MASTER_RESET 49
  57. #define SFAB_CFPB_S_RESET 50
  58. #define CFPB_SPLITTER_RESET 51
  59. #define TSIF_RESET 52
  60. #define CE1_RESET 53
  61. #define CE2_RESET 54
  62. #define SFAB_SFPB_M_RESET 55
  63. #define SFAB_SFPB_S_RESET 56
  64. #define RPM_PROC_RESET 57
  65. #define RPM_BUS_RESET 58
  66. #define RPM_MSG_RAM_RESET 59
  67. #define PMIC_ARB0_RESET 60
  68. #define PMIC_ARB1_RESET 61
  69. #define PMIC_SSBI2_RESET 62
  70. #define SDC1_RESET 63
  71. #define SDC2_RESET 64
  72. #define SDC3_RESET 65
  73. #define SDC4_RESET 66
  74. #define SDC5_RESET 67
  75. #define USB_HS1_RESET 68
  76. #define USB_HS2_XCVR_RESET 69
  77. #define USB_HS2_RESET 70
  78. #define USB_FS1_XCVR_RESET 71
  79. #define USB_FS1_RESET 72
  80. #define USB_FS2_XCVR_RESET 73
  81. #define USB_FS2_RESET 74
  82. #define GSBI1_RESET 75
  83. #define GSBI2_RESET 76
  84. #define GSBI3_RESET 77
  85. #define GSBI4_RESET 78
  86. #define GSBI5_RESET 79
  87. #define GSBI6_RESET 80
  88. #define GSBI7_RESET 81
  89. #define GSBI8_RESET 82
  90. #define GSBI9_RESET 83
  91. #define GSBI10_RESET 84
  92. #define GSBI11_RESET 85
  93. #define GSBI12_RESET 86
  94. #define SPDM_RESET 87
  95. #define SEC_CTRL_RESET 88
  96. #define TLMM_H_RESET 89
  97. #define TLMM_RESET 90
  98. #define MARRM_PWRON_RESET 91
  99. #define MARM_RESET 92
  100. #define MAHB1_RESET 93
  101. #define SFAB_MSS_S_RESET 94
  102. #define MAHB2_RESET 95
  103. #define MODEM_SW_AHB_RESET 96
  104. #define MODEM_RESET 97
  105. #define SFAB_MSS_MDM1_RESET 98
  106. #define SFAB_MSS_MDM0_RESET 99
  107. #define MSS_SLP_RESET 100
  108. #define MSS_MARM_SAW_RESET 101
  109. #define MSS_WDOG_RESET 102
  110. #define TSSC_RESET 103
  111. #define PDM_RESET 104
  112. #define SCSS_CORE0_RESET 105
  113. #define SCSS_CORE0_POR_RESET 106
  114. #define SCSS_CORE1_RESET 107
  115. #define SCSS_CORE1_POR_RESET 108
  116. #define MPM_RESET 109
  117. #define EBI1_1X_DIV_RESET 110
  118. #define EBI1_RESET 111
  119. #define SFAB_SMPSS_S_RESET 112
  120. #define USB_PHY0_RESET 113
  121. #define USB_PHY1_RESET 114
  122. #define PRNG_RESET 115
  123. #endif