imx7-reset.h 1.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (C) 2017 Impinj, Inc.
  4. *
  5. * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
  6. */
  7. #ifndef DT_BINDING_RESET_IMX7_H
  8. #define DT_BINDING_RESET_IMX7_H
  9. #define IMX7_RESET_A7_CORE_POR_RESET0 0
  10. #define IMX7_RESET_A7_CORE_POR_RESET1 1
  11. #define IMX7_RESET_A7_CORE_RESET0 2
  12. #define IMX7_RESET_A7_CORE_RESET1 3
  13. #define IMX7_RESET_A7_DBG_RESET0 4
  14. #define IMX7_RESET_A7_DBG_RESET1 5
  15. #define IMX7_RESET_A7_ETM_RESET0 6
  16. #define IMX7_RESET_A7_ETM_RESET1 7
  17. #define IMX7_RESET_A7_SOC_DBG_RESET 8
  18. #define IMX7_RESET_A7_L2RESET 9
  19. #define IMX7_RESET_SW_M4C_RST 10
  20. #define IMX7_RESET_SW_M4P_RST 11
  21. #define IMX7_RESET_EIM_RST 12
  22. #define IMX7_RESET_HSICPHY_PORT_RST 13
  23. #define IMX7_RESET_USBPHY1_POR 14
  24. #define IMX7_RESET_USBPHY1_PORT_RST 15
  25. #define IMX7_RESET_USBPHY2_POR 16
  26. #define IMX7_RESET_USBPHY2_PORT_RST 17
  27. #define IMX7_RESET_MIPI_PHY_MRST 18
  28. #define IMX7_RESET_MIPI_PHY_SRST 19
  29. /*
  30. * IMX7_RESET_PCIEPHY is a logical reset line combining PCIEPHY_BTN
  31. * and PCIEPHY_G_RST
  32. */
  33. #define IMX7_RESET_PCIEPHY 20
  34. #define IMX7_RESET_PCIEPHY_PERST 21
  35. /*
  36. * IMX7_RESET_PCIE_CTRL_APPS_EN is not strictly a reset line, but it
  37. * can be used to inhibit PCIe LTTSM, so, in a way, it can be thoguht
  38. * of as one
  39. */
  40. #define IMX7_RESET_PCIE_CTRL_APPS_EN 22
  41. #define IMX7_RESET_DDRC_PRST 23
  42. #define IMX7_RESET_DDRC_CORE_RST 24
  43. #define IMX7_RESET_PCIE_CTRL_APPS_TURNOFF 25
  44. #define IMX7_RESET_NUM 26
  45. #endif