amlogic,meson-a1-reset.h 1.6 KB

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  1. /* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. *
  3. * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
  4. * Author: Xingyu Chen <xingyu.chen@amlogic.com>
  5. *
  6. */
  7. #ifndef _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H
  8. #define _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H
  9. /* RESET0 */
  10. /* 0 */
  11. #define RESET_AM2AXI_VAD 1
  12. /* 2-3 */
  13. #define RESET_PSRAM 4
  14. #define RESET_PAD_CTRL 5
  15. /* 6 */
  16. #define RESET_TEMP_SENSOR 7
  17. #define RESET_AM2AXI_DEV 8
  18. /* 9 */
  19. #define RESET_SPICC_A 10
  20. #define RESET_MSR_CLK 11
  21. #define RESET_AUDIO 12
  22. #define RESET_ANALOG_CTRL 13
  23. #define RESET_SAR_ADC 14
  24. #define RESET_AUDIO_VAD 15
  25. #define RESET_CEC 16
  26. #define RESET_PWM_EF 17
  27. #define RESET_PWM_CD 18
  28. #define RESET_PWM_AB 19
  29. /* 20 */
  30. #define RESET_IR_CTRL 21
  31. #define RESET_I2C_S_A 22
  32. /* 23 */
  33. #define RESET_I2C_M_D 24
  34. #define RESET_I2C_M_C 25
  35. #define RESET_I2C_M_B 26
  36. #define RESET_I2C_M_A 27
  37. #define RESET_I2C_PROD_AHB 28
  38. #define RESET_I2C_PROD 29
  39. /* 30-31 */
  40. /* RESET1 */
  41. #define RESET_ACODEC 32
  42. #define RESET_DMA 33
  43. #define RESET_SD_EMMC_A 34
  44. /* 35 */
  45. #define RESET_USBCTRL 36
  46. /* 37 */
  47. #define RESET_USBPHY 38
  48. /* 39-41 */
  49. #define RESET_RSA 42
  50. #define RESET_DMC 43
  51. /* 44 */
  52. #define RESET_IRQ_CTRL 45
  53. /* 46 */
  54. #define RESET_NIC_VAD 47
  55. #define RESET_NIC_AXI 48
  56. #define RESET_RAMA 49
  57. #define RESET_RAMB 50
  58. /* 51-52 */
  59. #define RESET_ROM 53
  60. #define RESET_SPIFC 54
  61. #define RESET_GIC 55
  62. #define RESET_UART_C 56
  63. #define RESET_UART_B 57
  64. #define RESET_UART_A 58
  65. #define RESET_OSC_RING 59
  66. /* 60-63 */
  67. /* RESET2 */
  68. /* 64-95 */
  69. #endif