altr,rst-mgr.h 1.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de>
  4. */
  5. #ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H
  6. #define _DT_BINDINGS_RESET_ALTR_RST_MGR_H
  7. /* MPUMODRST */
  8. #define CPU0_RESET 0
  9. #define CPU1_RESET 1
  10. #define WDS_RESET 2
  11. #define SCUPER_RESET 3
  12. #define L2_RESET 4
  13. /* PERMODRST */
  14. #define EMAC0_RESET 32
  15. #define EMAC1_RESET 33
  16. #define USB0_RESET 34
  17. #define USB1_RESET 35
  18. #define NAND_RESET 36
  19. #define QSPI_RESET 37
  20. #define L4WD0_RESET 38
  21. #define L4WD1_RESET 39
  22. #define OSC1TIMER0_RESET 40
  23. #define OSC1TIMER1_RESET 41
  24. #define SPTIMER0_RESET 42
  25. #define SPTIMER1_RESET 43
  26. #define I2C0_RESET 44
  27. #define I2C1_RESET 45
  28. #define I2C2_RESET 46
  29. #define I2C3_RESET 47
  30. #define UART0_RESET 48
  31. #define UART1_RESET 49
  32. #define SPIM0_RESET 50
  33. #define SPIM1_RESET 51
  34. #define SPIS0_RESET 52
  35. #define SPIS1_RESET 53
  36. #define SDMMC_RESET 54
  37. #define CAN0_RESET 55
  38. #define CAN1_RESET 56
  39. #define GPIO0_RESET 57
  40. #define GPIO1_RESET 58
  41. #define GPIO2_RESET 59
  42. #define DMA_RESET 60
  43. #define SDR_RESET 61
  44. /* PER2MODRST */
  45. #define DMAIF0_RESET 64
  46. #define DMAIF1_RESET 65
  47. #define DMAIF2_RESET 66
  48. #define DMAIF3_RESET 67
  49. #define DMAIF4_RESET 68
  50. #define DMAIF5_RESET 69
  51. #define DMAIF6_RESET 70
  52. #define DMAIF7_RESET 71
  53. /* BRGMODRST */
  54. #define HPS2FPGA_RESET 96
  55. #define LWHPS2FPGA_RESET 97
  56. #define FPGA2HPS_RESET 98
  57. /* MISCMODRST*/
  58. #define ROM_RESET 128
  59. #define OCRAM_RESET 129
  60. #define SYSMGR_RESET 130
  61. #define SYSMGRCOLD_RESET 131
  62. #define FPGAMGR_RESET 132
  63. #define ACPIDMAP_RESET 133
  64. #define S2F_RESET 134
  65. #define S2FCOLD_RESET 135
  66. #define NRSTPIN_RESET 136
  67. #define TIMESTAMPCOLD_RESET 137
  68. #define CLKMGRCOLD_RESET 138
  69. #define SCANMGR_RESET 139
  70. #define FRZCTRLCOLD_RESET 140
  71. #define SYSDBG_RESET 141
  72. #define DBG_RESET 142
  73. #define TAPCOLD_RESET 143
  74. #define SDRCOLD_RESET 144
  75. #endif