lochnagar.h 4.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Device Tree defines for Lochnagar pinctrl
  4. *
  5. * Copyright (c) 2018 Cirrus Logic, Inc. and
  6. * Cirrus Logic International Semiconductor Ltd.
  7. *
  8. * Author: Charles Keepax <ckeepax@opensource.cirrus.com>
  9. */
  10. #ifndef DT_BINDINGS_PINCTRL_LOCHNAGAR_H
  11. #define DT_BINDINGS_PINCTRL_LOCHNAGAR_H
  12. #define LOCHNAGAR1_PIN_CDC_RESET 0
  13. #define LOCHNAGAR1_PIN_DSP_RESET 1
  14. #define LOCHNAGAR1_PIN_CDC_CIF1MODE 2
  15. #define LOCHNAGAR1_PIN_NUM_GPIOS 3
  16. #define LOCHNAGAR2_PIN_CDC_RESET 0
  17. #define LOCHNAGAR2_PIN_DSP_RESET 1
  18. #define LOCHNAGAR2_PIN_CDC_CIF1MODE 2
  19. #define LOCHNAGAR2_PIN_CDC_LDOENA 3
  20. #define LOCHNAGAR2_PIN_SPDIF_HWMODE 4
  21. #define LOCHNAGAR2_PIN_SPDIF_RESET 5
  22. #define LOCHNAGAR2_PIN_FPGA_GPIO1 6
  23. #define LOCHNAGAR2_PIN_FPGA_GPIO2 7
  24. #define LOCHNAGAR2_PIN_FPGA_GPIO3 8
  25. #define LOCHNAGAR2_PIN_FPGA_GPIO4 9
  26. #define LOCHNAGAR2_PIN_FPGA_GPIO5 10
  27. #define LOCHNAGAR2_PIN_FPGA_GPIO6 11
  28. #define LOCHNAGAR2_PIN_CDC_GPIO1 12
  29. #define LOCHNAGAR2_PIN_CDC_GPIO2 13
  30. #define LOCHNAGAR2_PIN_CDC_GPIO3 14
  31. #define LOCHNAGAR2_PIN_CDC_GPIO4 15
  32. #define LOCHNAGAR2_PIN_CDC_GPIO5 16
  33. #define LOCHNAGAR2_PIN_CDC_GPIO6 17
  34. #define LOCHNAGAR2_PIN_CDC_GPIO7 18
  35. #define LOCHNAGAR2_PIN_CDC_GPIO8 19
  36. #define LOCHNAGAR2_PIN_DSP_GPIO1 20
  37. #define LOCHNAGAR2_PIN_DSP_GPIO2 21
  38. #define LOCHNAGAR2_PIN_DSP_GPIO3 22
  39. #define LOCHNAGAR2_PIN_DSP_GPIO4 23
  40. #define LOCHNAGAR2_PIN_DSP_GPIO5 24
  41. #define LOCHNAGAR2_PIN_DSP_GPIO6 25
  42. #define LOCHNAGAR2_PIN_GF_GPIO2 26
  43. #define LOCHNAGAR2_PIN_GF_GPIO3 27
  44. #define LOCHNAGAR2_PIN_GF_GPIO7 28
  45. #define LOCHNAGAR2_PIN_CDC_AIF1_BCLK 29
  46. #define LOCHNAGAR2_PIN_CDC_AIF1_RXDAT 30
  47. #define LOCHNAGAR2_PIN_CDC_AIF1_LRCLK 31
  48. #define LOCHNAGAR2_PIN_CDC_AIF1_TXDAT 32
  49. #define LOCHNAGAR2_PIN_CDC_AIF2_BCLK 33
  50. #define LOCHNAGAR2_PIN_CDC_AIF2_RXDAT 34
  51. #define LOCHNAGAR2_PIN_CDC_AIF2_LRCLK 35
  52. #define LOCHNAGAR2_PIN_CDC_AIF2_TXDAT 36
  53. #define LOCHNAGAR2_PIN_CDC_AIF3_BCLK 37
  54. #define LOCHNAGAR2_PIN_CDC_AIF3_RXDAT 38
  55. #define LOCHNAGAR2_PIN_CDC_AIF3_LRCLK 39
  56. #define LOCHNAGAR2_PIN_CDC_AIF3_TXDAT 40
  57. #define LOCHNAGAR2_PIN_DSP_AIF1_BCLK 41
  58. #define LOCHNAGAR2_PIN_DSP_AIF1_RXDAT 42
  59. #define LOCHNAGAR2_PIN_DSP_AIF1_LRCLK 43
  60. #define LOCHNAGAR2_PIN_DSP_AIF1_TXDAT 44
  61. #define LOCHNAGAR2_PIN_DSP_AIF2_BCLK 45
  62. #define LOCHNAGAR2_PIN_DSP_AIF2_RXDAT 46
  63. #define LOCHNAGAR2_PIN_DSP_AIF2_LRCLK 47
  64. #define LOCHNAGAR2_PIN_DSP_AIF2_TXDAT 48
  65. #define LOCHNAGAR2_PIN_PSIA1_BCLK 49
  66. #define LOCHNAGAR2_PIN_PSIA1_RXDAT 50
  67. #define LOCHNAGAR2_PIN_PSIA1_LRCLK 51
  68. #define LOCHNAGAR2_PIN_PSIA1_TXDAT 52
  69. #define LOCHNAGAR2_PIN_PSIA2_BCLK 53
  70. #define LOCHNAGAR2_PIN_PSIA2_RXDAT 54
  71. #define LOCHNAGAR2_PIN_PSIA2_LRCLK 55
  72. #define LOCHNAGAR2_PIN_PSIA2_TXDAT 56
  73. #define LOCHNAGAR2_PIN_GF_AIF3_BCLK 57
  74. #define LOCHNAGAR2_PIN_GF_AIF3_RXDAT 58
  75. #define LOCHNAGAR2_PIN_GF_AIF3_LRCLK 59
  76. #define LOCHNAGAR2_PIN_GF_AIF3_TXDAT 60
  77. #define LOCHNAGAR2_PIN_GF_AIF4_BCLK 61
  78. #define LOCHNAGAR2_PIN_GF_AIF4_RXDAT 62
  79. #define LOCHNAGAR2_PIN_GF_AIF4_LRCLK 63
  80. #define LOCHNAGAR2_PIN_GF_AIF4_TXDAT 64
  81. #define LOCHNAGAR2_PIN_GF_AIF1_BCLK 65
  82. #define LOCHNAGAR2_PIN_GF_AIF1_RXDAT 66
  83. #define LOCHNAGAR2_PIN_GF_AIF1_LRCLK 67
  84. #define LOCHNAGAR2_PIN_GF_AIF1_TXDAT 68
  85. #define LOCHNAGAR2_PIN_GF_AIF2_BCLK 69
  86. #define LOCHNAGAR2_PIN_GF_AIF2_RXDAT 70
  87. #define LOCHNAGAR2_PIN_GF_AIF2_LRCLK 71
  88. #define LOCHNAGAR2_PIN_GF_AIF2_TXDAT 72
  89. #define LOCHNAGAR2_PIN_DSP_UART1_RX 73
  90. #define LOCHNAGAR2_PIN_DSP_UART1_TX 74
  91. #define LOCHNAGAR2_PIN_DSP_UART2_RX 75
  92. #define LOCHNAGAR2_PIN_DSP_UART2_TX 76
  93. #define LOCHNAGAR2_PIN_GF_UART2_RX 77
  94. #define LOCHNAGAR2_PIN_GF_UART2_TX 78
  95. #define LOCHNAGAR2_PIN_USB_UART_RX 79
  96. #define LOCHNAGAR2_PIN_CDC_PDMCLK1 80
  97. #define LOCHNAGAR2_PIN_CDC_PDMDAT1 81
  98. #define LOCHNAGAR2_PIN_CDC_PDMCLK2 82
  99. #define LOCHNAGAR2_PIN_CDC_PDMDAT2 83
  100. #define LOCHNAGAR2_PIN_CDC_DMICCLK1 84
  101. #define LOCHNAGAR2_PIN_CDC_DMICDAT1 85
  102. #define LOCHNAGAR2_PIN_CDC_DMICCLK2 86
  103. #define LOCHNAGAR2_PIN_CDC_DMICDAT2 87
  104. #define LOCHNAGAR2_PIN_CDC_DMICCLK3 88
  105. #define LOCHNAGAR2_PIN_CDC_DMICDAT3 89
  106. #define LOCHNAGAR2_PIN_CDC_DMICCLK4 90
  107. #define LOCHNAGAR2_PIN_CDC_DMICDAT4 91
  108. #define LOCHNAGAR2_PIN_DSP_DMICCLK1 92
  109. #define LOCHNAGAR2_PIN_DSP_DMICDAT1 93
  110. #define LOCHNAGAR2_PIN_DSP_DMICCLK2 94
  111. #define LOCHNAGAR2_PIN_DSP_DMICDAT2 95
  112. #define LOCHNAGAR2_PIN_I2C2_SCL 96
  113. #define LOCHNAGAR2_PIN_I2C2_SDA 97
  114. #define LOCHNAGAR2_PIN_I2C3_SCL 98
  115. #define LOCHNAGAR2_PIN_I2C3_SDA 99
  116. #define LOCHNAGAR2_PIN_I2C4_SCL 100
  117. #define LOCHNAGAR2_PIN_I2C4_SDA 101
  118. #define LOCHNAGAR2_PIN_DSP_STANDBY 102
  119. #define LOCHNAGAR2_PIN_CDC_MCLK1 103
  120. #define LOCHNAGAR2_PIN_CDC_MCLK2 104
  121. #define LOCHNAGAR2_PIN_DSP_CLKIN 105
  122. #define LOCHNAGAR2_PIN_PSIA1_MCLK 106
  123. #define LOCHNAGAR2_PIN_PSIA2_MCLK 107
  124. #define LOCHNAGAR2_PIN_GF_GPIO1 108
  125. #define LOCHNAGAR2_PIN_GF_GPIO5 109
  126. #define LOCHNAGAR2_PIN_DSP_GPIO20 110
  127. #define LOCHNAGAR2_PIN_NUM_GPIOS 111
  128. #endif