qcom,sm8250.h 4.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Qualcomm SM8250 interconnect IDs
  4. *
  5. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  6. */
  7. #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H
  8. #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H
  9. #define MASTER_A1NOC_CFG 0
  10. #define MASTER_QSPI_0 1
  11. #define MASTER_QUP_1 2
  12. #define MASTER_QUP_2 3
  13. #define MASTER_TSIF 4
  14. #define MASTER_PCIE_2 5
  15. #define MASTER_SDCC_4 6
  16. #define MASTER_UFS_MEM 7
  17. #define MASTER_USB3 8
  18. #define MASTER_USB3_1 9
  19. #define A1NOC_SNOC_SLV 10
  20. #define SLAVE_ANOC_PCIE_GEM_NOC_1 11
  21. #define SLAVE_SERVICE_A1NOC 12
  22. #define MASTER_A2NOC_CFG 0
  23. #define MASTER_QDSS_BAM 1
  24. #define MASTER_QUP_0 2
  25. #define MASTER_CNOC_A2NOC 3
  26. #define MASTER_CRYPTO_CORE_0 4
  27. #define MASTER_IPA 5
  28. #define MASTER_PCIE 6
  29. #define MASTER_PCIE_1 7
  30. #define MASTER_QDSS_ETR 8
  31. #define MASTER_SDCC_2 9
  32. #define MASTER_UFS_CARD 10
  33. #define A2NOC_SNOC_SLV 11
  34. #define SLAVE_ANOC_PCIE_GEM_NOC 12
  35. #define SLAVE_SERVICE_A2NOC 13
  36. #define MASTER_NPU 0
  37. #define SLAVE_CDSP_MEM_NOC 1
  38. #define SNOC_CNOC_MAS 0
  39. #define MASTER_QDSS_DAP 1
  40. #define SLAVE_A1NOC_CFG 2
  41. #define SLAVE_A2NOC_CFG 3
  42. #define SLAVE_AHB2PHY_SOUTH 4
  43. #define SLAVE_AHB2PHY_NORTH 5
  44. #define SLAVE_AOSS 6
  45. #define SLAVE_CAMERA_CFG 7
  46. #define SLAVE_CLK_CTL 8
  47. #define SLAVE_CDSP_CFG 9
  48. #define SLAVE_RBCPR_CX_CFG 10
  49. #define SLAVE_RBCPR_MMCX_CFG 11
  50. #define SLAVE_RBCPR_MX_CFG 12
  51. #define SLAVE_CRYPTO_0_CFG 13
  52. #define SLAVE_CX_RDPM 14
  53. #define SLAVE_DCC_CFG 15
  54. #define SLAVE_CNOC_DDRSS 16
  55. #define SLAVE_DISPLAY_CFG 17
  56. #define SLAVE_GRAPHICS_3D_CFG 18
  57. #define SLAVE_IMEM_CFG 19
  58. #define SLAVE_IPA_CFG 20
  59. #define SLAVE_IPC_ROUTER_CFG 21
  60. #define SLAVE_LPASS 22
  61. #define SLAVE_CNOC_MNOC_CFG 23
  62. #define SLAVE_NPU_CFG 24
  63. #define SLAVE_PCIE_0_CFG 25
  64. #define SLAVE_PCIE_1_CFG 26
  65. #define SLAVE_PCIE_2_CFG 27
  66. #define SLAVE_PDM 28
  67. #define SLAVE_PIMEM_CFG 29
  68. #define SLAVE_PRNG 30
  69. #define SLAVE_QDSS_CFG 31
  70. #define SLAVE_QSPI_0 32
  71. #define SLAVE_QUP_0 33
  72. #define SLAVE_QUP_1 34
  73. #define SLAVE_QUP_2 35
  74. #define SLAVE_SDCC_2 36
  75. #define SLAVE_SDCC_4 37
  76. #define SLAVE_SNOC_CFG 38
  77. #define SLAVE_TCSR 39
  78. #define SLAVE_TLMM_NORTH 40
  79. #define SLAVE_TLMM_SOUTH 41
  80. #define SLAVE_TLMM_WEST 42
  81. #define SLAVE_TSIF 43
  82. #define SLAVE_UFS_CARD_CFG 44
  83. #define SLAVE_UFS_MEM_CFG 45
  84. #define SLAVE_USB3 46
  85. #define SLAVE_USB3_1 47
  86. #define SLAVE_VENUS_CFG 48
  87. #define SLAVE_VSENSE_CTRL_CFG 49
  88. #define SLAVE_CNOC_A2NOC 50
  89. #define SLAVE_SERVICE_CNOC 51
  90. #define MASTER_CNOC_DC_NOC 0
  91. #define SLAVE_LLCC_CFG 1
  92. #define SLAVE_GEM_NOC_CFG 2
  93. #define MASTER_GPU_TCU 0
  94. #define MASTER_SYS_TCU 1
  95. #define MASTER_AMPSS_M0 2
  96. #define MASTER_GEM_NOC_CFG 3
  97. #define MASTER_COMPUTE_NOC 4
  98. #define MASTER_GRAPHICS_3D 5
  99. #define MASTER_MNOC_HF_MEM_NOC 6
  100. #define MASTER_MNOC_SF_MEM_NOC 7
  101. #define MASTER_ANOC_PCIE_GEM_NOC 8
  102. #define MASTER_SNOC_GC_MEM_NOC 9
  103. #define MASTER_SNOC_SF_MEM_NOC 10
  104. #define SLAVE_GEM_NOC_SNOC 11
  105. #define SLAVE_LLCC 12
  106. #define SLAVE_MEM_NOC_PCIE_SNOC 13
  107. #define SLAVE_SERVICE_GEM_NOC_1 14
  108. #define SLAVE_SERVICE_GEM_NOC_2 15
  109. #define SLAVE_SERVICE_GEM_NOC 16
  110. #define MASTER_IPA_CORE 0
  111. #define SLAVE_IPA_CORE 1
  112. #define MASTER_LLCC 0
  113. #define SLAVE_EBI_CH0 1
  114. #define MASTER_CNOC_MNOC_CFG 0
  115. #define MASTER_CAMNOC_HF 1
  116. #define MASTER_CAMNOC_ICP 2
  117. #define MASTER_CAMNOC_SF 3
  118. #define MASTER_VIDEO_P0 4
  119. #define MASTER_VIDEO_P1 5
  120. #define MASTER_VIDEO_PROC 6
  121. #define MASTER_MDP_PORT0 7
  122. #define MASTER_MDP_PORT1 8
  123. #define MASTER_ROTATOR 9
  124. #define SLAVE_MNOC_HF_MEM_NOC 10
  125. #define SLAVE_MNOC_SF_MEM_NOC 11
  126. #define SLAVE_SERVICE_MNOC 12
  127. #define MASTER_NPU_SYS 0
  128. #define MASTER_NPU_CDP 1
  129. #define MASTER_NPU_NOC_CFG 2
  130. #define SLAVE_NPU_CAL_DP0 3
  131. #define SLAVE_NPU_CAL_DP1 4
  132. #define SLAVE_NPU_CP 5
  133. #define SLAVE_NPU_INT_DMA_BWMON_CFG 6
  134. #define SLAVE_NPU_DPM 7
  135. #define SLAVE_ISENSE_CFG 8
  136. #define SLAVE_NPU_LLM_CFG 9
  137. #define SLAVE_NPU_TCM 10
  138. #define SLAVE_NPU_COMPUTE_NOC 11
  139. #define SLAVE_SERVICE_NPU_NOC 12
  140. #define MASTER_SNOC_CFG 0
  141. #define A1NOC_SNOC_MAS 1
  142. #define A2NOC_SNOC_MAS 2
  143. #define MASTER_GEM_NOC_SNOC 3
  144. #define MASTER_GEM_NOC_PCIE_SNOC 4
  145. #define MASTER_PIMEM 5
  146. #define MASTER_GIC 6
  147. #define SLAVE_APPSS 7
  148. #define SNOC_CNOC_SLV 8
  149. #define SLAVE_SNOC_GEM_NOC_GC 9
  150. #define SLAVE_SNOC_GEM_NOC_SF 10
  151. #define SLAVE_OCIMEM 11
  152. #define SLAVE_PIMEM 12
  153. #define SLAVE_SERVICE_SNOC 13
  154. #define SLAVE_PCIE_0 14
  155. #define SLAVE_PCIE_1 15
  156. #define SLAVE_PCIE_2 16
  157. #define SLAVE_QDSS_STM 17
  158. #define SLAVE_TCU 18
  159. #endif