qcom,qcs404.h 2.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Qualcomm interconnect IDs
  4. *
  5. * Copyright (c) 2019, Linaro Ltd.
  6. * Author: Georgi Djakov <georgi.djakov@linaro.org>
  7. */
  8. #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
  9. #define __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
  10. #define MASTER_AMPSS_M0 0
  11. #define MASTER_OXILI 1
  12. #define MASTER_MDP_PORT0 2
  13. #define MASTER_SNOC_BIMC_1 3
  14. #define MASTER_TCU_0 4
  15. #define SLAVE_EBI_CH0 5
  16. #define SLAVE_BIMC_SNOC 6
  17. #define MASTER_SPDM 0
  18. #define MASTER_BLSP_1 1
  19. #define MASTER_BLSP_2 2
  20. #define MASTER_XI_USB_HS1 3
  21. #define MASTER_CRYPT0 4
  22. #define MASTER_SDCC_1 5
  23. #define MASTER_SDCC_2 6
  24. #define MASTER_SNOC_PCNOC 7
  25. #define MASTER_QPIC 8
  26. #define PCNOC_INT_0 9
  27. #define PCNOC_INT_2 10
  28. #define PCNOC_INT_3 11
  29. #define PCNOC_S_0 12
  30. #define PCNOC_S_1 13
  31. #define PCNOC_S_2 14
  32. #define PCNOC_S_3 15
  33. #define PCNOC_S_4 16
  34. #define PCNOC_S_6 17
  35. #define PCNOC_S_7 18
  36. #define PCNOC_S_8 19
  37. #define PCNOC_S_9 20
  38. #define PCNOC_S_10 21
  39. #define PCNOC_S_11 22
  40. #define SLAVE_SPDM 23
  41. #define SLAVE_PDM 24
  42. #define SLAVE_PRNG 25
  43. #define SLAVE_TCSR 26
  44. #define SLAVE_SNOC_CFG 27
  45. #define SLAVE_MESSAGE_RAM 28
  46. #define SLAVE_DISP_SS_CFG 29
  47. #define SLAVE_GPU_CFG 30
  48. #define SLAVE_BLSP_1 31
  49. #define SLAVE_BLSP_2 32
  50. #define SLAVE_TLMM_NORTH 33
  51. #define SLAVE_PCIE 34
  52. #define SLAVE_ETHERNET 35
  53. #define SLAVE_TLMM_EAST 36
  54. #define SLAVE_TCU 37
  55. #define SLAVE_PMIC_ARB 38
  56. #define SLAVE_SDCC_1 39
  57. #define SLAVE_SDCC_2 40
  58. #define SLAVE_TLMM_SOUTH 41
  59. #define SLAVE_USB_HS 42
  60. #define SLAVE_USB3 43
  61. #define SLAVE_CRYPTO_0_CFG 44
  62. #define SLAVE_PCNOC_SNOC 45
  63. #define MASTER_QDSS_BAM 0
  64. #define MASTER_BIMC_SNOC 1
  65. #define MASTER_PCNOC_SNOC 2
  66. #define MASTER_QDSS_ETR 3
  67. #define MASTER_EMAC 4
  68. #define MASTER_PCIE 5
  69. #define MASTER_USB3 6
  70. #define QDSS_INT 7
  71. #define SNOC_INT_0 8
  72. #define SNOC_INT_1 9
  73. #define SNOC_INT_2 10
  74. #define SLAVE_KPSS_AHB 11
  75. #define SLAVE_WCSS 12
  76. #define SLAVE_SNOC_BIMC_1 13
  77. #define SLAVE_IMEM 14
  78. #define SLAVE_SNOC_PCNOC 15
  79. #define SLAVE_QDSS_STM 16
  80. #define SLAVE_CATS_0 17
  81. #define SLAVE_CATS_1 18
  82. #define SLAVE_LPASS 19
  83. #endif