x1830-dma.h 1.1 KB

123456789101112131415161718192021222324252627282930313233343536373839
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * This header provides macros for X1830 DMA bindings.
  4. *
  5. * Copyright (c) 2019 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
  6. */
  7. #ifndef __DT_BINDINGS_DMA_X1830_DMA_H__
  8. #define __DT_BINDINGS_DMA_X1830_DMA_H__
  9. /*
  10. * Request type numbers for the X1830 DMA controller (written to the DRTn
  11. * register for the channel).
  12. */
  13. #define X1830_DMA_I2S0_TX 0x6
  14. #define X1830_DMA_I2S0_RX 0x7
  15. #define X1830_DMA_AUTO 0x8
  16. #define X1830_DMA_SADC_RX 0x9
  17. #define X1830_DMA_UART1_TX 0x12
  18. #define X1830_DMA_UART1_RX 0x13
  19. #define X1830_DMA_UART0_TX 0x14
  20. #define X1830_DMA_UART0_RX 0x15
  21. #define X1830_DMA_SSI0_TX 0x16
  22. #define X1830_DMA_SSI0_RX 0x17
  23. #define X1830_DMA_SSI1_TX 0x18
  24. #define X1830_DMA_SSI1_RX 0x19
  25. #define X1830_DMA_MSC0_TX 0x1a
  26. #define X1830_DMA_MSC0_RX 0x1b
  27. #define X1830_DMA_MSC1_TX 0x1c
  28. #define X1830_DMA_MSC1_RX 0x1d
  29. #define X1830_DMA_DMIC_RX 0x21
  30. #define X1830_DMA_SMB0_TX 0x24
  31. #define X1830_DMA_SMB0_RX 0x25
  32. #define X1830_DMA_SMB1_TX 0x26
  33. #define X1830_DMA_SMB1_RX 0x27
  34. #define X1830_DMA_DES_TX 0x2e
  35. #define X1830_DMA_DES_RX 0x2f
  36. #endif /* __DT_BINDINGS_DMA_X1830_DMA_H__ */