tegra234-clock.h 504 B

1234567891011121314
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. */
  3. #ifndef DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H
  4. #define DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H
  5. /** @brief output of gate CLK_ENB_FUSE */
  6. #define TEGRA234_CLK_FUSE 40
  7. /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */
  8. #define TEGRA234_CLK_SDMMC4 123
  9. /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */
  10. #define TEGRA234_CLK_UARTA 155
  11. #endif