drm_hdcp.h 8.7 KB

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  1. /* SPDX-License-Identifier: MIT */
  2. /*
  3. * Copyright (C) 2017 Google, Inc.
  4. *
  5. * Authors:
  6. * Sean Paul <seanpaul@chromium.org>
  7. */
  8. #ifndef _DRM_HDCP_H_INCLUDED_
  9. #define _DRM_HDCP_H_INCLUDED_
  10. #include <linux/types.h>
  11. /* Period of hdcp checks (to ensure we're still authenticated) */
  12. #define DRM_HDCP_CHECK_PERIOD_MS (128 * 16)
  13. #define DRM_HDCP2_CHECK_PERIOD_MS 500
  14. /* Shared lengths/masks between HDMI/DVI/DisplayPort */
  15. #define DRM_HDCP_AN_LEN 8
  16. #define DRM_HDCP_BSTATUS_LEN 2
  17. #define DRM_HDCP_KSV_LEN 5
  18. #define DRM_HDCP_RI_LEN 2
  19. #define DRM_HDCP_V_PRIME_PART_LEN 4
  20. #define DRM_HDCP_V_PRIME_NUM_PARTS 5
  21. #define DRM_HDCP_NUM_DOWNSTREAM(x) (x & 0x7f)
  22. #define DRM_HDCP_MAX_CASCADE_EXCEEDED(x) (x & BIT(3))
  23. #define DRM_HDCP_MAX_DEVICE_EXCEEDED(x) (x & BIT(7))
  24. /* Slave address for the HDCP registers in the receiver */
  25. #define DRM_HDCP_DDC_ADDR 0x3A
  26. /* Value to use at the end of the SHA-1 bytestream used for repeaters */
  27. #define DRM_HDCP_SHA1_TERMINATOR 0x80
  28. /* HDCP register offsets for HDMI/DVI devices */
  29. #define DRM_HDCP_DDC_BKSV 0x00
  30. #define DRM_HDCP_DDC_RI_PRIME 0x08
  31. #define DRM_HDCP_DDC_AKSV 0x10
  32. #define DRM_HDCP_DDC_AN 0x18
  33. #define DRM_HDCP_DDC_V_PRIME(h) (0x20 + h * 4)
  34. #define DRM_HDCP_DDC_BCAPS 0x40
  35. #define DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT BIT(6)
  36. #define DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY BIT(5)
  37. #define DRM_HDCP_DDC_BSTATUS 0x41
  38. #define DRM_HDCP_DDC_KSV_FIFO 0x43
  39. #define DRM_HDCP_1_4_SRM_ID 0x8
  40. #define DRM_HDCP_1_4_VRL_LENGTH_SIZE 3
  41. #define DRM_HDCP_1_4_DCP_SIG_SIZE 40
  42. /* Protocol message definition for HDCP2.2 specification */
  43. /*
  44. * Protected content streams are classified into 2 types:
  45. * - Type0: Can be transmitted with HDCP 1.4+
  46. * - Type1: Can be transmitted with HDCP 2.2+
  47. */
  48. #define HDCP_STREAM_TYPE0 0x00
  49. #define HDCP_STREAM_TYPE1 0x01
  50. /* HDCP2.2 Msg IDs */
  51. #define HDCP_2_2_NULL_MSG 1
  52. #define HDCP_2_2_AKE_INIT 2
  53. #define HDCP_2_2_AKE_SEND_CERT 3
  54. #define HDCP_2_2_AKE_NO_STORED_KM 4
  55. #define HDCP_2_2_AKE_STORED_KM 5
  56. #define HDCP_2_2_AKE_SEND_HPRIME 7
  57. #define HDCP_2_2_AKE_SEND_PAIRING_INFO 8
  58. #define HDCP_2_2_LC_INIT 9
  59. #define HDCP_2_2_LC_SEND_LPRIME 10
  60. #define HDCP_2_2_SKE_SEND_EKS 11
  61. #define HDCP_2_2_REP_SEND_RECVID_LIST 12
  62. #define HDCP_2_2_REP_SEND_ACK 15
  63. #define HDCP_2_2_REP_STREAM_MANAGE 16
  64. #define HDCP_2_2_REP_STREAM_READY 17
  65. #define HDCP_2_2_RTX_LEN 8
  66. #define HDCP_2_2_RRX_LEN 8
  67. #define HDCP_2_2_K_PUB_RX_MOD_N_LEN 128
  68. #define HDCP_2_2_K_PUB_RX_EXP_E_LEN 3
  69. #define HDCP_2_2_K_PUB_RX_LEN (HDCP_2_2_K_PUB_RX_MOD_N_LEN + \
  70. HDCP_2_2_K_PUB_RX_EXP_E_LEN)
  71. #define HDCP_2_2_DCP_LLC_SIG_LEN 384
  72. #define HDCP_2_2_E_KPUB_KM_LEN 128
  73. #define HDCP_2_2_E_KH_KM_M_LEN (16 + 16)
  74. #define HDCP_2_2_H_PRIME_LEN 32
  75. #define HDCP_2_2_E_KH_KM_LEN 16
  76. #define HDCP_2_2_RN_LEN 8
  77. #define HDCP_2_2_L_PRIME_LEN 32
  78. #define HDCP_2_2_E_DKEY_KS_LEN 16
  79. #define HDCP_2_2_RIV_LEN 8
  80. #define HDCP_2_2_SEQ_NUM_LEN 3
  81. #define HDCP_2_2_V_PRIME_HALF_LEN (HDCP_2_2_L_PRIME_LEN / 2)
  82. #define HDCP_2_2_RECEIVER_ID_LEN DRM_HDCP_KSV_LEN
  83. #define HDCP_2_2_MAX_DEVICE_COUNT 31
  84. #define HDCP_2_2_RECEIVER_IDS_MAX_LEN (HDCP_2_2_RECEIVER_ID_LEN * \
  85. HDCP_2_2_MAX_DEVICE_COUNT)
  86. #define HDCP_2_2_MPRIME_LEN 32
  87. /* Following Macros take a byte at a time for bit(s) masking */
  88. /*
  89. * TODO: This has to be changed for DP MST, as multiple stream on
  90. * same port is possible.
  91. * For HDCP2.2 on HDMI and DP SST this value is always 1.
  92. */
  93. #define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 1
  94. #define HDCP_2_2_TXCAP_MASK_LEN 2
  95. #define HDCP_2_2_RXCAPS_LEN 3
  96. #define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0))
  97. #define HDCP_2_2_DP_HDCP_CAPABLE(x) ((x) & BIT(1))
  98. #define HDCP_2_2_RXINFO_LEN 2
  99. /* HDCP1.x compliant device in downstream */
  100. #define HDCP_2_2_HDCP1_DEVICE_CONNECTED(x) ((x) & BIT(0))
  101. /* HDCP2.0 Compliant repeater in downstream */
  102. #define HDCP_2_2_HDCP_2_0_REP_CONNECTED(x) ((x) & BIT(1))
  103. #define HDCP_2_2_MAX_CASCADE_EXCEEDED(x) ((x) & BIT(2))
  104. #define HDCP_2_2_MAX_DEVS_EXCEEDED(x) ((x) & BIT(3))
  105. #define HDCP_2_2_DEV_COUNT_LO(x) (((x) & (0xF << 4)) >> 4)
  106. #define HDCP_2_2_DEV_COUNT_HI(x) ((x) & BIT(0))
  107. #define HDCP_2_2_DEPTH(x) (((x) & (0x7 << 1)) >> 1)
  108. struct hdcp2_cert_rx {
  109. u8 receiver_id[HDCP_2_2_RECEIVER_ID_LEN];
  110. u8 kpub_rx[HDCP_2_2_K_PUB_RX_LEN];
  111. u8 reserved[2];
  112. u8 dcp_signature[HDCP_2_2_DCP_LLC_SIG_LEN];
  113. } __packed;
  114. struct hdcp2_streamid_type {
  115. u8 stream_id;
  116. u8 stream_type;
  117. } __packed;
  118. /*
  119. * The TxCaps field specified in the HDCP HDMI, DP specs
  120. * This field is big endian as specified in the errata.
  121. */
  122. struct hdcp2_tx_caps {
  123. /* Transmitter must set this to 0x2 */
  124. u8 version;
  125. /* Reserved for HDCP and DP Spec. Read as Zero */
  126. u8 tx_cap_mask[HDCP_2_2_TXCAP_MASK_LEN];
  127. } __packed;
  128. /* Main structures for HDCP2.2 protocol communication */
  129. struct hdcp2_ake_init {
  130. u8 msg_id;
  131. u8 r_tx[HDCP_2_2_RTX_LEN];
  132. struct hdcp2_tx_caps tx_caps;
  133. } __packed;
  134. struct hdcp2_ake_send_cert {
  135. u8 msg_id;
  136. struct hdcp2_cert_rx cert_rx;
  137. u8 r_rx[HDCP_2_2_RRX_LEN];
  138. u8 rx_caps[HDCP_2_2_RXCAPS_LEN];
  139. } __packed;
  140. struct hdcp2_ake_no_stored_km {
  141. u8 msg_id;
  142. u8 e_kpub_km[HDCP_2_2_E_KPUB_KM_LEN];
  143. } __packed;
  144. struct hdcp2_ake_stored_km {
  145. u8 msg_id;
  146. u8 e_kh_km_m[HDCP_2_2_E_KH_KM_M_LEN];
  147. } __packed;
  148. struct hdcp2_ake_send_hprime {
  149. u8 msg_id;
  150. u8 h_prime[HDCP_2_2_H_PRIME_LEN];
  151. } __packed;
  152. struct hdcp2_ake_send_pairing_info {
  153. u8 msg_id;
  154. u8 e_kh_km[HDCP_2_2_E_KH_KM_LEN];
  155. } __packed;
  156. struct hdcp2_lc_init {
  157. u8 msg_id;
  158. u8 r_n[HDCP_2_2_RN_LEN];
  159. } __packed;
  160. struct hdcp2_lc_send_lprime {
  161. u8 msg_id;
  162. u8 l_prime[HDCP_2_2_L_PRIME_LEN];
  163. } __packed;
  164. struct hdcp2_ske_send_eks {
  165. u8 msg_id;
  166. u8 e_dkey_ks[HDCP_2_2_E_DKEY_KS_LEN];
  167. u8 riv[HDCP_2_2_RIV_LEN];
  168. } __packed;
  169. struct hdcp2_rep_send_receiverid_list {
  170. u8 msg_id;
  171. u8 rx_info[HDCP_2_2_RXINFO_LEN];
  172. u8 seq_num_v[HDCP_2_2_SEQ_NUM_LEN];
  173. u8 v_prime[HDCP_2_2_V_PRIME_HALF_LEN];
  174. u8 receiver_ids[HDCP_2_2_RECEIVER_IDS_MAX_LEN];
  175. } __packed;
  176. struct hdcp2_rep_send_ack {
  177. u8 msg_id;
  178. u8 v[HDCP_2_2_V_PRIME_HALF_LEN];
  179. } __packed;
  180. struct hdcp2_rep_stream_manage {
  181. u8 msg_id;
  182. u8 seq_num_m[HDCP_2_2_SEQ_NUM_LEN];
  183. __be16 k;
  184. struct hdcp2_streamid_type streams[HDCP_2_2_MAX_CONTENT_STREAMS_CNT];
  185. } __packed;
  186. struct hdcp2_rep_stream_ready {
  187. u8 msg_id;
  188. u8 m_prime[HDCP_2_2_MPRIME_LEN];
  189. } __packed;
  190. /* HDCP2.2 TIMEOUTs in mSec */
  191. #define HDCP_2_2_CERT_TIMEOUT_MS 100
  192. #define HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS 1000
  193. #define HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS 200
  194. #define HDCP_2_2_PAIRING_TIMEOUT_MS 200
  195. #define HDCP_2_2_HDMI_LPRIME_TIMEOUT_MS 20
  196. #define HDCP_2_2_DP_LPRIME_TIMEOUT_MS 7
  197. #define HDCP_2_2_RECVID_LIST_TIMEOUT_MS 3000
  198. #define HDCP_2_2_STREAM_READY_TIMEOUT_MS 100
  199. /* HDMI HDCP2.2 Register Offsets */
  200. #define HDCP_2_2_HDMI_REG_VER_OFFSET 0x50
  201. #define HDCP_2_2_HDMI_REG_WR_MSG_OFFSET 0x60
  202. #define HDCP_2_2_HDMI_REG_RXSTATUS_OFFSET 0x70
  203. #define HDCP_2_2_HDMI_REG_RD_MSG_OFFSET 0x80
  204. #define HDCP_2_2_HDMI_REG_DBG_OFFSET 0xC0
  205. #define HDCP_2_2_HDMI_SUPPORT_MASK BIT(2)
  206. #define HDCP_2_2_RX_CAPS_VERSION_VAL 0x02
  207. #define HDCP_2_2_SEQ_NUM_MAX 0xFFFFFF
  208. #define HDCP_2_2_DELAY_BEFORE_ENCRYPTION_EN 200
  209. /* Below macros take a byte at a time and mask the bit(s) */
  210. #define HDCP_2_2_HDMI_RXSTATUS_LEN 2
  211. #define HDCP_2_2_HDMI_RXSTATUS_MSG_SZ_HI(x) ((x) & 0x3)
  212. #define HDCP_2_2_HDMI_RXSTATUS_READY(x) ((x) & BIT(2))
  213. #define HDCP_2_2_HDMI_RXSTATUS_REAUTH_REQ(x) ((x) & BIT(3))
  214. /*
  215. * Helper functions to convert 24bit big endian hdcp sequence number to
  216. * host format and back
  217. */
  218. static inline
  219. u32 drm_hdcp_be24_to_cpu(const u8 seq_num[HDCP_2_2_SEQ_NUM_LEN])
  220. {
  221. return (u32)(seq_num[2] | seq_num[1] << 8 | seq_num[0] << 16);
  222. }
  223. static inline
  224. void drm_hdcp_cpu_to_be24(u8 seq_num[HDCP_2_2_SEQ_NUM_LEN], u32 val)
  225. {
  226. seq_num[0] = val >> 16;
  227. seq_num[1] = val >> 8;
  228. seq_num[2] = val;
  229. }
  230. #define DRM_HDCP_SRM_GEN1_MAX_BYTES (5 * 1024)
  231. #define DRM_HDCP_1_4_SRM_ID 0x8
  232. #define DRM_HDCP_SRM_ID_MASK (0xF << 4)
  233. #define DRM_HDCP_1_4_VRL_LENGTH_SIZE 3
  234. #define DRM_HDCP_1_4_DCP_SIG_SIZE 40
  235. #define DRM_HDCP_2_SRM_ID 0x9
  236. #define DRM_HDCP_2_INDICATOR 0x1
  237. #define DRM_HDCP_2_INDICATOR_MASK 0xF
  238. #define DRM_HDCP_2_VRL_LENGTH_SIZE 3
  239. #define DRM_HDCP_2_DCP_SIG_SIZE 384
  240. #define DRM_HDCP_2_NO_OF_DEV_PLUS_RESERVED_SZ 4
  241. #define DRM_HDCP_2_KSV_COUNT_2_LSBITS(byte) (((byte) & 0xC0) >> 6)
  242. struct hdcp_srm_header {
  243. u8 srm_id;
  244. u8 reserved;
  245. __be16 srm_version;
  246. u8 srm_gen_no;
  247. } __packed;
  248. struct drm_device;
  249. struct drm_connector;
  250. int drm_hdcp_check_ksvs_revoked(struct drm_device *dev,
  251. u8 *ksvs, u32 ksv_count);
  252. int drm_connector_attach_content_protection_property(
  253. struct drm_connector *connector, bool hdcp_content_type);
  254. void drm_hdcp_update_content_protection(struct drm_connector *connector,
  255. u64 val);
  256. /* Content Type classification for HDCP2.2 vs others */
  257. #define DRM_MODE_HDCP_CONTENT_TYPE0 0
  258. #define DRM_MODE_HDCP_CONTENT_TYPE1 1
  259. #endif