sunxi_wdt.c 7.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * sunxi Watchdog Driver
  4. *
  5. * Copyright (c) 2013 Carlo Caione
  6. * 2012 Henrik Nordstrom
  7. *
  8. * Based on xen_wdt.c
  9. * (c) Copyright 2010 Novell, Inc.
  10. */
  11. #include <linux/clk.h>
  12. #include <linux/delay.h>
  13. #include <linux/err.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/of.h>
  20. #include <linux/of_device.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/types.h>
  23. #include <linux/watchdog.h>
  24. #define WDT_MAX_TIMEOUT 16
  25. #define WDT_MIN_TIMEOUT 1
  26. #define WDT_TIMEOUT_MASK 0x0F
  27. #define WDT_CTRL_RELOAD ((1 << 0) | (0x0a57 << 1))
  28. #define WDT_MODE_EN (1 << 0)
  29. #define DRV_NAME "sunxi-wdt"
  30. #define DRV_VERSION "1.0"
  31. static bool nowayout = WATCHDOG_NOWAYOUT;
  32. static unsigned int timeout;
  33. /*
  34. * This structure stores the register offsets for different variants
  35. * of Allwinner's watchdog hardware.
  36. */
  37. struct sunxi_wdt_reg {
  38. u8 wdt_ctrl;
  39. u8 wdt_cfg;
  40. u8 wdt_mode;
  41. u8 wdt_timeout_shift;
  42. u8 wdt_reset_mask;
  43. u8 wdt_reset_val;
  44. };
  45. struct sunxi_wdt_dev {
  46. struct watchdog_device wdt_dev;
  47. void __iomem *wdt_base;
  48. const struct sunxi_wdt_reg *wdt_regs;
  49. };
  50. /*
  51. * wdt_timeout_map maps the watchdog timer interval value in seconds to
  52. * the value of the register WDT_MODE at bits .wdt_timeout_shift ~ +3
  53. *
  54. * [timeout seconds] = register value
  55. *
  56. */
  57. static const int wdt_timeout_map[] = {
  58. [1] = 0x1, /* 1s */
  59. [2] = 0x2, /* 2s */
  60. [3] = 0x3, /* 3s */
  61. [4] = 0x4, /* 4s */
  62. [5] = 0x5, /* 5s */
  63. [6] = 0x6, /* 6s */
  64. [8] = 0x7, /* 8s */
  65. [10] = 0x8, /* 10s */
  66. [12] = 0x9, /* 12s */
  67. [14] = 0xA, /* 14s */
  68. [16] = 0xB, /* 16s */
  69. };
  70. static int sunxi_wdt_restart(struct watchdog_device *wdt_dev,
  71. unsigned long action, void *data)
  72. {
  73. struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
  74. void __iomem *wdt_base = sunxi_wdt->wdt_base;
  75. const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
  76. u32 val;
  77. /* Set system reset function */
  78. val = readl(wdt_base + regs->wdt_cfg);
  79. val &= ~(regs->wdt_reset_mask);
  80. val |= regs->wdt_reset_val;
  81. writel(val, wdt_base + regs->wdt_cfg);
  82. /* Set lowest timeout and enable watchdog */
  83. val = readl(wdt_base + regs->wdt_mode);
  84. val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
  85. val |= WDT_MODE_EN;
  86. writel(val, wdt_base + regs->wdt_mode);
  87. /*
  88. * Restart the watchdog. The default (and lowest) interval
  89. * value for the watchdog is 0.5s.
  90. */
  91. writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
  92. while (1) {
  93. mdelay(5);
  94. val = readl(wdt_base + regs->wdt_mode);
  95. val |= WDT_MODE_EN;
  96. writel(val, wdt_base + regs->wdt_mode);
  97. }
  98. return 0;
  99. }
  100. static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
  101. {
  102. struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
  103. void __iomem *wdt_base = sunxi_wdt->wdt_base;
  104. const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
  105. writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
  106. return 0;
  107. }
  108. static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
  109. unsigned int timeout)
  110. {
  111. struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
  112. void __iomem *wdt_base = sunxi_wdt->wdt_base;
  113. const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
  114. u32 reg;
  115. if (wdt_timeout_map[timeout] == 0)
  116. timeout++;
  117. sunxi_wdt->wdt_dev.timeout = timeout;
  118. reg = readl(wdt_base + regs->wdt_mode);
  119. reg &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
  120. reg |= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
  121. writel(reg, wdt_base + regs->wdt_mode);
  122. sunxi_wdt_ping(wdt_dev);
  123. return 0;
  124. }
  125. static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
  126. {
  127. struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
  128. void __iomem *wdt_base = sunxi_wdt->wdt_base;
  129. const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
  130. writel(0, wdt_base + regs->wdt_mode);
  131. return 0;
  132. }
  133. static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
  134. {
  135. u32 reg;
  136. struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
  137. void __iomem *wdt_base = sunxi_wdt->wdt_base;
  138. const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
  139. int ret;
  140. ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
  141. sunxi_wdt->wdt_dev.timeout);
  142. if (ret < 0)
  143. return ret;
  144. /* Set system reset function */
  145. reg = readl(wdt_base + regs->wdt_cfg);
  146. reg &= ~(regs->wdt_reset_mask);
  147. reg |= regs->wdt_reset_val;
  148. writel(reg, wdt_base + regs->wdt_cfg);
  149. /* Enable watchdog */
  150. reg = readl(wdt_base + regs->wdt_mode);
  151. reg |= WDT_MODE_EN;
  152. writel(reg, wdt_base + regs->wdt_mode);
  153. return 0;
  154. }
  155. static const struct watchdog_info sunxi_wdt_info = {
  156. .identity = DRV_NAME,
  157. .options = WDIOF_SETTIMEOUT |
  158. WDIOF_KEEPALIVEPING |
  159. WDIOF_MAGICCLOSE,
  160. };
  161. static const struct watchdog_ops sunxi_wdt_ops = {
  162. .owner = THIS_MODULE,
  163. .start = sunxi_wdt_start,
  164. .stop = sunxi_wdt_stop,
  165. .ping = sunxi_wdt_ping,
  166. .set_timeout = sunxi_wdt_set_timeout,
  167. .restart = sunxi_wdt_restart,
  168. };
  169. static const struct sunxi_wdt_reg sun4i_wdt_reg = {
  170. .wdt_ctrl = 0x00,
  171. .wdt_cfg = 0x04,
  172. .wdt_mode = 0x04,
  173. .wdt_timeout_shift = 3,
  174. .wdt_reset_mask = 0x02,
  175. .wdt_reset_val = 0x02,
  176. };
  177. static const struct sunxi_wdt_reg sun6i_wdt_reg = {
  178. .wdt_ctrl = 0x10,
  179. .wdt_cfg = 0x14,
  180. .wdt_mode = 0x18,
  181. .wdt_timeout_shift = 4,
  182. .wdt_reset_mask = 0x03,
  183. .wdt_reset_val = 0x01,
  184. };
  185. static const struct of_device_id sunxi_wdt_dt_ids[] = {
  186. { .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
  187. { .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
  188. { /* sentinel */ }
  189. };
  190. MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
  191. static int sunxi_wdt_probe(struct platform_device *pdev)
  192. {
  193. struct device *dev = &pdev->dev;
  194. struct sunxi_wdt_dev *sunxi_wdt;
  195. int err;
  196. sunxi_wdt = devm_kzalloc(dev, sizeof(*sunxi_wdt), GFP_KERNEL);
  197. if (!sunxi_wdt)
  198. return -ENOMEM;
  199. sunxi_wdt->wdt_regs = of_device_get_match_data(dev);
  200. if (!sunxi_wdt->wdt_regs)
  201. return -ENODEV;
  202. sunxi_wdt->wdt_base = devm_platform_ioremap_resource(pdev, 0);
  203. if (IS_ERR(sunxi_wdt->wdt_base))
  204. return PTR_ERR(sunxi_wdt->wdt_base);
  205. sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
  206. sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
  207. sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
  208. sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
  209. sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
  210. sunxi_wdt->wdt_dev.parent = dev;
  211. watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, dev);
  212. watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
  213. watchdog_set_restart_priority(&sunxi_wdt->wdt_dev, 128);
  214. watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);
  215. sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
  216. watchdog_stop_on_reboot(&sunxi_wdt->wdt_dev);
  217. err = devm_watchdog_register_device(dev, &sunxi_wdt->wdt_dev);
  218. if (unlikely(err))
  219. return err;
  220. dev_info(dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
  221. sunxi_wdt->wdt_dev.timeout, nowayout);
  222. return 0;
  223. }
  224. static struct platform_driver sunxi_wdt_driver = {
  225. .probe = sunxi_wdt_probe,
  226. .driver = {
  227. .name = DRV_NAME,
  228. .of_match_table = sunxi_wdt_dt_ids,
  229. },
  230. };
  231. module_platform_driver(sunxi_wdt_driver);
  232. module_param(timeout, uint, 0);
  233. MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
  234. module_param(nowayout, bool, 0);
  235. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  236. "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  237. MODULE_LICENSE("GPL");
  238. MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
  239. MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
  240. MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
  241. MODULE_VERSION(DRV_VERSION);