pnx833x_wdt.c 6.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * PNX833x Hardware Watchdog Driver
  4. * Copyright 2008 NXP Semiconductors
  5. * Daniel Laird <daniel.j.laird@nxp.com>
  6. * Andre McCurdy <andre.mccurdy@nxp.com>
  7. *
  8. * Heavily based upon - IndyDog 0.3
  9. * A Hardware Watchdog Device for SGI IP22
  10. *
  11. * (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
  12. *
  13. * based on softdog.c by Alan Cox <alan@redhat.com>
  14. */
  15. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/types.h>
  19. #include <linux/kernel.h>
  20. #include <linux/fs.h>
  21. #include <linux/mm.h>
  22. #include <linux/miscdevice.h>
  23. #include <linux/watchdog.h>
  24. #include <linux/notifier.h>
  25. #include <linux/reboot.h>
  26. #include <linux/init.h>
  27. #include <asm/mach-pnx833x/pnx833x.h>
  28. #define WATCHDOG_TIMEOUT 30 /* 30 sec Maximum timeout */
  29. #define WATCHDOG_COUNT_FREQUENCY 68000000U /* Watchdog counts at 68MHZ. */
  30. #define PNX_WATCHDOG_TIMEOUT (WATCHDOG_TIMEOUT * WATCHDOG_COUNT_FREQUENCY)
  31. #define PNX_TIMEOUT_VALUE 2040000000U
  32. /** CONFIG block */
  33. #define PNX833X_CONFIG (0x07000U)
  34. #define PNX833X_CONFIG_CPU_WATCHDOG (0x54)
  35. #define PNX833X_CONFIG_CPU_WATCHDOG_COMPARE (0x58)
  36. #define PNX833X_CONFIG_CPU_COUNTERS_CONTROL (0x1c)
  37. /** RESET block */
  38. #define PNX833X_RESET (0x08000U)
  39. #define PNX833X_RESET_CONFIG (0x08)
  40. static int pnx833x_wdt_alive;
  41. /* Set default timeout in MHZ.*/
  42. static int pnx833x_wdt_timeout = PNX_WATCHDOG_TIMEOUT;
  43. module_param(pnx833x_wdt_timeout, int, 0);
  44. MODULE_PARM_DESC(timeout, "Watchdog timeout in Mhz. (68Mhz clock), default="
  45. __MODULE_STRING(PNX_TIMEOUT_VALUE) "(30 seconds).");
  46. static bool nowayout = WATCHDOG_NOWAYOUT;
  47. module_param(nowayout, bool, 0);
  48. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  49. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  50. #define START_DEFAULT 1
  51. static int start_enabled = START_DEFAULT;
  52. module_param(start_enabled, int, 0);
  53. MODULE_PARM_DESC(start_enabled, "Watchdog is started on module insertion "
  54. "(default=" __MODULE_STRING(START_DEFAULT) ")");
  55. static void pnx833x_wdt_start(void)
  56. {
  57. /* Enable watchdog causing reset. */
  58. PNX833X_REG(PNX833X_RESET + PNX833X_RESET_CONFIG) |= 0x1;
  59. /* Set timeout.*/
  60. PNX833X_REG(PNX833X_CONFIG +
  61. PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = pnx833x_wdt_timeout;
  62. /* Enable watchdog. */
  63. PNX833X_REG(PNX833X_CONFIG +
  64. PNX833X_CONFIG_CPU_COUNTERS_CONTROL) |= 0x1;
  65. pr_info("Started watchdog timer\n");
  66. }
  67. static void pnx833x_wdt_stop(void)
  68. {
  69. /* Disable watchdog causing reset. */
  70. PNX833X_REG(PNX833X_RESET + PNX833X_CONFIG) &= 0xFFFFFFFE;
  71. /* Disable watchdog.*/
  72. PNX833X_REG(PNX833X_CONFIG +
  73. PNX833X_CONFIG_CPU_COUNTERS_CONTROL) &= 0xFFFFFFFE;
  74. pr_info("Stopped watchdog timer\n");
  75. }
  76. static void pnx833x_wdt_ping(void)
  77. {
  78. PNX833X_REG(PNX833X_CONFIG +
  79. PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = pnx833x_wdt_timeout;
  80. }
  81. /*
  82. * Allow only one person to hold it open
  83. */
  84. static int pnx833x_wdt_open(struct inode *inode, struct file *file)
  85. {
  86. if (test_and_set_bit(0, &pnx833x_wdt_alive))
  87. return -EBUSY;
  88. if (nowayout)
  89. __module_get(THIS_MODULE);
  90. /* Activate timer */
  91. if (!start_enabled)
  92. pnx833x_wdt_start();
  93. pnx833x_wdt_ping();
  94. pr_info("Started watchdog timer\n");
  95. return stream_open(inode, file);
  96. }
  97. static int pnx833x_wdt_release(struct inode *inode, struct file *file)
  98. {
  99. /* Shut off the timer.
  100. * Lock it in if it's a module and we defined ...NOWAYOUT */
  101. if (!nowayout)
  102. pnx833x_wdt_stop(); /* Turn the WDT off */
  103. clear_bit(0, &pnx833x_wdt_alive);
  104. return 0;
  105. }
  106. static ssize_t pnx833x_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
  107. {
  108. /* Refresh the timer. */
  109. if (len)
  110. pnx833x_wdt_ping();
  111. return len;
  112. }
  113. static long pnx833x_wdt_ioctl(struct file *file, unsigned int cmd,
  114. unsigned long arg)
  115. {
  116. int options, new_timeout = 0;
  117. uint32_t timeout, timeout_left = 0;
  118. static const struct watchdog_info ident = {
  119. .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
  120. .firmware_version = 0,
  121. .identity = "Hardware Watchdog for PNX833x",
  122. };
  123. switch (cmd) {
  124. default:
  125. return -ENOTTY;
  126. case WDIOC_GETSUPPORT:
  127. if (copy_to_user((struct watchdog_info *)arg,
  128. &ident, sizeof(ident)))
  129. return -EFAULT;
  130. return 0;
  131. case WDIOC_GETSTATUS:
  132. case WDIOC_GETBOOTSTATUS:
  133. return put_user(0, (int *)arg);
  134. case WDIOC_SETOPTIONS:
  135. if (get_user(options, (int *)arg))
  136. return -EFAULT;
  137. if (options & WDIOS_DISABLECARD)
  138. pnx833x_wdt_stop();
  139. if (options & WDIOS_ENABLECARD)
  140. pnx833x_wdt_start();
  141. return 0;
  142. case WDIOC_KEEPALIVE:
  143. pnx833x_wdt_ping();
  144. return 0;
  145. case WDIOC_SETTIMEOUT:
  146. {
  147. if (get_user(new_timeout, (int *)arg))
  148. return -EFAULT;
  149. pnx833x_wdt_timeout = new_timeout;
  150. PNX833X_REG(PNX833X_CONFIG +
  151. PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = new_timeout;
  152. return put_user(new_timeout, (int *)arg);
  153. }
  154. case WDIOC_GETTIMEOUT:
  155. timeout = PNX833X_REG(PNX833X_CONFIG +
  156. PNX833X_CONFIG_CPU_WATCHDOG_COMPARE);
  157. return put_user(timeout, (int *)arg);
  158. case WDIOC_GETTIMELEFT:
  159. timeout_left = PNX833X_REG(PNX833X_CONFIG +
  160. PNX833X_CONFIG_CPU_WATCHDOG);
  161. return put_user(timeout_left, (int *)arg);
  162. }
  163. }
  164. static int pnx833x_wdt_notify_sys(struct notifier_block *this,
  165. unsigned long code, void *unused)
  166. {
  167. if (code == SYS_DOWN || code == SYS_HALT)
  168. pnx833x_wdt_stop(); /* Turn the WDT off */
  169. return NOTIFY_DONE;
  170. }
  171. static const struct file_operations pnx833x_wdt_fops = {
  172. .owner = THIS_MODULE,
  173. .llseek = no_llseek,
  174. .write = pnx833x_wdt_write,
  175. .unlocked_ioctl = pnx833x_wdt_ioctl,
  176. .compat_ioctl = compat_ptr_ioctl,
  177. .open = pnx833x_wdt_open,
  178. .release = pnx833x_wdt_release,
  179. };
  180. static struct miscdevice pnx833x_wdt_miscdev = {
  181. .minor = WATCHDOG_MINOR,
  182. .name = "watchdog",
  183. .fops = &pnx833x_wdt_fops,
  184. };
  185. static struct notifier_block pnx833x_wdt_notifier = {
  186. .notifier_call = pnx833x_wdt_notify_sys,
  187. };
  188. static int __init watchdog_init(void)
  189. {
  190. int ret, cause;
  191. /* Lets check the reason for the reset.*/
  192. cause = PNX833X_REG(PNX833X_RESET);
  193. /*If bit 31 is set then watchdog was cause of reset.*/
  194. if (cause & 0x80000000) {
  195. pr_info("The system was previously reset due to the watchdog firing - please investigate...\n");
  196. }
  197. ret = register_reboot_notifier(&pnx833x_wdt_notifier);
  198. if (ret) {
  199. pr_err("cannot register reboot notifier (err=%d)\n", ret);
  200. return ret;
  201. }
  202. ret = misc_register(&pnx833x_wdt_miscdev);
  203. if (ret) {
  204. pr_err("cannot register miscdev on minor=%d (err=%d)\n",
  205. WATCHDOG_MINOR, ret);
  206. unregister_reboot_notifier(&pnx833x_wdt_notifier);
  207. return ret;
  208. }
  209. pr_info("Hardware Watchdog Timer for PNX833x: Version 0.1\n");
  210. if (start_enabled)
  211. pnx833x_wdt_start();
  212. return 0;
  213. }
  214. static void __exit watchdog_exit(void)
  215. {
  216. misc_deregister(&pnx833x_wdt_miscdev);
  217. unregister_reboot_notifier(&pnx833x_wdt_notifier);
  218. }
  219. module_init(watchdog_init);
  220. module_exit(watchdog_exit);
  221. MODULE_AUTHOR("Daniel Laird/Andre McCurdy");
  222. MODULE_DESCRIPTION("Hardware Watchdog Device for PNX833x");
  223. MODULE_LICENSE("GPL");