spi-pxa2xx-pci.c 7.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * CE4100's SPI device is more or less the same one as found on PXA
  4. *
  5. * Copyright (C) 2016, Intel Corporation
  6. */
  7. #include <linux/clk-provider.h>
  8. #include <linux/module.h>
  9. #include <linux/pci.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/spi/pxa2xx_spi.h>
  12. #include <linux/dmaengine.h>
  13. #include <linux/platform_data/dma-dw.h>
  14. enum {
  15. PORT_QUARK_X1000,
  16. PORT_BYT,
  17. PORT_MRFLD,
  18. PORT_BSW0,
  19. PORT_BSW1,
  20. PORT_BSW2,
  21. PORT_CE4100,
  22. PORT_LPT0,
  23. PORT_LPT1,
  24. };
  25. struct pxa_spi_info {
  26. enum pxa_ssp_type type;
  27. int port_id;
  28. int num_chipselect;
  29. unsigned long max_clk_rate;
  30. /* DMA channel request parameters */
  31. bool (*dma_filter)(struct dma_chan *chan, void *param);
  32. void *tx_param;
  33. void *rx_param;
  34. int dma_burst_size;
  35. int (*setup)(struct pci_dev *pdev, struct pxa_spi_info *c);
  36. };
  37. static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
  38. static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
  39. static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
  40. static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
  41. static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
  42. static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
  43. static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
  44. static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
  45. static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
  46. static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
  47. static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
  48. static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
  49. static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
  50. static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
  51. static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 };
  52. static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 };
  53. static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 };
  54. static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 };
  55. static bool lpss_dma_filter(struct dma_chan *chan, void *param)
  56. {
  57. struct dw_dma_slave *dws = param;
  58. if (dws->dma_dev != chan->device->dev)
  59. return false;
  60. chan->private = dws;
  61. return true;
  62. }
  63. static void lpss_dma_put_device(void *dma_dev)
  64. {
  65. pci_dev_put(dma_dev);
  66. }
  67. static int lpss_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
  68. {
  69. struct pci_dev *dma_dev;
  70. int ret;
  71. c->num_chipselect = 1;
  72. c->max_clk_rate = 50000000;
  73. dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
  74. ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
  75. if (ret)
  76. return ret;
  77. if (c->tx_param) {
  78. struct dw_dma_slave *slave = c->tx_param;
  79. slave->dma_dev = &dma_dev->dev;
  80. slave->m_master = 0;
  81. slave->p_master = 1;
  82. }
  83. if (c->rx_param) {
  84. struct dw_dma_slave *slave = c->rx_param;
  85. slave->dma_dev = &dma_dev->dev;
  86. slave->m_master = 0;
  87. slave->p_master = 1;
  88. }
  89. c->dma_filter = lpss_dma_filter;
  90. return 0;
  91. }
  92. static int mrfld_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
  93. {
  94. struct dw_dma_slave *tx, *rx;
  95. struct pci_dev *dma_dev;
  96. int ret;
  97. switch (PCI_FUNC(dev->devfn)) {
  98. case 0:
  99. c->port_id = 3;
  100. c->num_chipselect = 1;
  101. c->tx_param = &mrfld3_tx_param;
  102. c->rx_param = &mrfld3_rx_param;
  103. break;
  104. case 1:
  105. c->port_id = 5;
  106. c->num_chipselect = 4;
  107. c->tx_param = &mrfld5_tx_param;
  108. c->rx_param = &mrfld5_rx_param;
  109. break;
  110. case 2:
  111. c->port_id = 6;
  112. c->num_chipselect = 1;
  113. c->tx_param = &mrfld6_tx_param;
  114. c->rx_param = &mrfld6_rx_param;
  115. break;
  116. default:
  117. return -ENODEV;
  118. }
  119. dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
  120. ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
  121. if (ret)
  122. return ret;
  123. tx = c->tx_param;
  124. tx->dma_dev = &dma_dev->dev;
  125. rx = c->rx_param;
  126. rx->dma_dev = &dma_dev->dev;
  127. c->dma_filter = lpss_dma_filter;
  128. c->dma_burst_size = 8;
  129. return 0;
  130. }
  131. static struct pxa_spi_info spi_info_configs[] = {
  132. [PORT_CE4100] = {
  133. .type = PXA25x_SSP,
  134. .port_id = -1,
  135. .num_chipselect = -1,
  136. .max_clk_rate = 3686400,
  137. },
  138. [PORT_BYT] = {
  139. .type = LPSS_BYT_SSP,
  140. .port_id = 0,
  141. .setup = lpss_spi_setup,
  142. .tx_param = &byt_tx_param,
  143. .rx_param = &byt_rx_param,
  144. },
  145. [PORT_BSW0] = {
  146. .type = LPSS_BSW_SSP,
  147. .port_id = 0,
  148. .setup = lpss_spi_setup,
  149. .tx_param = &bsw0_tx_param,
  150. .rx_param = &bsw0_rx_param,
  151. },
  152. [PORT_BSW1] = {
  153. .type = LPSS_BSW_SSP,
  154. .port_id = 1,
  155. .setup = lpss_spi_setup,
  156. .tx_param = &bsw1_tx_param,
  157. .rx_param = &bsw1_rx_param,
  158. },
  159. [PORT_BSW2] = {
  160. .type = LPSS_BSW_SSP,
  161. .port_id = 2,
  162. .setup = lpss_spi_setup,
  163. .tx_param = &bsw2_tx_param,
  164. .rx_param = &bsw2_rx_param,
  165. },
  166. [PORT_MRFLD] = {
  167. .type = PXA27x_SSP,
  168. .max_clk_rate = 25000000,
  169. .setup = mrfld_spi_setup,
  170. },
  171. [PORT_QUARK_X1000] = {
  172. .type = QUARK_X1000_SSP,
  173. .port_id = -1,
  174. .num_chipselect = 1,
  175. .max_clk_rate = 50000000,
  176. },
  177. [PORT_LPT0] = {
  178. .type = LPSS_LPT_SSP,
  179. .port_id = 0,
  180. .setup = lpss_spi_setup,
  181. .tx_param = &lpt0_tx_param,
  182. .rx_param = &lpt0_rx_param,
  183. },
  184. [PORT_LPT1] = {
  185. .type = LPSS_LPT_SSP,
  186. .port_id = 1,
  187. .setup = lpss_spi_setup,
  188. .tx_param = &lpt1_tx_param,
  189. .rx_param = &lpt1_rx_param,
  190. },
  191. };
  192. static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
  193. const struct pci_device_id *ent)
  194. {
  195. struct platform_device_info pi;
  196. int ret;
  197. struct platform_device *pdev;
  198. struct pxa2xx_spi_controller spi_pdata;
  199. struct ssp_device *ssp;
  200. struct pxa_spi_info *c;
  201. char buf[40];
  202. ret = pcim_enable_device(dev);
  203. if (ret)
  204. return ret;
  205. ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
  206. if (ret)
  207. return ret;
  208. c = &spi_info_configs[ent->driver_data];
  209. if (c->setup) {
  210. ret = c->setup(dev, c);
  211. if (ret)
  212. return ret;
  213. }
  214. memset(&spi_pdata, 0, sizeof(spi_pdata));
  215. spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn;
  216. spi_pdata.dma_filter = c->dma_filter;
  217. spi_pdata.tx_param = c->tx_param;
  218. spi_pdata.rx_param = c->rx_param;
  219. spi_pdata.enable_dma = c->rx_param && c->tx_param;
  220. spi_pdata.dma_burst_size = c->dma_burst_size ? c->dma_burst_size : 1;
  221. ssp = &spi_pdata.ssp;
  222. ssp->phys_base = pci_resource_start(dev, 0);
  223. ssp->mmio_base = pcim_iomap_table(dev)[0];
  224. ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
  225. ssp->type = c->type;
  226. pci_set_master(dev);
  227. ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
  228. if (ret < 0)
  229. return ret;
  230. ssp->irq = pci_irq_vector(dev, 0);
  231. snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
  232. ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL, 0,
  233. c->max_clk_rate);
  234. if (IS_ERR(ssp->clk))
  235. return PTR_ERR(ssp->clk);
  236. memset(&pi, 0, sizeof(pi));
  237. pi.fwnode = dev->dev.fwnode;
  238. pi.parent = &dev->dev;
  239. pi.name = "pxa2xx-spi";
  240. pi.id = ssp->port_id;
  241. pi.data = &spi_pdata;
  242. pi.size_data = sizeof(spi_pdata);
  243. pdev = platform_device_register_full(&pi);
  244. if (IS_ERR(pdev)) {
  245. clk_unregister(ssp->clk);
  246. return PTR_ERR(pdev);
  247. }
  248. pci_set_drvdata(dev, pdev);
  249. return 0;
  250. }
  251. static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
  252. {
  253. struct platform_device *pdev = pci_get_drvdata(dev);
  254. struct pxa2xx_spi_controller *spi_pdata;
  255. spi_pdata = dev_get_platdata(&pdev->dev);
  256. platform_device_unregister(pdev);
  257. clk_unregister(spi_pdata->ssp.clk);
  258. }
  259. static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
  260. { PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
  261. { PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
  262. { PCI_VDEVICE(INTEL, 0x1194), PORT_MRFLD },
  263. { PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
  264. { PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
  265. { PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
  266. { PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
  267. { PCI_VDEVICE(INTEL, 0x9ce5), PORT_LPT0 },
  268. { PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT1 },
  269. { }
  270. };
  271. MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
  272. static struct pci_driver pxa2xx_spi_pci_driver = {
  273. .name = "pxa2xx_spi_pci",
  274. .id_table = pxa2xx_spi_pci_devices,
  275. .probe = pxa2xx_spi_pci_probe,
  276. .remove = pxa2xx_spi_pci_remove,
  277. };
  278. module_pci_driver(pxa2xx_spi_pci_driver);
  279. MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
  280. MODULE_LICENSE("GPL v2");
  281. MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");