spi-lm70llp.c 8.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Driver for LM70EVAL-LLP board for the LM70 sensor
  4. *
  5. * Copyright (C) 2006 Kaiwan N Billimoria <kaiwan@designergraphix.com>
  6. */
  7. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  8. #include <linux/init.h>
  9. #include <linux/module.h>
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/device.h>
  13. #include <linux/parport.h>
  14. #include <linux/sysfs.h>
  15. #include <linux/workqueue.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/spi/spi_bitbang.h>
  18. /*
  19. * The LM70 communicates with a host processor using a 3-wire variant of
  20. * the SPI/Microwire bus interface. This driver specifically supports an
  21. * NS LM70 LLP Evaluation Board, interfacing to a PC using its parallel
  22. * port to bitbang an SPI-parport bridge. Accordingly, this is an SPI
  23. * master controller driver. The hwmon/lm70 driver is a "SPI protocol
  24. * driver", layered on top of this one and usable without the lm70llp.
  25. *
  26. * Datasheet and Schematic:
  27. * The LM70 is a temperature sensor chip from National Semiconductor; its
  28. * datasheet is available at http://www.national.com/pf/LM/LM70.html
  29. * The schematic for this particular board (the LM70EVAL-LLP) is
  30. * available (on page 4) here:
  31. * http://www.national.com/appinfo/tempsensors/files/LM70LLPEVALmanual.pdf
  32. *
  33. * Also see Documentation/spi/spi-lm70llp.rst. The SPI<->parport code here is
  34. * (heavily) based on spi-butterfly by David Brownell.
  35. *
  36. * The LM70 LLP connects to the PC parallel port in the following manner:
  37. *
  38. * Parallel LM70 LLP
  39. * Port Direction JP2 Header
  40. * ----------- --------- ------------
  41. * D0 2 - -
  42. * D1 3 --> V+ 5
  43. * D2 4 --> V+ 5
  44. * D3 5 --> V+ 5
  45. * D4 6 --> V+ 5
  46. * D5 7 --> nCS 8
  47. * D6 8 --> SCLK 3
  48. * D7 9 --> SI/O 5
  49. * GND 25 - GND 7
  50. * Select 13 <-- SI/O 1
  51. *
  52. * Note that parport pin 13 actually gets inverted by the transistor
  53. * arrangement which lets either the parport or the LM70 drive the
  54. * SI/SO signal (see the schematic for details).
  55. */
  56. #define DRVNAME "spi-lm70llp"
  57. #define lm70_INIT 0xBE
  58. #define SIO 0x10
  59. #define nCS 0x20
  60. #define SCLK 0x40
  61. /*-------------------------------------------------------------------------*/
  62. struct spi_lm70llp {
  63. struct spi_bitbang bitbang;
  64. struct parport *port;
  65. struct pardevice *pd;
  66. struct spi_device *spidev_lm70;
  67. struct spi_board_info info;
  68. //struct device *dev;
  69. };
  70. /* REVISIT : ugly global ; provides "exclusive open" facility */
  71. static struct spi_lm70llp *lm70llp;
  72. /*-------------------------------------------------------------------*/
  73. static inline struct spi_lm70llp *spidev_to_pp(struct spi_device *spi)
  74. {
  75. return spi->controller_data;
  76. }
  77. /*---------------------- LM70 LLP eval board-specific inlines follow */
  78. /* NOTE: we don't actually need to reread the output values, since they'll
  79. * still be what we wrote before. Plus, going through parport builds in
  80. * a ~1ms/operation delay; these SPI transfers could easily be faster.
  81. */
  82. static inline void deassertCS(struct spi_lm70llp *pp)
  83. {
  84. u8 data = parport_read_data(pp->port);
  85. data &= ~0x80; /* pull D7/SI-out low while de-asserted */
  86. parport_write_data(pp->port, data | nCS);
  87. }
  88. static inline void assertCS(struct spi_lm70llp *pp)
  89. {
  90. u8 data = parport_read_data(pp->port);
  91. data |= 0x80; /* pull D7/SI-out high so lm70 drives SO-in */
  92. parport_write_data(pp->port, data & ~nCS);
  93. }
  94. static inline void clkHigh(struct spi_lm70llp *pp)
  95. {
  96. u8 data = parport_read_data(pp->port);
  97. parport_write_data(pp->port, data | SCLK);
  98. }
  99. static inline void clkLow(struct spi_lm70llp *pp)
  100. {
  101. u8 data = parport_read_data(pp->port);
  102. parport_write_data(pp->port, data & ~SCLK);
  103. }
  104. /*------------------------- SPI-LM70-specific inlines ----------------------*/
  105. static inline void spidelay(unsigned d)
  106. {
  107. udelay(d);
  108. }
  109. static inline void setsck(struct spi_device *s, int is_on)
  110. {
  111. struct spi_lm70llp *pp = spidev_to_pp(s);
  112. if (is_on)
  113. clkHigh(pp);
  114. else
  115. clkLow(pp);
  116. }
  117. static inline void setmosi(struct spi_device *s, int is_on)
  118. {
  119. /* FIXME update D7 ... this way we can put the chip
  120. * into shutdown mode and read the manufacturer ID,
  121. * but we can't put it back into operational mode.
  122. */
  123. }
  124. /*
  125. * getmiso:
  126. * Why do we return 0 when the SIO line is high and vice-versa?
  127. * The fact is, the lm70 eval board from NS (which this driver drives),
  128. * is wired in just such a way : when the lm70's SIO goes high, a transistor
  129. * switches it to low reflecting this on the parport (pin 13), and vice-versa.
  130. */
  131. static inline int getmiso(struct spi_device *s)
  132. {
  133. struct spi_lm70llp *pp = spidev_to_pp(s);
  134. return ((SIO == (parport_read_status(pp->port) & SIO)) ? 0 : 1);
  135. }
  136. /*--------------------------------------------------------------------*/
  137. #include "spi-bitbang-txrx.h"
  138. static void lm70_chipselect(struct spi_device *spi, int value)
  139. {
  140. struct spi_lm70llp *pp = spidev_to_pp(spi);
  141. if (value)
  142. assertCS(pp);
  143. else
  144. deassertCS(pp);
  145. }
  146. /*
  147. * Our actual bitbanger routine.
  148. */
  149. static u32 lm70_txrx(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits,
  150. unsigned flags)
  151. {
  152. return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
  153. }
  154. static void spi_lm70llp_attach(struct parport *p)
  155. {
  156. struct pardevice *pd;
  157. struct spi_lm70llp *pp;
  158. struct spi_master *master;
  159. int status;
  160. struct pardev_cb lm70llp_cb;
  161. if (lm70llp) {
  162. pr_warn("spi_lm70llp instance already loaded. Aborting.\n");
  163. return;
  164. }
  165. /* TODO: this just _assumes_ a lm70 is there ... no probe;
  166. * the lm70 driver could verify it, reading the manf ID.
  167. */
  168. master = spi_alloc_master(p->physport->dev, sizeof *pp);
  169. if (!master) {
  170. status = -ENOMEM;
  171. goto out_fail;
  172. }
  173. pp = spi_master_get_devdata(master);
  174. /*
  175. * SPI and bitbang hookup.
  176. */
  177. pp->bitbang.master = master;
  178. pp->bitbang.chipselect = lm70_chipselect;
  179. pp->bitbang.txrx_word[SPI_MODE_0] = lm70_txrx;
  180. pp->bitbang.flags = SPI_3WIRE;
  181. /*
  182. * Parport hookup
  183. */
  184. pp->port = p;
  185. memset(&lm70llp_cb, 0, sizeof(lm70llp_cb));
  186. lm70llp_cb.private = pp;
  187. lm70llp_cb.flags = PARPORT_FLAG_EXCL;
  188. pd = parport_register_dev_model(p, DRVNAME, &lm70llp_cb, 0);
  189. if (!pd) {
  190. status = -ENOMEM;
  191. goto out_free_master;
  192. }
  193. pp->pd = pd;
  194. status = parport_claim(pd);
  195. if (status < 0)
  196. goto out_parport_unreg;
  197. /*
  198. * Start SPI ...
  199. */
  200. status = spi_bitbang_start(&pp->bitbang);
  201. if (status < 0) {
  202. dev_warn(&pd->dev, "spi_bitbang_start failed with status %d\n",
  203. status);
  204. goto out_off_and_release;
  205. }
  206. /*
  207. * The modalias name MUST match the device_driver name
  208. * for the bus glue code to match and subsequently bind them.
  209. * We are binding to the generic drivers/hwmon/lm70.c device
  210. * driver.
  211. */
  212. strcpy(pp->info.modalias, "lm70");
  213. pp->info.max_speed_hz = 6 * 1000 * 1000;
  214. pp->info.chip_select = 0;
  215. pp->info.mode = SPI_3WIRE | SPI_MODE_0;
  216. /* power up the chip, and let the LM70 control SI/SO */
  217. parport_write_data(pp->port, lm70_INIT);
  218. /* Enable access to our primary data structure via
  219. * the board info's (void *)controller_data.
  220. */
  221. pp->info.controller_data = pp;
  222. pp->spidev_lm70 = spi_new_device(pp->bitbang.master, &pp->info);
  223. if (pp->spidev_lm70)
  224. dev_dbg(&pp->spidev_lm70->dev, "spidev_lm70 at %s\n",
  225. dev_name(&pp->spidev_lm70->dev));
  226. else {
  227. dev_warn(&pd->dev, "spi_new_device failed\n");
  228. status = -ENODEV;
  229. goto out_bitbang_stop;
  230. }
  231. pp->spidev_lm70->bits_per_word = 8;
  232. lm70llp = pp;
  233. return;
  234. out_bitbang_stop:
  235. spi_bitbang_stop(&pp->bitbang);
  236. out_off_and_release:
  237. /* power down */
  238. parport_write_data(pp->port, 0);
  239. mdelay(10);
  240. parport_release(pp->pd);
  241. out_parport_unreg:
  242. parport_unregister_device(pd);
  243. out_free_master:
  244. spi_master_put(master);
  245. out_fail:
  246. pr_info("spi_lm70llp probe fail, status %d\n", status);
  247. }
  248. static void spi_lm70llp_detach(struct parport *p)
  249. {
  250. struct spi_lm70llp *pp;
  251. if (!lm70llp || lm70llp->port != p)
  252. return;
  253. pp = lm70llp;
  254. spi_bitbang_stop(&pp->bitbang);
  255. /* power down */
  256. parport_write_data(pp->port, 0);
  257. parport_release(pp->pd);
  258. parport_unregister_device(pp->pd);
  259. spi_master_put(pp->bitbang.master);
  260. lm70llp = NULL;
  261. }
  262. static struct parport_driver spi_lm70llp_drv = {
  263. .name = DRVNAME,
  264. .match_port = spi_lm70llp_attach,
  265. .detach = spi_lm70llp_detach,
  266. .devmodel = true,
  267. };
  268. static int __init init_spi_lm70llp(void)
  269. {
  270. return parport_register_driver(&spi_lm70llp_drv);
  271. }
  272. module_init(init_spi_lm70llp);
  273. static void __exit cleanup_spi_lm70llp(void)
  274. {
  275. parport_unregister_driver(&spi_lm70llp_drv);
  276. }
  277. module_exit(cleanup_spi_lm70llp);
  278. MODULE_AUTHOR("Kaiwan N Billimoria <kaiwan@designergraphix.com>");
  279. MODULE_DESCRIPTION(
  280. "Parport adapter for the National Semiconductor LM70 LLP eval board");
  281. MODULE_LICENSE("GPL");