spi-fsl-lib.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Freescale SPI/eSPI controller driver library.
  4. *
  5. * Maintainer: Kumar Gala
  6. *
  7. * Copyright (C) 2006 Polycom, Inc.
  8. *
  9. * CPM SPI and QE buffer descriptors mode support:
  10. * Copyright (c) 2009 MontaVista Software, Inc.
  11. * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
  12. *
  13. * Copyright 2010 Freescale Semiconductor, Inc.
  14. */
  15. #include <linux/dma-mapping.h>
  16. #include <linux/fsl_devices.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/kernel.h>
  19. #include <linux/mm.h>
  20. #include <linux/module.h>
  21. #include <linux/of_platform.h>
  22. #include <linux/spi/spi.h>
  23. #ifdef CONFIG_FSL_SOC
  24. #include <sysdev/fsl_soc.h>
  25. #endif
  26. #include "spi-fsl-lib.h"
  27. #define MPC8XXX_SPI_RX_BUF(type) \
  28. void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
  29. { \
  30. type *rx = mpc8xxx_spi->rx; \
  31. *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
  32. mpc8xxx_spi->rx = rx; \
  33. } \
  34. EXPORT_SYMBOL_GPL(mpc8xxx_spi_rx_buf_##type);
  35. #define MPC8XXX_SPI_TX_BUF(type) \
  36. u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
  37. { \
  38. u32 data; \
  39. const type *tx = mpc8xxx_spi->tx; \
  40. if (!tx) \
  41. return 0; \
  42. data = *tx++ << mpc8xxx_spi->tx_shift; \
  43. mpc8xxx_spi->tx = tx; \
  44. return data; \
  45. } \
  46. EXPORT_SYMBOL_GPL(mpc8xxx_spi_tx_buf_##type);
  47. MPC8XXX_SPI_RX_BUF(u8)
  48. MPC8XXX_SPI_RX_BUF(u16)
  49. MPC8XXX_SPI_RX_BUF(u32)
  50. MPC8XXX_SPI_TX_BUF(u8)
  51. MPC8XXX_SPI_TX_BUF(u16)
  52. MPC8XXX_SPI_TX_BUF(u32)
  53. struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata)
  54. {
  55. return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
  56. }
  57. EXPORT_SYMBOL_GPL(to_of_pinfo);
  58. const char *mpc8xxx_spi_strmode(unsigned int flags)
  59. {
  60. if (flags & SPI_QE_CPU_MODE) {
  61. return "QE CPU";
  62. } else if (flags & SPI_CPM_MODE) {
  63. if (flags & SPI_QE)
  64. return "QE";
  65. else if (flags & SPI_CPM2)
  66. return "CPM2";
  67. else
  68. return "CPM1";
  69. }
  70. return "CPU";
  71. }
  72. EXPORT_SYMBOL_GPL(mpc8xxx_spi_strmode);
  73. void mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
  74. unsigned int irq)
  75. {
  76. struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
  77. struct spi_master *master;
  78. struct mpc8xxx_spi *mpc8xxx_spi;
  79. master = dev_get_drvdata(dev);
  80. /* the spi->mode bits understood by this driver: */
  81. master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
  82. | SPI_LSB_FIRST | SPI_LOOP;
  83. master->dev.of_node = dev->of_node;
  84. mpc8xxx_spi = spi_master_get_devdata(master);
  85. mpc8xxx_spi->dev = dev;
  86. mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
  87. mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
  88. mpc8xxx_spi->flags = pdata->flags;
  89. mpc8xxx_spi->spibrg = pdata->sysclk;
  90. mpc8xxx_spi->irq = irq;
  91. mpc8xxx_spi->rx_shift = 0;
  92. mpc8xxx_spi->tx_shift = 0;
  93. master->bus_num = pdata->bus_num;
  94. master->num_chipselect = pdata->max_chipselect;
  95. init_completion(&mpc8xxx_spi->done);
  96. }
  97. EXPORT_SYMBOL_GPL(mpc8xxx_spi_probe);
  98. int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
  99. {
  100. struct device *dev = &ofdev->dev;
  101. struct device_node *np = ofdev->dev.of_node;
  102. struct mpc8xxx_spi_probe_info *pinfo;
  103. struct fsl_spi_platform_data *pdata;
  104. const void *prop;
  105. int ret = -ENOMEM;
  106. pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
  107. if (!pinfo)
  108. return ret;
  109. pdata = &pinfo->pdata;
  110. dev->platform_data = pdata;
  111. /* Allocate bus num dynamically. */
  112. pdata->bus_num = -1;
  113. #ifdef CONFIG_FSL_SOC
  114. /* SPI controller is either clocked from QE or SoC clock. */
  115. pdata->sysclk = get_brgfreq();
  116. if (pdata->sysclk == -1) {
  117. pdata->sysclk = fsl_get_sys_freq();
  118. if (pdata->sysclk == -1)
  119. return -ENODEV;
  120. }
  121. #else
  122. ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk);
  123. if (ret)
  124. return ret;
  125. #endif
  126. prop = of_get_property(np, "mode", NULL);
  127. if (prop && !strcmp(prop, "cpu-qe"))
  128. pdata->flags = SPI_QE_CPU_MODE;
  129. else if (prop && !strcmp(prop, "qe"))
  130. pdata->flags = SPI_CPM_MODE | SPI_QE;
  131. else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
  132. pdata->flags = SPI_CPM_MODE | SPI_CPM2;
  133. else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
  134. pdata->flags = SPI_CPM_MODE | SPI_CPM1;
  135. return 0;
  136. }
  137. EXPORT_SYMBOL_GPL(of_mpc8xxx_spi_probe);
  138. MODULE_LICENSE("GPL");