spi-bitbang.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * polling/bitbanging SPI master controller driver utilities
  4. */
  5. #include <linux/spinlock.h>
  6. #include <linux/workqueue.h>
  7. #include <linux/interrupt.h>
  8. #include <linux/module.h>
  9. #include <linux/delay.h>
  10. #include <linux/errno.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/slab.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/spi_bitbang.h>
  15. #define SPI_BITBANG_CS_DELAY 100
  16. /*----------------------------------------------------------------------*/
  17. /*
  18. * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
  19. * Use this for GPIO or shift-register level hardware APIs.
  20. *
  21. * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
  22. * to glue code. These bitbang setup() and cleanup() routines are always
  23. * used, though maybe they're called from controller-aware code.
  24. *
  25. * chipselect() and friends may use spi_device->controller_data and
  26. * controller registers as appropriate.
  27. *
  28. *
  29. * NOTE: SPI controller pins can often be used as GPIO pins instead,
  30. * which means you could use a bitbang driver either to get hardware
  31. * working quickly, or testing for differences that aren't speed related.
  32. */
  33. struct spi_bitbang_cs {
  34. unsigned nsecs; /* (clock cycle time)/2 */
  35. u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
  36. u32 word, u8 bits, unsigned flags);
  37. unsigned (*txrx_bufs)(struct spi_device *,
  38. u32 (*txrx_word)(
  39. struct spi_device *spi,
  40. unsigned nsecs,
  41. u32 word, u8 bits,
  42. unsigned flags),
  43. unsigned, struct spi_transfer *,
  44. unsigned);
  45. };
  46. static unsigned bitbang_txrx_8(
  47. struct spi_device *spi,
  48. u32 (*txrx_word)(struct spi_device *spi,
  49. unsigned nsecs,
  50. u32 word, u8 bits,
  51. unsigned flags),
  52. unsigned ns,
  53. struct spi_transfer *t,
  54. unsigned flags
  55. ) {
  56. unsigned bits = t->bits_per_word;
  57. unsigned count = t->len;
  58. const u8 *tx = t->tx_buf;
  59. u8 *rx = t->rx_buf;
  60. while (likely(count > 0)) {
  61. u8 word = 0;
  62. if (tx)
  63. word = *tx++;
  64. word = txrx_word(spi, ns, word, bits, flags);
  65. if (rx)
  66. *rx++ = word;
  67. count -= 1;
  68. }
  69. return t->len - count;
  70. }
  71. static unsigned bitbang_txrx_16(
  72. struct spi_device *spi,
  73. u32 (*txrx_word)(struct spi_device *spi,
  74. unsigned nsecs,
  75. u32 word, u8 bits,
  76. unsigned flags),
  77. unsigned ns,
  78. struct spi_transfer *t,
  79. unsigned flags
  80. ) {
  81. unsigned bits = t->bits_per_word;
  82. unsigned count = t->len;
  83. const u16 *tx = t->tx_buf;
  84. u16 *rx = t->rx_buf;
  85. while (likely(count > 1)) {
  86. u16 word = 0;
  87. if (tx)
  88. word = *tx++;
  89. word = txrx_word(spi, ns, word, bits, flags);
  90. if (rx)
  91. *rx++ = word;
  92. count -= 2;
  93. }
  94. return t->len - count;
  95. }
  96. static unsigned bitbang_txrx_32(
  97. struct spi_device *spi,
  98. u32 (*txrx_word)(struct spi_device *spi,
  99. unsigned nsecs,
  100. u32 word, u8 bits,
  101. unsigned flags),
  102. unsigned ns,
  103. struct spi_transfer *t,
  104. unsigned flags
  105. ) {
  106. unsigned bits = t->bits_per_word;
  107. unsigned count = t->len;
  108. const u32 *tx = t->tx_buf;
  109. u32 *rx = t->rx_buf;
  110. while (likely(count > 3)) {
  111. u32 word = 0;
  112. if (tx)
  113. word = *tx++;
  114. word = txrx_word(spi, ns, word, bits, flags);
  115. if (rx)
  116. *rx++ = word;
  117. count -= 4;
  118. }
  119. return t->len - count;
  120. }
  121. int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
  122. {
  123. struct spi_bitbang_cs *cs = spi->controller_state;
  124. u8 bits_per_word;
  125. u32 hz;
  126. if (t) {
  127. bits_per_word = t->bits_per_word;
  128. hz = t->speed_hz;
  129. } else {
  130. bits_per_word = 0;
  131. hz = 0;
  132. }
  133. /* spi_transfer level calls that work per-word */
  134. if (!bits_per_word)
  135. bits_per_word = spi->bits_per_word;
  136. if (bits_per_word <= 8)
  137. cs->txrx_bufs = bitbang_txrx_8;
  138. else if (bits_per_word <= 16)
  139. cs->txrx_bufs = bitbang_txrx_16;
  140. else if (bits_per_word <= 32)
  141. cs->txrx_bufs = bitbang_txrx_32;
  142. else
  143. return -EINVAL;
  144. /* nsecs = (clock period)/2 */
  145. if (!hz)
  146. hz = spi->max_speed_hz;
  147. if (hz) {
  148. cs->nsecs = (1000000000/2) / hz;
  149. if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
  150. return -EINVAL;
  151. }
  152. return 0;
  153. }
  154. EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
  155. /*
  156. * spi_bitbang_setup - default setup for per-word I/O loops
  157. */
  158. int spi_bitbang_setup(struct spi_device *spi)
  159. {
  160. struct spi_bitbang_cs *cs = spi->controller_state;
  161. struct spi_bitbang *bitbang;
  162. bool initial_setup = false;
  163. int retval;
  164. bitbang = spi_master_get_devdata(spi->master);
  165. if (!cs) {
  166. cs = kzalloc(sizeof(*cs), GFP_KERNEL);
  167. if (!cs)
  168. return -ENOMEM;
  169. spi->controller_state = cs;
  170. initial_setup = true;
  171. }
  172. /* per-word shift register access, in hardware or bitbanging */
  173. cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
  174. if (!cs->txrx_word) {
  175. retval = -EINVAL;
  176. goto err_free;
  177. }
  178. if (bitbang->setup_transfer) {
  179. retval = bitbang->setup_transfer(spi, NULL);
  180. if (retval < 0)
  181. goto err_free;
  182. }
  183. dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
  184. return 0;
  185. err_free:
  186. if (initial_setup)
  187. kfree(cs);
  188. return retval;
  189. }
  190. EXPORT_SYMBOL_GPL(spi_bitbang_setup);
  191. /*
  192. * spi_bitbang_cleanup - default cleanup for per-word I/O loops
  193. */
  194. void spi_bitbang_cleanup(struct spi_device *spi)
  195. {
  196. kfree(spi->controller_state);
  197. }
  198. EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
  199. static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
  200. {
  201. struct spi_bitbang_cs *cs = spi->controller_state;
  202. unsigned nsecs = cs->nsecs;
  203. struct spi_bitbang *bitbang;
  204. bitbang = spi_master_get_devdata(spi->master);
  205. if (bitbang->set_line_direction) {
  206. int err;
  207. err = bitbang->set_line_direction(spi, !!(t->tx_buf));
  208. if (err < 0)
  209. return err;
  210. }
  211. if (spi->mode & SPI_3WIRE) {
  212. unsigned flags;
  213. flags = t->tx_buf ? SPI_MASTER_NO_RX : SPI_MASTER_NO_TX;
  214. return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags);
  215. }
  216. return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0);
  217. }
  218. /*----------------------------------------------------------------------*/
  219. /*
  220. * SECOND PART ... simple transfer queue runner.
  221. *
  222. * This costs a task context per controller, running the queue by
  223. * performing each transfer in sequence. Smarter hardware can queue
  224. * several DMA transfers at once, and process several controller queues
  225. * in parallel; this driver doesn't match such hardware very well.
  226. *
  227. * Drivers can provide word-at-a-time i/o primitives, or provide
  228. * transfer-at-a-time ones to leverage dma or fifo hardware.
  229. */
  230. static int spi_bitbang_prepare_hardware(struct spi_master *spi)
  231. {
  232. struct spi_bitbang *bitbang;
  233. bitbang = spi_master_get_devdata(spi);
  234. mutex_lock(&bitbang->lock);
  235. bitbang->busy = 1;
  236. mutex_unlock(&bitbang->lock);
  237. return 0;
  238. }
  239. static int spi_bitbang_transfer_one(struct spi_master *master,
  240. struct spi_device *spi,
  241. struct spi_transfer *transfer)
  242. {
  243. struct spi_bitbang *bitbang = spi_master_get_devdata(master);
  244. int status = 0;
  245. if (bitbang->setup_transfer) {
  246. status = bitbang->setup_transfer(spi, transfer);
  247. if (status < 0)
  248. goto out;
  249. }
  250. if (transfer->len)
  251. status = bitbang->txrx_bufs(spi, transfer);
  252. if (status == transfer->len)
  253. status = 0;
  254. else if (status >= 0)
  255. status = -EREMOTEIO;
  256. out:
  257. spi_finalize_current_transfer(master);
  258. return status;
  259. }
  260. static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
  261. {
  262. struct spi_bitbang *bitbang;
  263. bitbang = spi_master_get_devdata(spi);
  264. mutex_lock(&bitbang->lock);
  265. bitbang->busy = 0;
  266. mutex_unlock(&bitbang->lock);
  267. return 0;
  268. }
  269. static void spi_bitbang_set_cs(struct spi_device *spi, bool enable)
  270. {
  271. struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
  272. /* SPI core provides CS high / low, but bitbang driver
  273. * expects CS active
  274. * spi device driver takes care of handling SPI_CS_HIGH
  275. */
  276. enable = (!!(spi->mode & SPI_CS_HIGH) == enable);
  277. ndelay(SPI_BITBANG_CS_DELAY);
  278. bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE :
  279. BITBANG_CS_INACTIVE);
  280. ndelay(SPI_BITBANG_CS_DELAY);
  281. }
  282. /*----------------------------------------------------------------------*/
  283. int spi_bitbang_init(struct spi_bitbang *bitbang)
  284. {
  285. struct spi_master *master = bitbang->master;
  286. bool custom_cs;
  287. if (!master)
  288. return -EINVAL;
  289. /*
  290. * We only need the chipselect callback if we are actually using it.
  291. * If we just use GPIO descriptors, it is surplus. If the
  292. * SPI_MASTER_GPIO_SS flag is set, we always need to call the
  293. * driver-specific chipselect routine.
  294. */
  295. custom_cs = (!master->use_gpio_descriptors ||
  296. (master->flags & SPI_MASTER_GPIO_SS));
  297. if (custom_cs && !bitbang->chipselect)
  298. return -EINVAL;
  299. mutex_init(&bitbang->lock);
  300. if (!master->mode_bits)
  301. master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
  302. if (master->transfer || master->transfer_one_message)
  303. return -EINVAL;
  304. master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
  305. master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
  306. master->transfer_one = spi_bitbang_transfer_one;
  307. /*
  308. * When using GPIO descriptors, the ->set_cs() callback doesn't even
  309. * get called unless SPI_MASTER_GPIO_SS is set.
  310. */
  311. if (custom_cs)
  312. master->set_cs = spi_bitbang_set_cs;
  313. if (!bitbang->txrx_bufs) {
  314. bitbang->use_dma = 0;
  315. bitbang->txrx_bufs = spi_bitbang_bufs;
  316. if (!master->setup) {
  317. if (!bitbang->setup_transfer)
  318. bitbang->setup_transfer =
  319. spi_bitbang_setup_transfer;
  320. master->setup = spi_bitbang_setup;
  321. master->cleanup = spi_bitbang_cleanup;
  322. }
  323. }
  324. return 0;
  325. }
  326. EXPORT_SYMBOL_GPL(spi_bitbang_init);
  327. /**
  328. * spi_bitbang_start - start up a polled/bitbanging SPI master driver
  329. * @bitbang: driver handle
  330. *
  331. * Caller should have zero-initialized all parts of the structure, and then
  332. * provided callbacks for chip selection and I/O loops. If the master has
  333. * a transfer method, its final step should call spi_bitbang_transfer; or,
  334. * that's the default if the transfer routine is not initialized. It should
  335. * also set up the bus number and number of chipselects.
  336. *
  337. * For i/o loops, provide callbacks either per-word (for bitbanging, or for
  338. * hardware that basically exposes a shift register) or per-spi_transfer
  339. * (which takes better advantage of hardware like fifos or DMA engines).
  340. *
  341. * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
  342. * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
  343. * master methods. Those methods are the defaults if the bitbang->txrx_bufs
  344. * routine isn't initialized.
  345. *
  346. * This routine registers the spi_master, which will process requests in a
  347. * dedicated task, keeping IRQs unblocked most of the time. To stop
  348. * processing those requests, call spi_bitbang_stop().
  349. *
  350. * On success, this routine will take a reference to master. The caller is
  351. * responsible for calling spi_bitbang_stop() to decrement the reference and
  352. * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
  353. * leak.
  354. */
  355. int spi_bitbang_start(struct spi_bitbang *bitbang)
  356. {
  357. struct spi_master *master = bitbang->master;
  358. int ret;
  359. ret = spi_bitbang_init(bitbang);
  360. if (ret)
  361. return ret;
  362. /* driver may get busy before register() returns, especially
  363. * if someone registered boardinfo for devices
  364. */
  365. ret = spi_register_master(spi_master_get(master));
  366. if (ret)
  367. spi_master_put(master);
  368. return ret;
  369. }
  370. EXPORT_SYMBOL_GPL(spi_bitbang_start);
  371. /*
  372. * spi_bitbang_stop - stops the task providing spi communication
  373. */
  374. void spi_bitbang_stop(struct spi_bitbang *bitbang)
  375. {
  376. spi_unregister_master(bitbang->master);
  377. }
  378. EXPORT_SYMBOL_GPL(spi_bitbang_stop);
  379. MODULE_LICENSE("GPL");